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testsys_inst

testsys v1.0

Parameters AUTO_GENERATION_ID 1617469839 AUTO_UNIQUE_ID testsys AUTO_DEVICE_FAMILY CYCLONEIVE AUTO_DEVICE EP4CE22F17C6 AUTO_DEVICE_SPEEDGRADE 6 AUTO_CLK_CLOCK_RATE 0 AUTO_CLK_CLOCK_DOMAIN 1 AUTO_CLK_RESET_DOMAIN 1 deviceFamily Cyclone IV E generateLegacySim false

  

Software Assignments (none)

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testsys_inst_clk_main

clock_source v20.1

Parameters clockFrequency 100000000 clockFrequencyKnown true inputClockFrequency 0 resetSynchronousEdges DEASSERT deviceFamily UNKNOWN generateLegacySim false

  

Software Assignments (none)

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testsys_inst_mm_master_bfm_0

altera_avalon_mm_master_bfm v20.1

Parameters AV_ADDRESS_W 32 AV_SYMBOL_W 8 AV_NUMSYMBOLS 4 AV_BURSTCOUNT_W 3 AV_READRESPONSE_W 8 AV_WRITERESPONSE_W 8 USE_READ 1 USE_WRITE 1 USE_ADDRESS 1 USE_BYTE_ENABLE 0 USE_BURSTCOUNT 0 USE_READ_DATA 1 USE_READ_DATA_VALID 1 USE_WRITE_DATA 1 USE_BEGIN_TRANSFER 0 USE_BEGIN_BURST_TRANSFER 0 USE_ARBITERLOCK 0 USE_LOCK 0 USE_DEBUGACCESS 0 USE_WAIT_REQUEST 1 USE_TRANSACTIONID 0 USE_WRITERESPONSE 0 USE_READRESPONSE 0 USE_CLKEN 0 ASSERT_HIGH_RESET 1 ASSERT_HIGH_WAITREQUEST 1 ASSERT_HIGH_READ 1 ASSERT_HIGH_WRITE 1 ASSERT_HIGH_BYTEENABLE 1 ASSERT_HIGH_READDATAVALID 1 ASSERT_HIGH_ARBITERLOCK 1 ASSERT_HIGH_LOCK 1 AV_CONSTANT_BURST_BEHAVIOR 1 AV_BURST_LINEWRAP 0 AV_BURST_BNDR_ONLY 1 AV_ALWAYS_BURST_MAX_BURST 0 AV_MAX_PENDING_READS 0 AV_MAX_PENDING_WRITES 0 AV_FIX_READ_LATENCY 1 AV_READ_WAIT_TIME 1 AV_WRITE_WAIT_TIME 0 REGISTER_WAITREQUEST 1 AV_REGISTERINCOMINGSIGNALS 1 ADDRESS_UNITS SYMBOLS VHDL_ID 0 deviceFamily UNKNOWN generateLegacySim false

  

Software Assignments (none)

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testsys_inst_uart

altera_avalon_uart v20.1

Parameters baud 115200 dataBits 8 fixedBaud true parity NONE simCharStream simInteractiveInputEnable false simInteractiveOutputEnable false simTrueBaud false stopBits 1 syncRegDepth 2 useCtsRts false useEopRegister false useRelativePathForSimFile false clockRate 100000000 baudError 0.01 parityFisrtChar N deviceFamily UNKNOWN generateLegacySim false

  

Software Assignments BAUD 115200 DATA_BITS 8 FIXED_BAUD 1 FREQ 100000000 PARITY 'N' SIM_CHAR_STREAM "" SIM_TRUE_BAUD 0 STOP_BITS 1 SYNC_REG_DEPTH 2 USE_CTS_RTS 0 USE_EOP_REGISTER 0

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testsys_inst_clk_bfm

altera_avalon_clock_source v20.1

Parameters CLOCK_RATE 100000000 CLOCK_UNIT 1 deviceFamily UNKNOWN generateLegacySim false

  

Software Assignments (none)

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testsys_inst_reset_bfm

altera_avalon_reset_source v20.1

Parameters ASSERT_HIGH_RESET 0 INITIAL_RESET_CYCLES 50 deviceFamily UNKNOWN generateLegacySim false

  

Software Assignments (none)

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testsys_inst_uart_external_connection_bfm

altera_conduit_bfm v20.1

Parameters CLOCKED_SIGNAL false ENABLE_RESET false SIGNAL_ROLES rxd,txd SIGNAL_WIDTHS 1,1 SIGNAL_DIRECTIONS output,input deviceFamily UNKNOWN generateLegacySim false

  

Software Assignments (none)

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testsys_inst_uart_irq_bfm

altera_avalon_interrupt_sink v20.1

Parameters ASSERT_HIGH_IRQ 1 AV_IRQ_W 1 ASYNCHRONOUS_INTERRUPT 0 VHDL_ID 0 deviceFamily UNKNOWN generateLegacySim false

  

Software Assignments (none)