void Hardware::SetSwitches(uint8_t channel, uint32_t range)
{

	if (channel > eCh4) return;
	
	if (MenuStatus[MENU_HARDWARE][1] == ADD_ON)	// support for new input stage addon PCB 
	{
		ADDON_SetSwitches(channel, range);
		return;
	}


	int16_t dat_buf = 0;
	int32_t adr_buf = 0x00000000;
	int32_t outbuf = 0x00000000;
	


	//Bit0 and Bit1: 01: 1st Voltage divider 1/10, Bit2 and 3: 2nd Voltage divider 1/10
	//Bit4: 0: OPA656N: ampl. by 1.25, 1: ampl. by 1.
	//Bit5: BW-Limit
	//Bit6: 1st AD8131 x1/x2
	//Bit7: 2nd AD8131 x1/x2
	//Bits8-11: AC Channel (Bit8..Bit11) -> only at address 0x70000000
	//Bit28-30: hardware address of the channels Bit28: channel 3  Bit28 + 29: channel 4  Bit28 + 30: channel 2  Bit28 + 29 + 20: channel 1
	
	switch(range)
	{
		case -1 : 	// for coupling AC/DC the address must be 0x70000000 -> channel 1
		{
			dat_buf = SwitchesCH1;		// get actual range setting of channel 1
			channel = eCh1;
			break;
		}
									// amplification 1.25
		//case e1mV : dat_buf = 0x	  ; break;	//0x		//1mV		not supported
		//case e2mV : dat_buf = 0x   ; break;	//0x		//2mV		not supported
		//case e5mV : dat_buf = 0x   ; break;	//0x		//5mV		not supported
		case e10mV  : dat_buf = 0x0015; break;	//0x0005	//10mV	00010101
		case e20mV  : dat_buf = 0x0055; break;	//0x0045	//20mV	01010101
		case e50mV  : dat_buf = 0x00C5; break;	//0x00D5	//50mV	11000101
		case e100mV : dat_buf = 0x0019; break;	//0x0009	//100mV	00011001
		case e200mV : dat_buf = 0x0059; break;	//0x0049	//200mV	01011001
		case e500mV : dat_buf = 0x00C9; break;	//0x00D9	//500mV	11001001
		case e1V    : dat_buf = 0x001A; break;	//0x000A	//1V	00011010
		case e2V    : dat_buf = 0x005A; break;	//0x004A	//2V	01011010
		case e5V    : dat_buf = 0x00CA; break;	//0x00DA	//5V	11001010
		default: return;
	}

		
	dat_buf &= 0xFFEF;									//delete bit 4 set amplification > 1 (switch off)

	switch(channel)
	{
		case eCh1:
		{
			adr_buf = 0x70000000;							// channel 1 address

			dat_buf = dat_buf & 0xF0DF;						// delete bit 5 and bits 8 - 11
			
			if (MenuStatus[MENU_CHANNEL1][0] == 8) dat_buf = dat_buf | 0x0100;	// set DC Bit 8
			if (MenuStatus[MENU_CHANNEL2][0] == 8) dat_buf = dat_buf | 0x0200;	// set DC Bit 9
			if (MenuStatus[MENU_CHANNEL3][0] == 8) dat_buf = dat_buf | 0x0400;	// set DC Bit 10
			if (MenuStatus[MENU_CHANNEL4][0] == 8) dat_buf = dat_buf | 0x0800;	// set DC Bit 11

			if (MenuStatus[MENU_CHANNEL1][1] == 241) dat_buf = dat_buf | 0x0020;	// BW Limit Bit 5

			SwitchesCH1 = dat_buf;		// remember the settings of channel 1
			
			outbuf = adr_buf | dat_buf;
			
			VoltageChangedCh1 = 1;
		
			break;	
		}
		case eCh2:
		{
			adr_buf = 0x50000000;							// channel 2 address
			
			dat_buf = dat_buf & 0xFFDF;						// delete Bit 5
			
			if (MenuStatus[MENU_CHANNEL2][1] == 241) dat_buf = dat_buf | 0x0020;	// BW Limit Bit 5
			
			outbuf = adr_buf | dat_buf;
	
			VoltageChangedCh2 = 1;

			break;	
		}
		case eCh3:
		{
			adr_buf = 0x10000000;							// channel 3 address
			
			dat_buf = dat_buf & 0xFFDF;						// delete Bit 5
			
			if (MenuStatus[MENU_CHANNEL3][1] == 241) dat_buf = dat_buf | 0x0020;	// BW Limit Bit 5
			
			outbuf = adr_buf | dat_buf;

			VoltageChangedCh3 = 1;

			break;	
		}
		case eCh4:
		{
			adr_buf = 0x30000000;							// channel 4 address
			
			dat_buf = dat_buf & 0xFFDF;						// delete Bit 5
			
			if (MenuStatus[MENU_CHANNEL4][1] == 241) dat_buf = dat_buf | 0x0020;	// BW Limit Bit 5
			
			outbuf = adr_buf | dat_buf;

			VoltageChangedCh4 = 1;

			break;	
		}
		default: return;
	}

	serdata->np_piodata = outbuf;								// write shadow to serial register
	
	serstartsw->np_piodata = 1;
	serstartsw->np_piodata = 0;	
		
	RELAY_SETTLE;

	outbuf = (adr_buf | dat_buf) & 0xFFFFFFF0;						// switch off driver transistors
	
	serdata->np_piodata = outbuf;
	
	serstartsw->np_piodata = 1;
	serstartsw->np_piodata = 0;	
	
	RELAY_SETTLE;
	

}