library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
use IEEE.NUMERIC_STD.ALL;

--use IEEE.std_logic_signed.all;
--use IEEE.std_logic_unsigned.all;
--use IEEE.STD_LOGIC_ARITH.ALL;

entity hvfg is
    --- Wo muss der hin constant IO_WIDTH : integer := 100;
    Port ( clk          : in   STD_LOGIC;
          spiclk        : in  std_logic;
          spimosi       : in  std_logic;
          spimiso       : out  std_logic;    
          switchleds    : out std_logic_vector(19 downto 0);
          led0          : out  std_logic; 
          led1          : out  std_logic; 
          led2          : out  std_logic 
          );
end hvfg;

-- 
architecture Behavioral of hvfg is
  
    --type fsmstate is(idle,waitfor0,waitfor1);
    --signal fsm         : fsmstate := idle;
    
    signal cnt         : natural range 0 to (2**31)-1 := 0;
    signal fsmstate    : natural range 0 to 15 := 0;
    signal indcnt      : natural range 0 to 32 := 0;
    signal fsmcnt      : natural range 0 to (2**31)-1 := 0;
    signal fsmtimeout  : natural range 0 to (2**31)-1 := 0;
    signal logikpegel  : std_logic := '0';

    signal outdata_temp : unsigned(15 downto 0) := "1011000000000011" ;
    signal outdata_slv  : std_logic_vector(15 downto 0) ;

    signal indata_temp  : unsigned(15 downto 0) := "1011000000000010" ;
    signal indata_slv   : std_logic_vector(15 downto 0) ;
    
    -- 7 Bit CRC
    signal crc          : std_logic_vector(6 downto 0) ;
    
    signal spimisosyn1 : std_logic := '0';

    signal spimosisyn1 : std_logic := '0';
    signal spimosisyn2 : std_logic := '0';
    signal spiclksyn1  : std_logic := '0';
    signal spiclksyn2  : std_logic := '0';
    
begin

process begin
    wait until rising_edge(clk);    
   
    -- hier das Zeug von aussen
    spimosisyn2 <= spimosisyn1; 
    spimosisyn1 <= spimosi; 
    spiclksyn2  <= spiclksyn1; 
    spiclksyn1  <= spiclk; 

    if( cnt < 10000000) then -- blinkyblinky
      cnt <= cnt+1;
    else 
      cnt <= 0 ;
      --logikpegel <= not logikpegel;
    end if;
    
------------- statemachine
   if    (fsmstate = 0) then    -- idle
             fsmcnt <= 0;
             spimisosyn1 <= '0';
             if(crc = "0000000") then 
                  led0<= '0';led1<= '0'; -- gruene lampe an 
             else led0<= '1';led1<= '1'; -- rote Lampe an 
             end if;
             outdata_slv <= std_logic_vector(outdata_temp);
             indata_temp  <= unsigned(indata_slv);
             outdata_temp <= unsigned(indata_slv);
             if (spiclksyn2='1') then 
                crc <= "1111111"; 
                fsmstate<=1; 
                indcnt <= 0;
             end if;              
---------------------------------------------
    elsif (fsmstate = 1) then    -- wait spiclk high
             if(fsmcnt > 1000) then 
                fsmstate<=0; ---timeout  
             elsif (spiclksyn2='1') then -- yes rising edge
                  spimisosyn1 <= outdata_slv(15-indcnt);
                  fsmstate<=2;
                  fsmcnt <= 0; 
                  indcnt <= indcnt +1;
                else         -- keep waiting
                  fsmcnt <= fsmcnt +1;
             end if;    
---------------------------------------------             
    elsif (fsmstate = 2) then    -- wait spiclk low
             if(fsmcnt > 1000) then 
                fsmstate<=0; ---timeout  
             elsif (spiclksyn2='0') then
                 if(indcnt < 17) then
                    --if ((crc(6) xor spimosisyn2)='1') then  
                    --      crc <= (crc(5 downto 0)&'0') xor "0001001";
                    --else  crc <= (crc(5 downto 0)&'0') ;
                    --end if;
                    if ((crc(0) xor spimosisyn2)='1') then  
                          crc <= ('0' & crc(6 downto 1)) xor "1001000";
                    else  crc <= ('0' & crc(6 downto 1)) ;
                    end if;
                    indata_slv(15-(indcnt-1)) <= spimosisyn2; 
                    fsmstate<=1;  -- wait for high, letzte Mal passiert timeout
                    fsmcnt <= 0; 
                  else --fettich hier gehts nie hin
                     fsmstate<=0; -- idle again
                  end if;   
                else   
                  fsmcnt <= fsmcnt +1;
             end if;    

---------------------------------------------             
---------------------------------------------


    else   fsmstate <= 0;          
    end if;
-----Ende statemachine ---------------------

-- hier die Zuweisungen
 spimiso <= spimisosyn1; 
 --led0    <= '1'; 
 --led1    <= '0'; 

end process;

        
end Behavioral;