#define F_CPU 8000000UL #include "sam.h" extern uint32_t _estack; //0x20000400 (SRAM begin + STACK size) int main(void); void syst(void); static void uart_init(); static void uart_send(char c); static void uart_string(char *s); uint8_t uart_receive(void); void tester(uint32_t wert); void fault(void); static uint32_t array[] = {0x61c4, 0x2300, 0x469f}; //1, Toggle LED 2, load rgister with main Adress 3, return main //----------------------------------------------------------------------------- __attribute__ ((section(".vectors"))) const uint32_t table[] = { (uint32_t)&_estack, //First, initialisize Stack (int) main, //Call after Reset (and Stack) 0, //pfnNonMaskableInt_Handler (void*) fault, //HardFault 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, (void*) syst //Interrupt Systick }; //----------------------------------------------------------------------------- int main(void) { // Switch to 8MHz clock (disable prescaler) SYSCTRL->OSC8M.bit.PRESC = 0; // Turn on clock for PORT in BRIDGE B PM->APBBMASK.reg |= PM_APBBMASK_PORT; uart_init(9600); uart_string("RUN\r\n"); array[2] = 0x1234; uint32_t xx = 0x20000000 - 1; PORT->Group[0].DIRSET.bit.DIRSET = PORT_PA05; SysTick_Config(8000000UL); uint8_t rec; uint32_t test = 0; while (1) { if((SERCOM0->USART.INTFLAG.reg & SERCOM_USART_INTFLAG_RXC)) { rec = SERCOM0->USART.DATA.reg; switch(rec) { case 'x': PORT->Group[0].OUTTGL.bit.OUTTGL = PORT_PA05; break; //case 'a': uart_string("PP: "); tester((uint32_t)*xx); uart_string("\r\n"); uart_string("PA: "); tester((uint32_t)xx); uart_string("\r\n"); break; case 'p': uart_string("EFFATA!!\r\n"); break; case 'f': asm volatile("mov PC, %0":"+r"((uint32_t)xx)); break; default: uart_string("Empfangen: "); uart_send(rec); uart_string("\r\n"); } } } } //----------------------------------------------------------------------------- void syst(void) { //PORT->Group[0].OUTTGL.bit.OUTTGL = PORT_PA05; //uart_send('#'); } //----------------------------------------------------------------------------- static void uart_init() { #define BAUDRATE 9600U uint64_t br = (uint64_t)65536 * (F_CPU - 16 * BAUDRATE) / F_CPU; //TX PORT->Group[0].DIRSET.reg = (1 << PIN_PA14); //PORT->Group[0].PINCFG[PIN_PA14].reg |= PORT_PINCFG_INEN; PORT->Group[0].PINCFG[PIN_PA14].reg |= PORT_PINCFG_PMUXEN; PORT->Group[0].PMUX[PIN_PA14>>1].bit.PMUXE = PORT_PMUX_PMUXE_C_Val; //PIN is even / gerade //RX PORT->Group[0].DIRCLR.reg = (1 << PIN_PA04); PORT->Group[0].PINCFG[PIN_PA04].reg |= PORT_PINCFG_INEN; PORT->Group[0].PINCFG[PIN_PA04].reg &= ~PORT_PINCFG_PULLEN; PORT->Group[0].PINCFG[PIN_PA04].reg |= PORT_PINCFG_PMUXEN; PORT->Group[0].PMUX[PIN_PA04>>1].bit.PMUXE = PORT_PMUX_PMUXE_C_Val; //PIN is even / gerade PM->APBCMASK.reg |= PM_APBCMASK_SERCOM0; GCLK->CLKCTRL.reg = GCLK_CLKCTRL_ID(SERCOM0_GCLK_ID_CORE) | GCLK_CLKCTRL_CLKEN | GCLK_CLKCTRL_GEN(0); SERCOM0->USART.CTRLA.reg = SERCOM_USART_CTRLA_DORD | SERCOM_USART_CTRLA_MODE_USART_INT_CLK | SERCOM_USART_CTRLA_RXPO(0) | SERCOM_USART_CTRLA_TXPO(1); //TXPO = PAD2 = 14 RXPO = PAD0 = 4 SERCOM0->USART.CTRLB.reg = SERCOM_USART_CTRLB_RXEN | SERCOM_USART_CTRLB_TXEN | SERCOM_USART_CTRLB_CHSIZE(0/*8 bits*/); SERCOM0->USART.BAUD.reg = (uint16_t)br+1; SERCOM0->USART.CTRLA.reg |= SERCOM_USART_CTRLA_ENABLE; } //----------------------------------------------------------------------------- static void uart_send(char c) { while (!(SERCOM0->USART.INTFLAG.reg & SERCOM_USART_INTFLAG_DRE)); SERCOM0->USART.DATA.reg = c; } //----------------------------------------------------------------------------- static void uart_string(char *s) { while (*s) uart_send(*s++); } //----------------------------------------------------------------------------- uint8_t uart_receive(void) { while (!(SERCOM0->USART.INTFLAG.reg & SERCOM_USART_INTFLAG_RXC)); return SERCOM0->USART.DATA.reg; } /* static char* calca32(uint32_t wert) //V2.0 { uint8_t i = 10; static char rueck[11]; while(i--) { rueck[i] = (wert % 10) + 48; wert = wert / 10; } return rueck; } */ void tester(uint32_t wert) { uint32_t i = 32; while(i--) { if(wert & (1<