Logic

Signal Name Total Pterms Total Inputs Function Block Macrocell Power Mode Slew Rate Pin Number Pin Type Pin Use Reg Init State
RAM_ADDR<0> 2 3 FB2 MC1 STD FAST 87 I/O O RESET
RAM_ADDR<10> 2 3 FB2 MC6 STD FAST 96 I/O O RESET
RAM_ADDR<11> 2 3 FB2 MC8 STD FAST 97 I/O O RESET
RAM_ADDR<1> 2 3 FB2 MC4 STD FAST 93 I/O O RESET
RAM_ADDR<2> 2 3 FB2 MC12 STD FAST 6 I/O O RESET
RAM_ADDR<3> 2 3 FB2 MC15 STD FAST 11 I/O O RESET
RAM_ADDR<4> 2 3 FB2 MC17 STD FAST 12 I/O O RESET
RAM_ADDR<5> 2 3 FB3 MC2 STD FAST 32 I/O O RESET
RAM_ADDR<6> 2 3 FB3 MC4 STD FAST 50 I/O O RESET
RAM_ADDR<7> 2 3 FB3 MC7 STD FAST 54 I/O O RESET
RAM_ADDR<8> 2 3 FB3 MC10 STD FAST 60 I/O O RESET
RAM_ADDR<9> 2 3 FB3 MC13 STD FAST 63 I/O O RESET
RAM_DATA<0> 2 2 FB3 MC16 STD FAST 65 I/O O  
RAM_DATA<1> 2 2 FB3 MC18 STD FAST 59 I/O O  
RAM_DATA<2> 2 2 FB1 MC5 STD FAST 14 I/O O  
RAM_DATA<3> 2 2 FB1 MC3 STD FAST 18 I/O O  
RAM_DATA<4> 2 2 FB1 MC1 STD FAST 16 I/O O  
RAM_DATA<5> 2 2 FB1 MC8 STD FAST 17 I/O O  
RAM_DATA<6> 2 2 FB1 MC10 STD FAST 28 I/O O  
RAM_DATA<7> 2 2 FB1 MC13 STD FAST 36 I/O O  
RAM_OE 1 1 FB1 MC15 STD FAST 29 I/O O RESET
RAM_WE 1 2 FB1 MC16 STD FAST 39 I/O O RESET
TRIGGER_N 25 25 FB4 MC5 STD FAST 67 I/O O  
address<0> 2 3 FB3 MC17 STD   58 I/O I RESET
address<10> 2 13 FB2 MC18 STD   92 I/O (b) RESET
address<11> 2 14 FB2 MC16 STD   10 I/O I RESET
address<1> 2 4 FB3 MC15 STD   56 I/O I RESET
address<2> 2 5 FB3 MC14 STD   55 I/O I RESET
address<3> 2 6 FB2 MC14 STD   9 I/O (b) RESET
address<4> 2 7 FB2 MC13 STD   8 I/O (b) RESET
address<5> 2 8 FB2 MC11 STD   4 I/O/GTS2 (b) RESET
address<6> 2 9 FB2 MC10 STD   1 I/O I RESET
address<7> 2 10 FB2 MC9 STD   99 I/O/GSR (b) RESET
address<8> 2 11 FB2 MC7 STD   3 I/O/GTS1 (b) RESET
address<9> 2 12 FB2 MC5 STD   95 I/O I RESET
countUP 3 5 FB4 MC17 STD   90 I/O I RESET
divider<0> 3 4 FB4 MC16 STD   86 I/O (b) RESET
divider<1> 4 5 FB4 MC18 STD   79 I/O (b) RESET
in_data_7_IBUF$BUF0/in_data_7_IBUF$BUF0_TRST__$INT 1 2 FB4 MC15 STD   89 I/O I