--- hi this is my free tutorial for all people how need to configure fpga:
-- 
--counter:  https://startingelectronics.org/software/VHDL-CPL...


library IEEE; use IEEE.STD_LOGIC_1164.ALL; use IEEE.STD_LOGIC_UNSIGNED.ALL;

entity top_lvl is Port (

 sysclk : in std_logic;
 button1 : in std_logic; 
 led0_b : out std_logic; -- rgb led blue
 output1 : out std_logic; -- led onboard
 output2 : out std_logic   -- led onboard

); end top_lvl;

architecture Behavioral of top_lvl is
---
signal count : STD_LOGIC_VECTOR (23 downto 0) := X"000000";
signal toggle : std_logic:='0';
signal button_internal : STD_LOGIC_VECTOR(1 DOWNTO 0);
signal debug_leds : STD_LOGIC_VECTOR(1 DOWNTO 0);
COMPONENT ila_0

PORT (
	clk : IN STD_LOGIC;


	probe0 : IN STD_LOGIC_VECTOR(1 DOWNTO 0);
	probe1 : IN STD_LOGIC_VECTOR(1 DOWNTO 0)
);
END COMPONENT  ;
------------------------------------------------------
---- ARCHITECTURE BEGIN
 begin
 myFirstILACore : ila_0
PORT MAP (
	clk => sysclk,
	probe0 =>  button_internal,
	probe1 => debug_leds
	
);

----------

led0_b <=button1; -- connect input to output..
--- connect button to debug ILA core:
button_internal(0)<=button1;
button_internal(1)<=button1;
p_led_blink : process (sysclk, count)
 variable toggle_var : std_logic := '0';

begin

 if rising_edge (sysclk) then

 count <= count + '1'; -- counting up
 if count = X"B71B00" then
    toggle <= '1'; -- set for toggling.....
    count <= X"000000";
  end if;
    if toggle = '1' then
    output1 <= not toggle_var;
    output2 <= toggle_var;
    toggle <= '0'; -- reset toggle
    debug_leds(0) <= toggle_var;
    debug_leds(1) <= not toggle_var;
    toggle_var := not toggle_var;
    end if;
    end if;
        end process p_led_blink ;

end Behavioral;