.include "inc/header.inc" .ifdef VECTAB1 ;ID for secure device .equ ID1, 0xff .equ ID2, 0xff .equ ID3, 0xff .equ ID4, 0xff .equ ID5, 0xff .equ ID6, 0xff .equ ID7, 0xff ;config byte (OFS) ;bit0 watchdog (0=on at start) .equ CFG_BYTE, 0xff ;watchdog, voltage detect and protection disabled .section .pvectors,"ax" .globl _pvec_table .globl _dummy_int _pvec_table: .long dummy_handler ;00 BRK .long dummy_handler ;01 Flash .long dummy_handler ;02 .long dummy_handler ;03 Timer RJ_1 .long dummy_handler ;04 .long dummy_handler ;05 .long dummy_handler ;06 INT4 .long dummy_handler ;07 Timer RC_0 .long dummy_handler ;08 Timer RD_0 .long dummy_handler ;09 Timer RD_1 .long __sleep_handler ;10 Timer RE .long dummy_handler ;11 UART2 transmit .long dummy_handler ;12 UART2 receive .long dummy_handler ;13 Key input .long dummy_handler ;14 ADC .long dummy_handler ;15 I2C/SPI 0 .long dummy_handler ;16 Timer RF .long _isr_transmit_uart0 ;17 UART0 transmit .long _isr_receive_uart0 ;18 UART0 receive .long _isr_transmit_uart1 ;19 UART1 transmit .long _isr_receive_uart1 ;20 UART1 receive .long dummy_handler ;21 INT2 .long dummy_handler ;22 Timer RJ_0 .long dummy_handler ;23 .long __tick_handler ;24 Timer RB2_0 .long __isr_ext1 ;25 INT1 .long dummy_handler ;26 INT3 .long dummy_handler ;27 .long dummy_handler ;28 .long __isr_ext0 ;29 INT0 .long dummy_handler ;30 UART2 collision .long dummy_handler ;31 .long dummy_handler ;32 SWI .long dummy_handler ;33 SWI .long dummy_handler ;34 SWI .long dummy_handler ;35 SWI .long dummy_handler ;36 SWI .long dummy_handler ;37 SWI .long dummy_handler ;38 SWI .long dummy_handler ;39 SWI .long dummy_handler ;40 SWI .long dummy_handler ;41 SWI .long dummy_handler ;42 .long dummy_handler ;43 Timer RG .long _can0_rxhandler ;44 CAN_0 receive .long dummy_handler ;45 CAN_0 transmit .long dummy_handler ;46 CAN_O error .long dummy_handler ;47 .long dummy_handler ;48 .long dummy_handler ;49 .long dummy_handler ;50 Voltage monitor 1 .long dummy_handler ;51 Voltage monitor 2 .long dummy_handler ;52 .long dummy_handler ;53 .long dummy_handler ;54 .long dummy_handler ;55 .long dummy_handler ;56 .long _isr_transmit_spi1 ;57 I2C/SPI 1 .long dummy_handler ;58 .long dummy_handler ;59 .long dummy_handler ;60 .long dummy_handler ;61 .long dummy_handler ;62 .long dummy_handler ;63 Timer RC_1 dummy_handler: nop reit nop nop _dummy_int: nop rts nop nop .long 0 ;filling .long 0 .long 0 .long 0 .long 0 ; .long 0 ; .long 0 ;undef instruction .short dummy_handler .byte 0x00 .byte ID1 ;overflow .short dummy_handler .byte 0x00 .byte ID2 ;BRK .short dummy_handler .byte 0x00 .byte 0x00 ;address match .short dummy_handler .byte 0x00 .byte ID3 ;single step .short dummy_handler .byte 0x00 .byte ID4 ;single monitoring (watchdog, brownout) .short dummy_handler .byte 0x00 .byte ID5 ;reserved .short dummy_handler .byte 0x00 .byte ID6 ;reserved .short dummy_handler .byte 0x00 .byte ID7 ;reserved .short _start .byte 0x00 .byte CFG_BYTE .endif