;********************************************************************** ;* automatic generated file * ;********************************************************************** ;------------------------------------------------------------------------------------ ; Processor Mode Register 0 ;------------------------------------------------------------------------------------ .equ PM0 , 0x0004 .equ PM03 , 3 ;------------------------------------------------------------------------------------ ; Processor Mode Register 1 ;------------------------------------------------------------------------------------ .equ PM1 , 0x0005 .equ PM12 , 2 ;------------------------------------------------------------------------------------ ; System Clock Control Register 0 ;------------------------------------------------------------------------------------ .equ CM0 , 0x0006 .equ CM02 , 2 .equ CM05 , 5 .equ CM06 , 6 ;------------------------------------------------------------------------------------ ; System Clock Control Register 1 ;------------------------------------------------------------------------------------ .equ CM1 , 0x0007 .equ CM10 , 0 .equ CM11 , 1 .equ CM13 , 3 .equ CM14 , 4 .equ CM16 , 6 .equ CM17 , 7 ;------------------------------------------------------------------------------------ ; Module Standby Control Register ;------------------------------------------------------------------------------------ .equ MSTCR , 0x0008 .equ MSTIIC , 3 .equ MSTTRD , 4 .equ MSTTRC , 5 .equ MSTTRG , 6 ;------------------------------------------------------------------------------------ ; System Clock Control Register 3 ;------------------------------------------------------------------------------------ .equ CM3 , 0x0009 .equ CM30 , 0 .equ CM35 , 5 .equ CM36 , 6 .equ CM37 , 7 ;------------------------------------------------------------------------------------ ; High-Speed On-Chip Oscillator Control Register 7 ;------------------------------------------------------------------------------------ .equ FRA7 , 0x0015 ;------------------------------------------------------------------------------------ ; Protect Register ;------------------------------------------------------------------------------------ .equ PRCR , 0x000A .equ PRC0 , 0 .equ PRC1 , 1 .equ PRC2 , 2 .equ PRC3 , 3 ;------------------------------------------------------------------------------------ ; Reset Source Determination Register ;------------------------------------------------------------------------------------ .equ RSTFR , 0x000B .equ CWR , 0 .equ HWR , 1 .equ SWR , 2 .equ WDR , 3 ;------------------------------------------------------------------------------------ ; Oscillation Stop Detection Register ;------------------------------------------------------------------------------------ .equ OCD , 0x000C .equ OCD0 , 0 .equ OCD1 , 1 .equ OCD2 , 2 .equ OCD3 , 3 ;------------------------------------------------------------------------------------ ; Watchdog Timer Reset Register ;------------------------------------------------------------------------------------ .equ WDTR , 0x000D ;------------------------------------------------------------------------------------ ; Watchdog Timer Start Register ;------------------------------------------------------------------------------------ .equ WDTS , 0x000E ;------------------------------------------------------------------------------------ ; Watchdog Timer Control Register ;------------------------------------------------------------------------------------ .equ WDTC , 0x000F .equ WDTC7 , 7 ;------------------------------------------------------------------------------------ ; Count Source Protection Mode Register ;------------------------------------------------------------------------------------ .equ CSPR , 0x001C .equ CSPRO , 7 ;------------------------------------------------------------------------------------ ; High-Speed On-Chip Oscillator Control Register 0 ;------------------------------------------------------------------------------------ .equ FRA0 , 0x0023 .equ FRA00 , 0 .equ FRA01 , 1 .equ FRA03 , 3 ;------------------------------------------------------------------------------------ ; High-Speed On-Chip Oscillator Control Register 1 ;------------------------------------------------------------------------------------ .equ FRA1 , 0x0024 ;------------------------------------------------------------------------------------ ; High-Speed On-Chip Oscillator Control Register 2 ;------------------------------------------------------------------------------------ .equ FRA2 , 0x0025 .equ FRA20 , 0 .equ FRA21 , 1 .equ FRA22 , 2 ;------------------------------------------------------------------------------------ ; On-Chip Reference Voltage Control Register ;------------------------------------------------------------------------------------ .equ OCVREFCR , 0x0026 .equ OCVREFAN , 0 ;------------------------------------------------------------------------------------ ; High-Speed On-Chip Oscillator Control Register 4 ;------------------------------------------------------------------------------------ .equ FRA4 , 0x0029 ;------------------------------------------------------------------------------------ ; High-Speed On-Chip Oscillator Control Register 5 ;------------------------------------------------------------------------------------ .equ FRA5 , 0x002A ;------------------------------------------------------------------------------------ ; High-Speed On-Chip Oscillator Control Register 6 ;------------------------------------------------------------------------------------ .equ FRA6 , 0x002B ;------------------------------------------------------------------------------------ ; High-Speed On-Chip Oscillator Control Register 3 ;------------------------------------------------------------------------------------ .equ FRA3 , 0x002F ;------------------------------------------------------------------------------------ ; Voltage Monitor Circuit Control Register ;------------------------------------------------------------------------------------ .equ CMPA , 0x0030 .equ IRQ1SEL , 4 .equ IRQ2SEL , 5 .equ COMPSEL , 7 ;------------------------------------------------------------------------------------ ; Voltage Monitor Circuit Edge Select Register ;------------------------------------------------------------------------------------ .equ VCAC , 0x0031 .equ VCAC1 , 1 .equ VCAC2 , 2 ;------------------------------------------------------------------------------------ ; Voltage Detect Register 1 ;------------------------------------------------------------------------------------ .equ VCA1 , 0x0033 .equ VCA13 , 3 ;------------------------------------------------------------------------------------ ; Voltage Detect Register 2 ;------------------------------------------------------------------------------------ .equ VCA2 , 0x0034 .equ VCA20 , 0 .equ VCA25 , 5 .equ VCA26 , 6 .equ VCA27 , 7 ;------------------------------------------------------------------------------------ ; Voltage Detection 1 Level Select Register ;------------------------------------------------------------------------------------ .equ VD1LS , 0x0036 .equ VD1S0 , 0 .equ VD1S1 , 1 .equ VD1S2 , 2 .equ VD1S3 , 3 ;------------------------------------------------------------------------------------ ; Voltage Monitor 0 Circuit Control Register ;------------------------------------------------------------------------------------ .equ VW0C , 0x0038 .equ VW0C0 , 0 ;------------------------------------------------------------------------------------ ; Voltage Monitor 1 Circuit Control Register ;------------------------------------------------------------------------------------ .equ VW1C , 0x0039 .equ VW1C0 , 0 .equ VW1C1 , 1 .equ VW1C2 , 2 .equ VW1C3 , 3 .equ VW1F0 , 4 .equ VW1F1 , 5 .equ VW1C7 , 7 ;------------------------------------------------------------------------------------ ; Voltage Monitor 2 Circuit Control Register ;------------------------------------------------------------------------------------ .equ VW2C , 0x003A .equ VW2C0 , 0 .equ VW2C1 , 1 .equ VW2C2 , 2 .equ VW2C3 , 3 .equ VW2F0 , 4 .equ VW2F1 , 5 .equ VW2C7 , 7 ;------------------------------------------------------------------------------------ ; DTC Activation Control Register ;------------------------------------------------------------------------------------ .equ DTCTL , 0x0080 .equ NMIF , 1 ;------------------------------------------------------------------------------------ ; DTC Activation Enable Register 0 ;------------------------------------------------------------------------------------ .equ DTCEN0 , 0x0088 .equ DTCEN00 , 0 .equ DTCEN01 , 1 .equ DTCEN02 , 2 .equ DTCEN03 , 3 .equ DTCEN04 , 4 .equ DTCEN05 , 5 .equ DTCEN06 , 6 .equ DTCEN07 , 7 ;------------------------------------------------------------------------------------ ; DTC Activation Enable Register 1 ;------------------------------------------------------------------------------------ .equ DTCEN1 , 0x0089 .equ DTCEN10 , 0 .equ DTCEN11 , 1 .equ DTCEN12 , 2 .equ DTCEN13 , 3 .equ DTCEN14 , 4 .equ DTCEN15 , 5 .equ DTCEN16 , 6 .equ DTCEN17 , 7 ;------------------------------------------------------------------------------------ ; DTC Activation Enable Register 2 ;------------------------------------------------------------------------------------ .equ DTCEN2 , 0x008A .equ DTCEN20 , 0 .equ DTCEN21 , 1 .equ DTCEN22 , 2 .equ DTCEN23 , 3 .equ DTCEN24 , 4 .equ DTCEN25 , 5 .equ DTCEN26 , 6 .equ DTCEN27 , 7 ;------------------------------------------------------------------------------------ ; DTC Activation Enable Register 3 ;------------------------------------------------------------------------------------ .equ DTCEN3 , 0x008B .equ DTCEN30 , 0 .equ DTCEN31 , 1 .equ DTCEN32 , 2 .equ DTCEN33 , 3 .equ DTCEN34 , 4 .equ DTCEN35 , 5 .equ DTCEN36 , 6 .equ DTCEN37 , 7 ;------------------------------------------------------------------------------------ ; DTC Activation Enable Register 4 ;------------------------------------------------------------------------------------ .equ DTCEN4 , 0x008C .equ DTCEN40 , 0 .equ DTCEN41 , 1 .equ DTCEN42 , 2 .equ DTCEN43 , 3 .equ DTCEN44 , 4 .equ DTCEN45 , 5 .equ DTCEN46 , 6 .equ DTCEN47 , 7 ;------------------------------------------------------------------------------------ ; DTC Activation Enable Register 5 ;------------------------------------------------------------------------------------ .equ DTCEN5 , 0x008D .equ DTCEN50 , 0 .equ DTCEN51 , 1 .equ DTCEN52 , 2 .equ DTCEN53 , 3 .equ DTCEN54 , 4 .equ DTCEN55 , 5 .equ DTCEN56 , 6 .equ DTCEN57 , 7 ;------------------------------------------------------------------------------------ ; DTC Activation Enable Register 6 ;------------------------------------------------------------------------------------ .equ DTCEN6 , 0x008E .equ DTCEN60 , 0 .equ DTCEN61 , 1 .equ DTCEN62 , 2 .equ DTCEN63 , 3 .equ DTCEN64 , 4 .equ DTCEN65 , 5 .equ DTCEN66 , 6 .equ DTCEN67 , 7 ;------------------------------------------------------------------------------------ ; Timer RF Register, Capture and Compare 0 Register, Compare 1 Register ;------------------------------------------------------------------------------------ .equ TRF , 0x0090 ;------------------------------------------------------------------------------------ ; Timer RF Register, Capture and Compare 0 Register, Compare 1 Register ;------------------------------------------------------------------------------------ .equ TRFM0 , 0x009C ;------------------------------------------------------------------------------------ ; Timer RF Register, Capture and Compare 0 Register, Compare 1 Register ;------------------------------------------------------------------------------------ .equ TRFM1 , 0x009E ;------------------------------------------------------------------------------------ ; Timer RF Control Register 0 ;------------------------------------------------------------------------------------ .equ TRFCR0 , 0x009A .equ TSTART_TRFCR0 , 0 .equ TCK0_TRFCR0 , 1 .equ TCK1_TRFCR0 , 2 .equ TRFC03_TRFCR0 , 3 .equ TRFC04_TRFCR0 , 4 .equ TRFC05_TRFCR0 , 5 .equ TRFC06_TRFCR0 , 6 ;------------------------------------------------------------------------------------ ; Timer RF Control Register 1 ;------------------------------------------------------------------------------------ .equ TRFCR1 , 0x009B .equ TIPF0_TRFCR1 , 0 .equ TIPF1_TRFCR1 , 1 .equ CCLR_TRFCR1 , 2 .equ TMOD_TRFCR1 , 3 .equ TRFC14_TRFCR1 , 4 .equ TRFC15_TRFCR1 , 5 .equ TRFC16_TRFCR1 , 6 .equ TRFC17_TRFCR1 , 7 ;------------------------------------------------------------------------------------ ; UART0 Bit Rate Register ;------------------------------------------------------------------------------------ .equ U0BRG , 0x00A1 ;------------------------------------------------------------------------------------ ; UART2 Bit Rate Register ;------------------------------------------------------------------------------------ .equ U2BRG , 0x00A9 ;------------------------------------------------------------------------------------ ; UART2 Degital Filter Function Select Register ;------------------------------------------------------------------------------------ .equ URXDF , 0x00B0 .equ DF2EN , 2 ;------------------------------------------------------------------------------------ ; UART2 Special Mode Register 5 ;------------------------------------------------------------------------------------ .equ U2SMR5 , 0x00BB .equ MP , 0 .equ MPIE , 4 ;------------------------------------------------------------------------------------ ; UART2 Special Mode Register 4 ;------------------------------------------------------------------------------------ .equ U2SMR4 , 0x00BC .equ STAREQ , 0 .equ RSTAREQ , 1 .equ STPREQ , 2 .equ STSPSEL , 3 .equ ACKD , 4 .equ ACKC , 5 .equ SCLHI , 6 .equ SWC9 , 7 ;------------------------------------------------------------------------------------ ; UART2 Special Mode Register 3 ;------------------------------------------------------------------------------------ .equ U2SMR3 , 0x00BD .equ CKPH , 1 .equ NODC , 3 .equ DL0 , 5 .equ DL1 , 6 .equ DL2 , 7 ;------------------------------------------------------------------------------------ ; UART2 Special Mode Register 2 ;------------------------------------------------------------------------------------ .equ U2SMR2 , 0x00BE .equ IICM2 , 0 .equ CSC , 1 .equ SWC , 2 .equ STAC , 4 .equ SWC2 , 5 .equ SDHI , 6 ;------------------------------------------------------------------------------------ ; UART2 Special Mode Register ;------------------------------------------------------------------------------------ .equ U2SMR , 0x00BF .equ IICM , 0 .equ BBS , 2 .equ ABSCS , 4 .equ ACSE , 5 .equ SSS , 6 ;------------------------------------------------------------------------------------ ; A/D Mode Register ;------------------------------------------------------------------------------------ .equ ADMOD , 0x00D4 .equ CKS0 , 0 .equ CKS1 , 1 .equ CKS2 , 2 .equ MD0 , 3 .equ MD1 , 4 .equ MD2 , 5 .equ ADCAP0 , 6 .equ ADCAP1 , 7 ;------------------------------------------------------------------------------------ ; A/D Input Select Register ;------------------------------------------------------------------------------------ .equ ADINSEL , 0x00D5 .equ CH0 , 0 .equ CH1 , 1 .equ CH2 , 2 .equ SCAN0 , 4 .equ SCAN1 , 5 .equ ADGSEL0 , 6 .equ ADGSEL1 , 7 ;------------------------------------------------------------------------------------ ; A/D Control Register 0 ;------------------------------------------------------------------------------------ .equ ADCON0 , 0x00D6 .equ ADST , 0 ;------------------------------------------------------------------------------------ ; A/D Control Register1 ;------------------------------------------------------------------------------------ .equ ADCON1 , 0x00D7 .equ ADEX0 , 0 .equ ADEX1 , 1 .equ ADEX2 , 2 .equ BITS , 4 .equ ADSTBY , 5 .equ ADDDAEN , 6 .equ ADDDAEL , 7 ;------------------------------------------------------------------------------------ ; Port P0 Register ;------------------------------------------------------------------------------------ .equ P0 , 0x00E0 .equ P0_0 , 0 .equ P0_1 , 1 .equ P0_2 , 2 .equ P0_3 , 3 .equ P0_4 , 4 .equ P0_5 , 5 .equ P0_6 , 6 .equ P0_7 , 7 ;------------------------------------------------------------------------------------ ; Port P1 Direction Register ;------------------------------------------------------------------------------------ .equ PD0 , 0x00E2 .equ PD0_0 , 0 .equ PD0_1 , 1 .equ PD0_2 , 2 .equ PD0_3 , 3 .equ PD0_4 , 4 .equ PD0_5 , 5 .equ PD0_6 , 6 .equ PD0_7 , 7 ;------------------------------------------------------------------------------------ ; Port P1 Register ;------------------------------------------------------------------------------------ .equ P1 , 0x00E1 .equ P1_0 , 0 .equ P1_1 , 1 .equ P1_2 , 2 .equ P1_3 , 3 .equ P1_4 , 4 .equ P1_5 , 5 .equ P1_6 , 6 .equ P1_7 , 7 ;------------------------------------------------------------------------------------ ; Port P1 Direction Register ;------------------------------------------------------------------------------------ .equ PD1 , 0x00E3 .equ PD1_0 , 0 .equ PD1_1 , 1 .equ PD1_2 , 2 .equ PD1_3 , 3 .equ PD1_4 , 4 .equ PD1_5 , 5 .equ PD1_6 , 6 .equ PD1_7 , 7 ;------------------------------------------------------------------------------------ ; Port P2 Register ;------------------------------------------------------------------------------------ .equ P2 , 0x00E4 .equ P2_0 , 0 .equ P2_1 , 1 .equ P2_2 , 2 .equ P2_3 , 3 .equ P2_4 , 4 .equ P2_5 , 5 .equ P2_6 , 6 .equ P2_7 , 7 ;------------------------------------------------------------------------------------ ; Port P2 Direction Register ;------------------------------------------------------------------------------------ .equ PD2 , 0x00E6 .equ PD2_0 , 0 .equ PD2_1 , 1 .equ PD2_2 , 2 .equ PD2_3 , 3 .equ PD2_4 , 4 .equ PD2_5 , 5 .equ PD2_6 , 6 .equ PD2_7 , 7 ;------------------------------------------------------------------------------------ ; Port P3 Register ;------------------------------------------------------------------------------------ .equ P3 , 0x00E5 .equ P3_0 , 0 .equ P3_1 , 1 .equ P3_2 , 2 .equ P3_3 , 3 .equ P3_4 , 4 .equ P3_5 , 5 .equ P3_6 , 6 .equ P3_7 , 7 ;------------------------------------------------------------------------------------ ; Port P3 Direction Register ;------------------------------------------------------------------------------------ .equ PD3 , 0x00E7 .equ PD3_0 , 0 .equ PD3_1 , 1 .equ PD3_2 , 2 .equ PD3_3 , 3 .equ PD3_4 , 4 .equ PD3_5 , 5 .equ PD3_6 , 6 .equ PD3_7 , 7 ;------------------------------------------------------------------------------------ ; Port P4 Register ;------------------------------------------------------------------------------------ .equ P4 , 0x00E8 .equ P4_2 , 2 .equ P4_3 , 3 .equ P4_4 , 4 .equ P4_5 , 5 .equ P4_6 , 6 .equ P4_7 , 7 ;------------------------------------------------------------------------------------ ; Port P5 Register ;------------------------------------------------------------------------------------ .equ P5 , 0x00E9 .equ P5_0 , 0 .equ P5_1 , 1 .equ P5_2 , 2 .equ P5_3 , 3 .equ P5_4 , 4 .equ P5_6 , 6 .equ P5_7 , 7 ;------------------------------------------------------------------------------------ ; Port P4 Direction Register ;------------------------------------------------------------------------------------ .equ PD4 , 0x00EA .equ PD4_3 , 3 .equ PD4_4 , 4 .equ PD4_5 , 5 .equ PD4_6 , 6 .equ PD4_7 , 7 ;------------------------------------------------------------------------------------ ; Port P5 Direction Register ;------------------------------------------------------------------------------------ .equ PD5 , 0x00EB .equ PD5_0 , 0 .equ PD5_1 , 1 .equ PD5_2 , 2 .equ PD5_3 , 3 .equ PD5_4 , 4 .equ PD5_6 , 6 .equ PD5_7 , 7 ;------------------------------------------------------------------------------------ ; Port P6 Register ;------------------------------------------------------------------------------------ .equ P6 , 0x00EC .equ P6_0 , 0 .equ P6_1 , 1 .equ P6_2 , 2 .equ P6_3 , 3 .equ P6_4 , 4 .equ P6_5 , 5 .equ P6_6 , 6 .equ P6_7 , 7 ;------------------------------------------------------------------------------------ ; Port P6 Direction Register ;------------------------------------------------------------------------------------ .equ PD6 , 0x00EE .equ PD6_0 , 0 .equ PD6_1 , 1 .equ PD6_2 , 2 .equ PD6_3 , 3 .equ PD6_4 , 4 .equ PD6_5 , 5 .equ PD6_6 , 6 .equ PD6_7 , 7 ;------------------------------------------------------------------------------------ ; Port P8 Register ;------------------------------------------------------------------------------------ .equ P8 , 0x00F0 .equ P8_0 , 0 .equ P8_1 , 1 .equ P8_2 , 2 .equ P8_3 , 3 .equ P8_4 , 4 .equ P8_5 , 5 .equ P8_6 , 6 ;------------------------------------------------------------------------------------ ; Port P8 Direction Register ;------------------------------------------------------------------------------------ .equ PD8 , 0x00F2 .equ PD8_0 , 0 .equ PD8_1 , 1 .equ PD8_2 , 2 .equ PD8_3 , 3 .equ PD8_4 , 4 .equ PD8_5 , 5 .equ PD8_6 , 6 ;------------------------------------------------------------------------------------ ; Timer RA0 Control Register ;------------------------------------------------------------------------------------ .equ TRA0CR , 0x0100 .equ TSTART_TRA0CR , 0 .equ TCSTF_TRA0CR , 1 .equ TSTOP_TRA0CR , 2 .equ TEDGF_TRA0CR , 4 .equ TUNDF_TRA0CR , 5 ;------------------------------------------------------------------------------------ ; Timer RA0 I/O Control Register ;------------------------------------------------------------------------------------ .equ TRA0IOC , 0x0101 .equ TEDGSEL_TRA0IOC , 0 .equ TOPCR_TRA0IOC , 1 .equ TOENA_TRA0IOC , 2 .equ TIOSEL_TRA0IOC , 3 .equ TIPF0_TRA0IOC , 4 .equ TIPF1_TRA0IOC , 5 .equ TIOGT0_TRA0IOC , 6 .equ TIOGT1_TRA0IOC , 7 ;------------------------------------------------------------------------------------ ; Timer RA0 Mode Register ;------------------------------------------------------------------------------------ .equ TRA0MR , 0x0102 .equ TMOD0_TRA0MR , 0 .equ TMOD1_TRA0MR , 1 .equ TMOD2_TRA0MR , 2 .equ TCK0_TRA0MR , 4 .equ TCK1_TRA0MR , 5 .equ TCK2_TRA0MR , 6 .equ TCKCUT_TRA0MR , 7 ;------------------------------------------------------------------------------------ ; Timer RA0 Prescaler Register ;------------------------------------------------------------------------------------ .equ TRA0PRE , 0x0103 ;------------------------------------------------------------------------------------ ; Timer RA0 Register ;------------------------------------------------------------------------------------ .equ TRA0 , 0x0104 ;------------------------------------------------------------------------------------ ; LIN0 Control Register 2 ;------------------------------------------------------------------------------------ .equ LIN0CR2 , 0x0105 .equ BCE_LIN0CR2 , 0 ;------------------------------------------------------------------------------------ ; LIN0 Control Register ;------------------------------------------------------------------------------------ .equ LIN0CR , 0x0106 .equ SFIE_LIN0CR , 0 .equ SBIE_LIN0CR , 1 .equ BCIE_LIN0CR , 2 .equ RXDSF_LIN0CR , 3 .equ LSTART_LIN0CR , 4 .equ SBE_LIN0CR , 5 .equ MST_LIN0CR , 6 .equ LINE_LIN0CR , 7 ;------------------------------------------------------------------------------------ ; LIN0 Status Register ;------------------------------------------------------------------------------------ .equ LIN0ST , 0x0107 .equ SFDCT_LIN0ST , 0 .equ SBDCT_LIN0ST , 1 .equ BCDCT_LIN0ST , 2 .equ B0CLR_LIN0ST , 3 .equ B1CLR_LIN0ST , 4 .equ B2CLR_LIN0ST , 5 ;------------------------------------------------------------------------------------ ; Timer RB Control Register ;------------------------------------------------------------------------------------ .equ TRBCR , 0x0108 .equ TSTART_TRBCR , 0 .equ TCSTF_TRBCR , 1 .equ TSTOP_TRBCR , 2 ;------------------------------------------------------------------------------------ ; Timer RB One-Shot Control Register ;------------------------------------------------------------------------------------ .equ TRBOCR , 0x0109 .equ TOSST_TRBOCR , 0 .equ TOSSP_TRBOCR , 1 .equ TOSSTF_TRBOCR , 2 ;------------------------------------------------------------------------------------ ; Timer RB I/O Control Register ;------------------------------------------------------------------------------------ .equ TRBIOC , 0x010A .equ TOPL_TRBIOC , 0 .equ TOCNT_TRBIOC , 1 .equ INOSTG_TRBIOC , 2 .equ INOSEG_TRBIOC , 3 ;------------------------------------------------------------------------------------ ; Timer RB Mode Register ;------------------------------------------------------------------------------------ .equ TRBMR , 0x010B .equ TMOD0_TRBMR , 0 .equ TMOD1_TRBMR , 1 .equ TWRC_TRBMR , 3 .equ TCK0_TRBMR , 4 .equ TCK1_TRBMR , 5 .equ TCKCUT_TRBMR , 7 ;------------------------------------------------------------------------------------ ; Timer RB Prescaler Register ;------------------------------------------------------------------------------------ .equ TRBPRE , 0x010C ;------------------------------------------------------------------------------------ ; Timer RB Secondary Register ;------------------------------------------------------------------------------------ .equ TRBSC , 0x010D ;------------------------------------------------------------------------------------ ; Timer RB Primary Register ;------------------------------------------------------------------------------------ .equ TRBPR , 0x010E ;------------------------------------------------------------------------------------ ; Timer RA1 Control Register ;------------------------------------------------------------------------------------ .equ TRA1CR , 0x0110 .equ TSTART_TRA1CR , 0 .equ TCSTF_TRA1CR , 1 .equ TSTOP_TRA1CR , 2 .equ TEDGF_TRA1CR , 4 .equ TUNDF_TRA1CR , 5 ;------------------------------------------------------------------------------------ ; Timer RA1 I/O Control Register ;------------------------------------------------------------------------------------ .equ TRA1IOC , 0x0111 .equ TEDGSEL_TRA1IOC , 0 .equ TOPCR_TRA1IOC , 1 .equ TOENA_TRA1IOC , 2 .equ TIOSEL_TRA1IOC , 3 .equ TIPF0_TRA1IOC , 4 .equ TIPF1_TRA1IOC , 5 .equ TIOGT0_TRA1IOC , 6 .equ TIOGT1_TRA1IOC , 7 ;------------------------------------------------------------------------------------ ; Timer RA1 Mode Register ;------------------------------------------------------------------------------------ .equ TRA1MR , 0x0112 .equ TMOD0_TRA1MR , 0 .equ TMOD1_TRA1MR , 1 .equ TMOD2_TRA1MR , 2 .equ TCK0_TRA1MR , 4 .equ TCK1_TRA1MR , 5 .equ TCK2_TRA1MR , 6 .equ TCKCUT_TRA1MR , 7 ;------------------------------------------------------------------------------------ ; Timer RA1 Prescaler Register ;------------------------------------------------------------------------------------ .equ TRA1PRE , 0x0113 ;------------------------------------------------------------------------------------ ; Timer RA1 Register ;------------------------------------------------------------------------------------ .equ TRA1 , 0x0114 ;------------------------------------------------------------------------------------ ; LIN1 Control Register 2 ;------------------------------------------------------------------------------------ .equ LIN1CR2 , 0x0115 .equ BCE_LIN1CR2 , 0 ;------------------------------------------------------------------------------------ ; LIN1 Control Register ;------------------------------------------------------------------------------------ .equ LIN1CR , 0x0116 .equ SFIE_LIN1CR , 0 .equ SBIE_LIN1CR , 1 .equ BCIE_LIN1CR , 2 .equ RXDSF_LIN1CR , 3 .equ LSTART_LIN1CR , 4 .equ SBE_LIN1CR , 5 .equ MST_LIN1CR , 6 .equ LINE_LIN1CR , 7 ;------------------------------------------------------------------------------------ ; LIN1 Status Register ;------------------------------------------------------------------------------------ .equ LIN1ST , 0x0117 .equ SFDCT_LIN1ST , 0 .equ SBDCT_LIN1ST , 1 .equ BCDCT_LIN1ST , 2 .equ B0CLR_LIN1ST , 3 .equ B1CLR_LIN1ST , 4 .equ B2CLR_LIN1ST , 5 ;------------------------------------------------------------------------------------ ; Timer RE Counter Data Register ;------------------------------------------------------------------------------------ .equ TRESEC , 0x0118 ;------------------------------------------------------------------------------------ ; Timer RE Compare Data Register ;------------------------------------------------------------------------------------ .equ TREMIN , 0x0119 ;------------------------------------------------------------------------------------ ; Timer RE Control Register 1 ;------------------------------------------------------------------------------------ .equ TRECR1 , 0x011C .equ TCSTF_TRECR1 , 1 .equ TOENA_TRECR1 , 2 .equ TRERST_TRECR1 , 4 .equ TSTART_TRECR1 , 7 ;------------------------------------------------------------------------------------ ; Timer RE Control Register 2 ;------------------------------------------------------------------------------------ .equ TRECR2 , 0x011D .equ COMIE_TRECR2 , 5 ;------------------------------------------------------------------------------------ ; Timer RE Count Source Select Register ;------------------------------------------------------------------------------------ .equ TRECSR , 0x011E .equ RCS0_TRECSR , 0 .equ RCS1_TRECSR , 1 .equ RCS2_TRECSR , 2 .equ RCS3_TRECSR , 3 .equ RCS4_TRECSR , 4 .equ RCS5_TRECSR , 5 .equ RCS6_TRECSR , 6 ;------------------------------------------------------------------------------------ ; Timer RC Mode Register ;------------------------------------------------------------------------------------ .equ TRCMR , 0x0120 .equ PWMB_TRCMR , 0 .equ PWMC_TRCMR , 1 .equ PWMD_TRCMR , 2 .equ PWM2_TRCMR , 3 .equ BFC_TRCMR , 4 .equ BFD_TRCMR , 5 .equ TSTART_TRCMR , 7 ;------------------------------------------------------------------------------------ ; Timer RC Control Register 1 ;------------------------------------------------------------------------------------ .equ TRCCR1 , 0x0121 .equ TOA_TRCCR1 , 0 .equ TOB_TRCCR1 , 1 .equ TOC_TRCCR1 , 2 .equ TOD_TRCCR1 , 3 .equ TCK0_TRCCR1 , 4 .equ TCK1_TRCCR1 , 5 .equ TCK2_TRCCR1 , 6 .equ CCLR_TRCCR1 , 7 ;------------------------------------------------------------------------------------ ; Timer RC Interrupt Enable Register ;------------------------------------------------------------------------------------ .equ TRCIER , 0x0122 .equ IMIEA_TRCIER , 0 .equ IMIEB_TRCIER , 1 .equ IMIEC_TRCIER , 2 .equ IMIED_TRCIER , 3 .equ OVIE_TRCIER , 7 ;------------------------------------------------------------------------------------ ; Timer RC Status Register ;------------------------------------------------------------------------------------ .equ TRCSR , 0x0123 .equ IMFA_TRCSR , 0 .equ IMFB_TRCSR , 1 .equ IMFC_TRCSR , 2 .equ IMFD_TRCSR , 3 .equ OVF_TRCSR , 7 ;------------------------------------------------------------------------------------ ; Timer RC I/O Contorol Register 0 ;------------------------------------------------------------------------------------ .equ TRCIOR0 , 0x0124 .equ IOA0_TRCIOR0 , 0 .equ IOA1_TRCIOR0 , 1 .equ IOA2_TRCIOR0 , 2 .equ IOA3_TRCIOR0 , 3 .equ IOB0_TRCIOR0 , 4 .equ IOB1_TRCIOR0 , 5 .equ IOB2_TRCIOR0 , 6 ;------------------------------------------------------------------------------------ ; Timer RC I/O Contorol Register 1 ;------------------------------------------------------------------------------------ .equ TRCIOR1 , 0x0125 .equ IOC0_TRCIOR1 , 0 .equ IOC1_TRCIOR1 , 1 .equ IOC2_TRCIOR1 , 2 .equ IOC3_TRCIOR1 , 3 .equ IOD0_TRCIOR1 , 4 .equ IOD1_TRCIOR1 , 5 .equ IOD2_TRCIOR1 , 6 .equ IOD3_TRCIOR1 , 7 ;------------------------------------------------------------------------------------ ; Timer RC Control Register 2 ;------------------------------------------------------------------------------------ .equ TRCCR2 , 0x0130 .equ POLB_TRCCR2 , 0 .equ POLC_TRCCR2 , 1 .equ POLD_TRCCR2 , 2 .equ CSEL_TRCCR2 , 5 .equ TCEG0_TRCCR2 , 6 .equ TCEG1_TRCCR2 , 7 ;------------------------------------------------------------------------------------ ; Timer RC Digital Filter Function Select Register ;------------------------------------------------------------------------------------ .equ TRCDF , 0x0131 .equ DFA_TRCDF , 0 .equ DFB_TRCDF , 1 .equ DFC_TRCDF , 2 .equ DFD_TRCDF , 3 .equ DFTRG_TRCDF , 4 .equ DFCK0_TRCDF , 6 .equ DFCK1_TRCDF , 7 ;------------------------------------------------------------------------------------ ; Timer RC Output Master Enable Register ;------------------------------------------------------------------------------------ .equ TRCOER , 0x0132 .equ EA_TRCOER , 0 .equ EB_TRCOER , 1 .equ EC_TRCOER , 2 .equ ED_TRCOER , 3 .equ PTO_TRCOER , 7 ;------------------------------------------------------------------------------------ ; Timer RC Trigger Control Register ;------------------------------------------------------------------------------------ .equ TRCADCR , 0x0133 .equ ADTRGAE_TRCADCR , 0 .equ ADTRGBE_TRCADCR , 1 .equ ADTRGCE_TRCADCR , 2 .equ ADTRGDE_TRCADCR , 3 ;------------------------------------------------------------------------------------ ; Timer RD Trigger Control Register ;------------------------------------------------------------------------------------ .equ TRDADCR , 0x0136 .equ ADTRGA0E_TRDADCR , 0 .equ ADTRGB0E_TRDADCR , 1 .equ ADTRGC0E_TRDADCR , 2 .equ ADTRGD0E_TRDADCR , 3 .equ ADTRGA1E_TRDADCR , 4 .equ ADTRGB1E_TRDADCR , 5 .equ ADTRGC1E_TRDADCR , 6 .equ ADTRGD1E_TRDADCR , 7 ;------------------------------------------------------------------------------------ ; Timer RD Start Register ;------------------------------------------------------------------------------------ .equ TRDSTR , 0x0137 .equ TSTART0_TRDSTR , 0 .equ TSTART1_TRDSTR , 1 .equ CSEL0_TRDSTR , 2 .equ CSEL1_TRDSTR , 3 ;------------------------------------------------------------------------------------ ; Timer RD Mode Register ;------------------------------------------------------------------------------------ .equ TRDMR , 0x0138 .equ SYNC_TRDMR , 0 .equ BFC0_TRDMR , 4 .equ BFD0_TRDMR , 5 .equ BFC1_TRDMR , 6 .equ BFD1_TRDMR , 7 ;------------------------------------------------------------------------------------ ; Timer RD PWM Mode Register ;------------------------------------------------------------------------------------ .equ TRDPMR , 0x0139 .equ PWMB0_TRDPMR , 0 .equ PWMC0_TRDPMR , 1 .equ PWMD0_TRDPMR , 2 .equ PWMB1_TRDPMR , 4 .equ PWMC1_TRDPMR , 5 .equ PWMD1_TRDPMR , 6 ;------------------------------------------------------------------------------------ ; Timer RD Function Control Register ;------------------------------------------------------------------------------------ .equ TRDFCR , 0x013A .equ CMD0_TRDFCR , 0 .equ CMD1_TRDFCR , 1 .equ OLS0_TRDFCR , 2 .equ OLS1_TRDFCR , 3 .equ ADTRG_TRDFCR , 4 .equ ADEG_TRDFCR , 5 .equ STCLK_TRDFCR , 6 .equ PWM3_TRDFCR , 7 ;------------------------------------------------------------------------------------ ; Timer RD Output Master Enable Register 1 ;------------------------------------------------------------------------------------ .equ TRDOER1 , 0x013B .equ EA0_TRDOER1 , 0 .equ EB0_TRDOER1 , 1 .equ EC0_TRDOER1 , 2 .equ ED0_TRDOER1 , 3 .equ EA1_TRDOER1 , 4 .equ EB1_TRDOER1 , 5 .equ EC1_TRDOER1 , 6 .equ ED1_TRDOER1 , 7 ;------------------------------------------------------------------------------------ ; Timer RD Output Master Enable Register 2 ;------------------------------------------------------------------------------------ .equ TRDOER2 , 0x013C .equ PTO_TRDOER2 , 7 ;------------------------------------------------------------------------------------ ; Timer RD Output Control Register ;------------------------------------------------------------------------------------ .equ TRDOCR , 0x013D .equ TOA0_TRDOCR , 0 .equ TOB0_TRDOCR , 1 .equ TOC0_TRDOCR , 2 .equ TOD0_TRDOCR , 3 .equ TOA1_TRDOCR , 4 .equ TOB1_TRDOCR , 5 .equ TOC1_TRDOCR , 6 .equ TOD1_TRDOCR , 7 ;------------------------------------------------------------------------------------ ; Timer RD Digital Filter Function Select Register 0 ;------------------------------------------------------------------------------------ .equ TRDDF0 , 0x013E .equ DFA_TRDDF0 , 0 .equ DFB_TRDDF0 , 1 .equ DFC_TRDDF0 , 2 .equ DFD_TRDDF0 , 3 .equ DFCK0_TRDDF0 , 6 .equ DFCK1_TRDDF0 , 7 ;------------------------------------------------------------------------------------ ; Timer RD Digital Filter Function Select Register 1 ;------------------------------------------------------------------------------------ .equ TRDDF1 , 0x013F .equ DFA_TRDDF1 , 0 .equ DFB_TRDDF1 , 1 .equ DFC_TRDDF1 , 2 .equ DFD_TRDDF1 , 3 .equ DFCK0_TRDDF1 , 6 .equ DFCK1_TRDDF1 , 7 ;------------------------------------------------------------------------------------ ; Timer RD Control Register 0 ;------------------------------------------------------------------------------------ .equ TRDCR0 , 0x0140 .equ TCK0_TRDCR0 , 0 .equ TCK1_TRDCR0 , 1 .equ TCK2_TRDCR0 , 2 .equ CKEG0_TRDCR0 , 3 .equ CKEG1_TRDCR0 , 4 .equ CCLR0_TRDCR0 , 5 .equ CCLR1_TRDCR0 , 6 .equ CCLR2_TRDCR0 , 7 ;------------------------------------------------------------------------------------ ; Timer RD I/O Control Register A0 ;------------------------------------------------------------------------------------ .equ TRDIORA0 , 0x0141 .equ IOA0_TRDIORA0 , 0 .equ IOA1_TRDIORA0 , 1 .equ IOA2_TRDIORA0 , 2 .equ IOA3_TRDIORA0 , 3 .equ IOB0_TRDIORA0 , 4 .equ IOB1_TRDIORA0 , 5 .equ IOB2_TRDIORA0 , 6 ;------------------------------------------------------------------------------------ ; Timer RD I/O Control Register C0 ;------------------------------------------------------------------------------------ .equ TRDIORC0 , 0x0142 .equ IOC0_TRDIORC0 , 0 .equ IOC1_TRDIORC0 , 1 .equ IOC2_TRDIORC0 , 2 .equ IOC3_TRDIORC0 , 3 .equ IOD0_TRDIORC0 , 4 .equ IOD1_TRDIORC0 , 5 .equ IOD2_TRDIORC0 , 6 .equ IOD3_TRDIORC0 , 7 ;------------------------------------------------------------------------------------ ; Timer RD Status Register 0 ;------------------------------------------------------------------------------------ .equ TRDSR0 , 0x0143 .equ IMFA_TRDSR0 , 0 .equ IMFB_TRDSR0 , 1 .equ IMFC_TRDSR0 , 2 .equ IMFD_TRDSR0 , 3 .equ OVF_TRDSR0 , 4 .equ UDF_TRDSR0 , 5 ;------------------------------------------------------------------------------------ ; Timer RD Interrupt Enable Register 0 ;------------------------------------------------------------------------------------ .equ TRDIER0 , 0x0144 .equ IMIEA_TRDIER0 , 0 .equ IMIEB_TRDIER0 , 1 .equ IMIEC_TRDIER0 , 2 .equ IMIED_TRDIER0 , 3 .equ OVIE_TRDIER0 , 4 ;------------------------------------------------------------------------------------ ; Timer RD PWM Mode Output Level Control Register 0 ;------------------------------------------------------------------------------------ .equ TRDPOCR0 , 0x0145 .equ POLB_TRDPOCR0 , 0 .equ POLC_TRDPOCR0 , 1 .equ POLD_TRDPOCR0 , 2 ;------------------------------------------------------------------------------------ ; Timer RD Control Register 1 ;------------------------------------------------------------------------------------ .equ TRDCR1 , 0x0150 .equ TCK0_TRDCR1 , 0 .equ TCK1_TRDCR1 , 1 .equ TCK2_TRDCR1 , 2 .equ CKEG0_TRDCR1 , 3 .equ CKEG1_TRDCR1 , 4 .equ CCLR0_TRDCR1 , 5 .equ CCLR1_TRDCR1 , 6 .equ CCLR2_TRDCR1 , 7 ;------------------------------------------------------------------------------------ ; Timer RD I/O Control Register A1 ;------------------------------------------------------------------------------------ .equ TRDIORA1 , 0x0151 .equ IOA0_TRDIORA1 , 0 .equ IOA1_TRDIORA1 , 1 .equ IOA2_TRDIORA1 , 2 .equ IOA3_TRDIORA1 , 3 .equ IOB0_TRDIORA1 , 4 .equ IOB1_TRDIORA1 , 5 .equ IOB2_TRDIORA1 , 6 ;------------------------------------------------------------------------------------ ; Timer RD I/O Control Register C1 ;------------------------------------------------------------------------------------ .equ TRDIORC1 , 0x0152 .equ IOC0_TRDIORC1 , 0 .equ IOC1_TRDIORC1 , 1 .equ IOC2_TRDIORC1 , 2 .equ IOC3_TRDIORC1 , 3 .equ IOD0_TRDIORC1 , 4 .equ IOD1_TRDIORC1 , 5 .equ IOD2_TRDIORC1 , 6 .equ IOD3_TRDIORC1 , 7 ;------------------------------------------------------------------------------------ ; Timer RD Status Register 1 ;------------------------------------------------------------------------------------ .equ TRDSR1 , 0x0153 .equ IMFA_TRDSR1 , 0 .equ IMFB_TRDSR1 , 1 .equ IMFC_TRDSR1 , 2 .equ IMFD_TRDSR1 , 3 .equ OVF_TRDSR1 , 4 .equ UDF_TRDSR1 , 5 ;------------------------------------------------------------------------------------ ; Timer RD Interrupt Enable Register 1 ;------------------------------------------------------------------------------------ .equ TRDIER1 , 0x0154 .equ IMIEA_TRDIER1 , 0 .equ IMIEB_TRDIER1 , 1 .equ IMIEC_TRDIER1 , 2 .equ IMIED_TRDIER1 , 3 .equ OVIE_TRDIER1 , 4 ;------------------------------------------------------------------------------------ ; Timer RD PWM Mode Output Level Control Register 1 ;------------------------------------------------------------------------------------ .equ TRDPOCR1 , 0x0155 .equ POLB_TRDPOCR1 , 0 .equ POLC_TRDPOCR1 , 1 .equ POLD_TRDPOCR1 , 2 ;------------------------------------------------------------------------------------ ; UART1 Bit Rate Register ;------------------------------------------------------------------------------------ .equ U1BRG , 0x0161 ;------------------------------------------------------------------------------------ ; Timer RG Mode Register ;------------------------------------------------------------------------------------ .equ TRGMR , 0x0170 .equ PWM_TRGMR , 0 .equ MDF_TRGMR , 1 .equ DFA_TRGMR , 2 .equ DFB_TRGMR , 3 .equ DFCK0_TRGMR , 4 .equ DFCK1_TRGMR , 5 .equ TSTART_TRGMR , 7 ;------------------------------------------------------------------------------------ ; Timer RG Counter Control Register ;------------------------------------------------------------------------------------ .equ TRGCNTC , 0x0171 .equ CNTEN0_TRGCNTC , 0 .equ CNTEN1_TRGCNTC , 1 .equ CNTEN2_TRGCNTC , 2 .equ CNTEN3_TRGCNTC , 3 .equ CNTEN4_TRGCNTC , 4 .equ CNTEN5_TRGCNTC , 5 .equ CNTEN6_TRGCNTC , 6 .equ CNTEN7_TRGCNTC , 7 ;------------------------------------------------------------------------------------ ; Timer RG Control Register ;------------------------------------------------------------------------------------ .equ TRGCR , 0x0172 .equ TCK0_TRGCR , 0 .equ TCK1_TRGCR , 1 .equ TCK2_TRGCR , 2 .equ CKEG0_TRGCR , 3 .equ CKEG1_TRGCR , 4 .equ CCLR0_TRGCR , 5 .equ CCLR1_TRGCR , 6 ;------------------------------------------------------------------------------------ ; Timer RG Interrupt Enable Register ;------------------------------------------------------------------------------------ .equ TRGIER , 0x0173 .equ IMIEA_TRGIER , 0 .equ IMIEB_TRGIER , 1 .equ UDIE_TRGIER , 2 .equ OVIE_TRGIER , 3 ;------------------------------------------------------------------------------------ ; Timer RG Status Register ;------------------------------------------------------------------------------------ .equ TRGSR , 0x0174 .equ IMFA_TRGSR , 0 .equ IMFB_TRGSR , 1 .equ UDF_TRGSR , 2 .equ OVF_TRGSR , 3 .equ DIRF_TRGSR , 4 ;------------------------------------------------------------------------------------ ; Timer RG I/O Control Register ;------------------------------------------------------------------------------------ .equ TRGIOR , 0x0175 .equ IOA0_TRGIOR , 0 .equ IOA1_TRGIOR , 1 .equ IOA2_TRGIOR , 2 .equ BUFA_TRGIOR , 3 .equ IOB0_TRGIOR , 4 .equ IOB1_TRGIOR , 5 .equ IOB2_TRGIOR , 6 .equ BUFB_TRGIOR , 7 ;------------------------------------------------------------------------------------ ; Timer RG Counter, Timer RG General Register A,B,C,D ;------------------------------------------------------------------------------------ .equ TRG , 0x0176 ;------------------------------------------------------------------------------------ ; Timer RG Counter, Timer RG General Register A,B,C,D ;------------------------------------------------------------------------------------ .equ TRGGRA , 0x0178 ;------------------------------------------------------------------------------------ ; Timer RG Counter, Timer RG General Register A,B,C,D ;------------------------------------------------------------------------------------ .equ TRGGRB , 0x017A ;------------------------------------------------------------------------------------ ; Timer RG Counter, Timer RG General Register A,B,C,D ;------------------------------------------------------------------------------------ .equ TRGGRC , 0x017C ;------------------------------------------------------------------------------------ ; Timer RG Counter, Timer RG General Register A,B,C,D ;------------------------------------------------------------------------------------ .equ TRGGRD , 0x017E ;------------------------------------------------------------------------------------ ; Timer RA Pin Select Register ;------------------------------------------------------------------------------------ .equ TRASR , 0x0180 .equ TRAIOSEL0 , 0 .equ TRAIOSEL1 , 1 .equ TRAOSEL0 , 3 .equ TRAIO1SEL0 , 5 ;------------------------------------------------------------------------------------ ; Timer RB/RC Pin Select Register ;------------------------------------------------------------------------------------ .equ TRBRCSR , 0x0181 .equ TRBOSEL0 , 0 .equ TRBOSEL1 , 1 .equ TRCCLKSEL0 , 4 .equ TRCCLKSEL1 , 5 .equ TRCCLKSEL2 , 6 ;------------------------------------------------------------------------------------ ; Timer RC Pin Select Register 0 ;------------------------------------------------------------------------------------ .equ TRCPSR0 , 0x0182 .equ TRCIOASEL0 , 0 .equ TRCIOASEL1 , 1 .equ TRCIOASEL2 , 2 .equ TRCIOBSEL0 , 4 .equ TRCIOBSEL1 , 5 .equ TRCIOBSEL2 , 6 ;------------------------------------------------------------------------------------ ; Timer RC Pin Select Register 1 ;------------------------------------------------------------------------------------ .equ TRCPSR1 , 0x0183 .equ TRCIOCSEL0 , 0 .equ TRCIOCSEL1 , 1 .equ TRCIOCSEL2 , 2 .equ TRCIODSEL0 , 4 .equ TRCIODSEL1 , 5 .equ TRCIODSEL2 , 6 ;------------------------------------------------------------------------------------ ; Timer RD Pin Select Register 0 ;------------------------------------------------------------------------------------ .equ TRDPSR0 , 0x0184 .equ TRDIOA0SEL0 , 0 .equ TRDIOB0SEL0 , 2 .equ TRDIOC0SEL0 , 4 .equ TRDIOD0SEL0 , 6 ;------------------------------------------------------------------------------------ ; Timer RD Pin Select Register 1 ;------------------------------------------------------------------------------------ .equ TRDPSR1 , 0x0185 .equ TRDIOA1SEL0 , 0 .equ TRDIOB1SEL0 , 2 .equ TRDIOC1SEL0 , 4 .equ TRDIOD1SEL0 , 6 ;------------------------------------------------------------------------------------ ; Timer Pin Select Register ;------------------------------------------------------------------------------------ .equ TIMSR , 0x0186 .equ TREOSEL0 , 0 .equ TRFISEL0 , 2 .equ TRGIOASEL , 4 .equ TRGIOBSEL , 5 .equ TRGCLKASEL , 6 .equ TRGCLKBSEL , 7 ;------------------------------------------------------------------------------------ ; Timer RF Output Control Register ;------------------------------------------------------------------------------------ .equ TRFOUT , 0x0187 .equ TRFOUT0 , 0 .equ TRFOUT1 , 1 .equ TRFOUT2 , 2 .equ TRFOUT3 , 3 .equ TRFOUT4 , 4 .equ TRFOUT5 , 5 .equ TRFOUT6 , 6 .equ TRFOUT7 , 7 ;------------------------------------------------------------------------------------ ; UART0 Pin Select Register ;------------------------------------------------------------------------------------ .equ U0SR , 0x0188 .equ TXD0SEL0 , 0 .equ RXD0SEL0 , 2 .equ CLK0SEL0 , 4 ;------------------------------------------------------------------------------------ ; UART1 Pin Select Register ;------------------------------------------------------------------------------------ .equ U1SR , 0x0189 .equ TXD1SEL0 , 0 .equ TXD1SEL1 , 1 .equ RXD1SEL0 , 2 .equ RXD1SEL1 , 3 .equ CLK1SEL0 , 4 .equ CLK1SEL1 , 5 ;------------------------------------------------------------------------------------ ; UART2 Pin Select Register 0 ;------------------------------------------------------------------------------------ .equ U2SR0 , 0x018A .equ TXD2SEL0 , 0 .equ TXD2SEL1 , 1 .equ TXD2SEL2 , 2 .equ RXD2SEL0 , 4 .equ RXD2SEL1 , 5 .equ RXD2SEL2 , 6 ;------------------------------------------------------------------------------------ ; UART2 Pin Select Register 1 ;------------------------------------------------------------------------------------ .equ U2SR1 , 0x018B .equ CLK2SEL0 , 0 .equ CLK2SEL1 , 1 .equ CTS2SEL0 , 4 ;------------------------------------------------------------------------------------ ; SSU Pin Select Register ;------------------------------------------------------------------------------------ .equ SSUIICSR , 0x018C .equ SSISEL0 , 4 .equ SCSSEL0 , 6 ;------------------------------------------------------------------------------------ ; INT Interrupt Input Pin Select Register ;------------------------------------------------------------------------------------ .equ INTSR , 0x018E .equ INT1SEL0 , 1 .equ INT1SEL1 , 2 .equ INT1SEL2 , 3 .equ INT2SEL0 , 4 .equ INT2SEL1 , 5 .equ INT3SEL0 , 6 .equ INT3SEL1 , 7 ;------------------------------------------------------------------------------------ ; I/O Function Pin Select Register ;------------------------------------------------------------------------------------ .equ PINSR , 0x018F .equ IOINSEL , 3 ;------------------------------------------------------------------------------------ ; SS Bit Counter Register ;------------------------------------------------------------------------------------ .equ SSBR , 0x0193 .equ BS0 , 0 .equ BS1 , 1 .equ BS2 , 2 .equ BS3 , 3 ;------------------------------------------------------------------------------------ ; SS Control Register H ;------------------------------------------------------------------------------------ .equ SSCRH , 0x0198 .equ CKS0_SSCRH , 0 .equ CKS1_SSCRH , 1 .equ CKS2_SSCRH , 2 .equ MSS_SSCRH , 5 .equ RSSTP_SSCRH , 6 ;------------------------------------------------------------------------------------ ; SS Control Register L ;------------------------------------------------------------------------------------ .equ SSCRL , 0x0199 .equ SRES_SSCRL , 1 .equ SOLP_SSCRL , 4 .equ SOL_SSCRL , 5 ;------------------------------------------------------------------------------------ ; SS Mode Register ;------------------------------------------------------------------------------------ .equ SSMR , 0x019A .equ BC0_SSMR , 0 .equ BC1_SSMR , 1 .equ BC2_SSMR , 2 .equ BC3_SSMR , 3 .equ CPHS_SSMR , 5 .equ CPOS_SSMR , 6 .equ MLS_SSMR , 7 ;------------------------------------------------------------------------------------ ; SS Enable Register ;------------------------------------------------------------------------------------ .equ SSER , 0x019B .equ CEIE_SSER , 0 .equ RE_SSER , 3 .equ TE_SSER , 4 .equ RIE_SSER , 5 .equ TEIE_SSER , 6 .equ TIE_SSER , 7 ;------------------------------------------------------------------------------------ ; SS Status Register ;------------------------------------------------------------------------------------ .equ SSSR , 0x019C .equ CE_SSSR , 0 .equ ORER_SSSR , 2 .equ RDRF_SSSR , 5 .equ TEND_SSSR , 6 .equ TDRE_SSSR , 7 ;------------------------------------------------------------------------------------ ; SS Mode Register 2 ;------------------------------------------------------------------------------------ .equ SSMR2 , 0x019D .equ SSUMS_SSMR2 , 0 .equ CSOS_SSMR2 , 1 .equ SOOS_SSMR2 , 2 .equ SCKOS_SSMR2 , 3 .equ CSS0_SSMR2 , 4 .equ CSS1_SSMR2 , 5 .equ SCKS_SSMR2 , 6 .equ BIDE_SSMR2 , 7 ;------------------------------------------------------------------------------------ ; Flash Memory Status Register ;------------------------------------------------------------------------------------ .equ FST , 0x01B2 .equ RDYSTI , 0 .equ BSYAEI , 1 .equ LBDATA , 2 .equ FST4 , 4 .equ FST5 , 5 .equ FST6 , 6 .equ FST7 , 7 ;------------------------------------------------------------------------------------ ; Flash Memory Control Register 0 ;------------------------------------------------------------------------------------ .equ FMR0 , 0x01B4 .equ FMR00 , 0 .equ FMR01 , 1 .equ FMR02 , 2 .equ FMSTP , 3 .equ CMDRST , 4 .equ CMDERIE , 5 .equ BSYAEIE , 6 .equ RDYSTIE , 7 ;------------------------------------------------------------------------------------ ; Flash Memory Control Register 1 ;------------------------------------------------------------------------------------ .equ FMR1 , 0x01B5 .equ FMR13 , 3 .equ FMR14 , 4 .equ FMR15 , 5 .equ FMR16 , 6 .equ FMR17 , 7 ;------------------------------------------------------------------------------------ ; Flash Memory Control Register 1 ;------------------------------------------------------------------------------------ .equ FMR2 , 0x01B6 .equ FMR20 , 0 .equ FMR21 , 1 .equ FMR22 , 2 .equ FMR23 , 3 .equ FMR27 , 7 ;------------------------------------------------------------------------------------ ; Address Match Interrupt Enable Register 0 ;------------------------------------------------------------------------------------ .equ AIER0 , 0x01C3 .equ AIER00 , 0 ;------------------------------------------------------------------------------------ ; Address Match Interrupt Enable Register 1 ;------------------------------------------------------------------------------------ .equ AIER1 , 0x01C7 .equ AIER10 , 0 ;------------------------------------------------------------------------------------ ; Pull-Up Control Register 0 ;------------------------------------------------------------------------------------ .equ PUR0 , 0x01E0 .equ PU00 , 0 .equ PU01 , 1 .equ PU02 , 2 .equ PU03 , 3 .equ PU04 , 4 .equ PU05 , 5 .equ PU06 , 6 .equ PU07 , 7 ;------------------------------------------------------------------------------------ ; Pull-Up Control Register 1 ;------------------------------------------------------------------------------------ .equ PUR1 , 0x01E1 .equ PU10 , 0 .equ PU11 , 1 .equ PU12 , 2 .equ PU13 , 3 .equ PU14 , 4 .equ PU15 , 5 ;------------------------------------------------------------------------------------ ; Pull-Up Control Register 2 ;------------------------------------------------------------------------------------ .equ PUR2 , 0x01E2 .equ PU20 , 0 .equ PU21 , 1 ;------------------------------------------------------------------------------------ ; Input Threshold Control Register 0 ;------------------------------------------------------------------------------------ .equ VLT0 , 0x01F5 .equ VLT00 , 0 .equ VLT01 , 1 .equ VLT02 , 2 .equ VLT03 , 3 .equ VLT04 , 4 .equ VLT05 , 5 .equ VLT06 , 6 .equ VLT07 , 7 ;------------------------------------------------------------------------------------ ; Input Threshold Control Register 1 ;------------------------------------------------------------------------------------ .equ VLT1 , 0x01F6 .equ VLT10 , 0 .equ VLT11 , 1 .equ VLT12 , 2 .equ VLT13 , 3 .equ VLT14 , 4 .equ VLT15 , 5 ;------------------------------------------------------------------------------------ ; Input Threshold Control Register 2 ;------------------------------------------------------------------------------------ .equ VLT2 , 0x01F7 .equ VLT20 , 0 .equ VLT21 , 1 ;------------------------------------------------------------------------------------ ; External Interrupt Enable Register ;------------------------------------------------------------------------------------ .equ INTEN , 0x01FA .equ INT0EN , 0 .equ INT0PL , 1 .equ INT1EN , 2 .equ INT1PL , 3 .equ INT2EN , 4 .equ INT2PL , 5 .equ INT3EN , 6 .equ INT3PL , 7 ;------------------------------------------------------------------------------------ ; External Input Enable Register 1 ;------------------------------------------------------------------------------------ .equ INTEN1 , 0x01FB .equ INT4EN , 0 .equ INT4PL , 1 ;------------------------------------------------------------------------------------ ; INT Input Filter Select Register 0 ;------------------------------------------------------------------------------------ .equ INTF , 0x01FC .equ INT0F0 , 0 .equ INT0F1 , 1 .equ INT1F0 , 2 .equ INT1F1 , 3 .equ INT2F0 , 4 .equ INT2F1 , 5 .equ INT3F0 , 6 .equ INT3F1 , 7 ;------------------------------------------------------------------------------------ ; INT Input Filter Select Register 1 ;------------------------------------------------------------------------------------ .equ INTF1 , 0x01FD .equ INT4F0 , 0 .equ INT4F1 , 1 ;------------------------------------------------------------------------------------ ; Key Input Enable Register 0 ;------------------------------------------------------------------------------------ .equ KIEN , 0x01FE .equ KI0EN , 0 .equ KI0PL , 1 .equ KI1EN , 2 .equ KI1PL , 3 .equ KI2EN , 4 .equ KI2PL , 5 .equ KI3EN , 6 .equ KI3PL , 7 ;------------------------------------------------------------------------------------ ; DTC Transfer Vector Area 0 (INT0) ;------------------------------------------------------------------------------------ .equ DTCVCT0 , 0x2C00 ;------------------------------------------------------------------------------------ ; DTC Transfer Vector Area 1 (INT1) ;------------------------------------------------------------------------------------ .equ DTCVCT1 , 0x2C01 ;------------------------------------------------------------------------------------ ; DTC Transfer Vector Area 2 (INT2) ;------------------------------------------------------------------------------------ .equ DTCVCT2 , 0x2C02 ;------------------------------------------------------------------------------------ ; DTC Transfer Vector Area 3 (INT3) ;------------------------------------------------------------------------------------ .equ DTCVCT3 , 0x2C03 ;------------------------------------------------------------------------------------ ; DTC Transfer Vector Area 4 (INT4) ;------------------------------------------------------------------------------------ .equ DTCVCT4 , 0x2C04 ;------------------------------------------------------------------------------------ ; DTC Transfer Vector Area 5 ;------------------------------------------------------------------------------------ .equ DTCVCT5 , 0x2C05 ;------------------------------------------------------------------------------------ ; DTC Transfer Vector Area 6 ;------------------------------------------------------------------------------------ .equ DTCVCT6 , 0x2C06 ;------------------------------------------------------------------------------------ ; DTC Transfer Vector Area 7 ;------------------------------------------------------------------------------------ .equ DTCVCT7 , 0x2C07 ;------------------------------------------------------------------------------------ ; DTC Transfer Vector Area 8 (Key Input) ;------------------------------------------------------------------------------------ .equ DTCVCT8 , 0x2C08 ;------------------------------------------------------------------------------------ ; DTC Transfer Vector Area 9 (A/D) ;------------------------------------------------------------------------------------ .equ DTCVCT9 , 0x2C09 ;------------------------------------------------------------------------------------ ; DTC Transfer Vector Area 10 (Uart0 Receive) ;------------------------------------------------------------------------------------ .equ DTCVCT10 , 0x2C0A ;------------------------------------------------------------------------------------ ; DTC Transfer Vector Area 11 (Uart0 Transfer) ;------------------------------------------------------------------------------------ .equ DTCVCT11 , 0x2C0B ;------------------------------------------------------------------------------------ ; DTC Transfer Vector Area 12 ;------------------------------------------------------------------------------------ .equ DTCVCT12 , 0x2C0C ;------------------------------------------------------------------------------------ ; DTC Transfer Vector Area 13 ;------------------------------------------------------------------------------------ .equ DTCVCT13 , 0x2C0D ;------------------------------------------------------------------------------------ ; DTC Transfer Vector Area 14 (Uart2 Receive) ;------------------------------------------------------------------------------------ .equ DTCVCT14 , 0x2C0E ;------------------------------------------------------------------------------------ ; DTC Transfer Vector Area 15 (Uart2 Transfer) ;------------------------------------------------------------------------------------ .equ DTCVCT15 , 0x2C0F ;------------------------------------------------------------------------------------ ; DTC Transfer Vector Area 16 (SSU Receive data Register full) ;------------------------------------------------------------------------------------ .equ DTCVCT16 , 0x2C10 ;------------------------------------------------------------------------------------ ; DTC Transfer Vector Area 17 (SSU Transmit data empty) ;------------------------------------------------------------------------------------ .equ DTCVCT17 , 0x2C11 ;------------------------------------------------------------------------------------ ; DTC Transfer Vector Area 18 (Voltage Monitor Circuit 2) ;------------------------------------------------------------------------------------ .equ DTCVCT18 , 0x2C12 ;------------------------------------------------------------------------------------ ; DTC Transfer Vector Area 19 (Voltage Monitor Circuit 1) ;------------------------------------------------------------------------------------ .equ DTCVCT19 , 0x2C13 ;------------------------------------------------------------------------------------ ; DTC Transfer Vector Area 20 ;------------------------------------------------------------------------------------ .equ DTCVCT20 , 0x2C14 ;------------------------------------------------------------------------------------ ; DTC Transfer Vector Area 21 ;------------------------------------------------------------------------------------ .equ DTCVCT21 , 0x2C15 ;------------------------------------------------------------------------------------ ; DTC Transfer Vector Area 22 (TRC Input capture / compare match A) ;------------------------------------------------------------------------------------ .equ DTCVCT22 , 0x2C16 ;------------------------------------------------------------------------------------ ; DTC Transfer Vector Area 23 (TRC Input capture / compare match B) ;------------------------------------------------------------------------------------ .equ DTCVCT23 , 0x2C17 ;------------------------------------------------------------------------------------ ; DTC Transfer Vector Area 24 (TRC Input capture / compare match C) ;------------------------------------------------------------------------------------ .equ DTCVCT24 , 0x2C18 ;------------------------------------------------------------------------------------ ; DTC Transfer Vector Area 25 (TRC Input capture / compare match D) ;------------------------------------------------------------------------------------ .equ DTCVCT25 , 0x2C19 ;------------------------------------------------------------------------------------ ; DTC Transfer Vector Area 26 (TRD0 Input capture / compare match A) ;------------------------------------------------------------------------------------ .equ DTCVCT26 , 0x2C1A ;------------------------------------------------------------------------------------ ; DTC Transfer Vector Area 27 (TRD0 Input capture / compare match B) ;------------------------------------------------------------------------------------ .equ DTCVCT27 , 0x2C1B ;------------------------------------------------------------------------------------ ; DTC Transfer Vector Area 28 (TRD0 Input capture / compare match C) ;------------------------------------------------------------------------------------ .equ DTCVCT28 , 0x2C1C ;------------------------------------------------------------------------------------ ; DTC Transfer Vector Area 29 (TRD0 Input capture / compare match D) ;------------------------------------------------------------------------------------ .equ DTCVCT29 , 0x2C1D ;------------------------------------------------------------------------------------ ; DTC Transfer Vector Area 30 (TRD1 Input capture / compare match A) ;------------------------------------------------------------------------------------ .equ DTCVCT30 , 0x2C1E ;------------------------------------------------------------------------------------ ; DTC Transfer Vector Area 31 (TRD1 Input capture / compare match B) ;------------------------------------------------------------------------------------ .equ DTCVCT31 , 0x2C1F ;------------------------------------------------------------------------------------ ; DTC Transfer Vector Area 32 (TRD1 Input capture / compare match C) ;------------------------------------------------------------------------------------ .equ DTCVCT32 , 0x2C20 ;------------------------------------------------------------------------------------ ; DTC Transfer Vector Area 33 (TRD1 Input capture / compare match D) ;------------------------------------------------------------------------------------ .equ DTCVCT33 , 0x2C21 ;------------------------------------------------------------------------------------ ; DTC Transfer Vector Area 34 ;------------------------------------------------------------------------------------ .equ DTCVCT34 , 0x2C22 ;------------------------------------------------------------------------------------ ; DTC Transfer Vector Area 35 ;------------------------------------------------------------------------------------ .equ DTCVCT35 , 0x2C23 ;------------------------------------------------------------------------------------ ; DTC Transfer Vector Area 36 ;------------------------------------------------------------------------------------ .equ DTCVCT36 , 0x2C24 ;------------------------------------------------------------------------------------ ; DTC Transfer Vector Area 37 ;------------------------------------------------------------------------------------ .equ DTCVCT37 , 0x2C25 ;------------------------------------------------------------------------------------ ; DTC Transfer Vector Area 38 ;------------------------------------------------------------------------------------ .equ DTCVCT38 , 0x2C26 ;------------------------------------------------------------------------------------ ; DTC Transfer Vector Area 39 ;------------------------------------------------------------------------------------ .equ DTCVCT39 , 0x2C27 ;------------------------------------------------------------------------------------ ; DTC Transfer Vector Area 40 ;------------------------------------------------------------------------------------ .equ DTCVCT40 , 0x2C28 ;------------------------------------------------------------------------------------ ; DTC Transfer Vector Area 41 ;------------------------------------------------------------------------------------ .equ DTCVCT41 , 0x2C29 ;------------------------------------------------------------------------------------ ; DTC Transfer Vector Area 42 (TRE) ;------------------------------------------------------------------------------------ .equ DTCVCT42 , 0x2C2A ;------------------------------------------------------------------------------------ ; DTC Transfer Vector Area 43 ;------------------------------------------------------------------------------------ .equ DTCVCT43 , 0x2C2B ;------------------------------------------------------------------------------------ ; DTC Transfer Vector Area 44 ;------------------------------------------------------------------------------------ .equ DTCVCT44 , 0x2C2C ;------------------------------------------------------------------------------------ ; DTC Transfer Vector Area 45 ;------------------------------------------------------------------------------------ .equ DTCVCT45 , 0x2C2D ;------------------------------------------------------------------------------------ ; DTC Transfer Vector Area 46 ;------------------------------------------------------------------------------------ .equ DTCVCT46 , 0x2C2E ;------------------------------------------------------------------------------------ ; DTC Transfer Vector Area 47 ;------------------------------------------------------------------------------------ .equ DTCVCT47 , 0x2C2F ;------------------------------------------------------------------------------------ ; DTC Transfer Vector Area 48 ;------------------------------------------------------------------------------------ .equ DTCVCT48 , 0x2C30 ;------------------------------------------------------------------------------------ ; DTC Transfer Vector Area 49 (TRA) ;------------------------------------------------------------------------------------ .equ DTCVCT49 , 0x2C31 ;------------------------------------------------------------------------------------ ; DTC Transfer Vector Area 50 ;------------------------------------------------------------------------------------ .equ DTCVCT50 , 0x2C32 ;------------------------------------------------------------------------------------ ; DTC Transfer Vector Area 51 (TRB) ;------------------------------------------------------------------------------------ .equ DTCVCT51 , 0x2C33 ;------------------------------------------------------------------------------------ ; DTC Transfer Vector Area 52 (Flash memory ready) ;------------------------------------------------------------------------------------ .equ DTCVCT52 , 0x2C34 ;------------------------------------------------------------------------------------ ; DTC Transfer Vector Area 53 ;------------------------------------------------------------------------------------ .equ DTCVCT53 , 0x2C35 ;------------------------------------------------------------------------------------ ; DTC Transfer Vector Area 54 ;------------------------------------------------------------------------------------ .equ DTCVCT54 , 0x2C36 ;------------------------------------------------------------------------------------ ; DTC Transfer Vector Area 55 ;------------------------------------------------------------------------------------ .equ DTCVCT55 , 0x2C37 ;------------------------------------------------------------------------------------ ; DTC Transfer Vector Area 56 ;------------------------------------------------------------------------------------ .equ DTCVCT56 , 0x2C38 ;------------------------------------------------------------------------------------ ; DTC Transfer Vector Area 57 ;------------------------------------------------------------------------------------ .equ DTCVCT57 , 0x2C39 ;------------------------------------------------------------------------------------ ; DTC Transfer Vector Area 58 ;------------------------------------------------------------------------------------ .equ DTCVCT58 , 0x2C3A ;------------------------------------------------------------------------------------ ; DTC Transfer Vector Area 59 ;------------------------------------------------------------------------------------ .equ DTCVCT59 , 0x2C3B ;------------------------------------------------------------------------------------ ; DTC Transfer Vector Area 60 ;------------------------------------------------------------------------------------ .equ DTCVCT60 , 0x2C3C ;------------------------------------------------------------------------------------ ; DTC Transfer Vector Area 61 ;------------------------------------------------------------------------------------ .equ DTCVCT61 , 0x2C3D ;------------------------------------------------------------------------------------ ; DTC Transfer Vector Area 62 ;------------------------------------------------------------------------------------ .equ DTCVCT62 , 0x2C3E ;------------------------------------------------------------------------------------ ; DTC Transfer Vector Area 63 ;------------------------------------------------------------------------------------ .equ DTCVCT63 , 0x2C3F ;------------------------------------------------------------------------------------ ; DTC Control Register 0 ;------------------------------------------------------------------------------------ .equ DTCCR0 , 0x2C40 .equ MODE_DTCCR0 , 0 .equ RPTSEL_DTCCR0 , 1 .equ SAMOD_DTCCR0 , 2 .equ DAMOD_DTCCR0 , 3 .equ CHNE_DTCCR0 , 4 .equ RPTINT_DTCCR0 , 5 ;------------------------------------------------------------------------------------ ; DTC Block Size Register 0 ;------------------------------------------------------------------------------------ .equ DTBLS0 , 0x2C41 ;------------------------------------------------------------------------------------ ; DTC Transfer Count Register 0 ;------------------------------------------------------------------------------------ .equ DTCCT0 , 0x2C42 ;------------------------------------------------------------------------------------ ; DTC Transfer Count Reload Register 0 ;------------------------------------------------------------------------------------ .equ DTRLD0 , 0x2C43 ;------------------------------------------------------------------------------------ ; DTC Source Address Register 0 ;------------------------------------------------------------------------------------ .equ DTSAR0 , 0x2C44 ;------------------------------------------------------------------------------------ ; DTC Destination Register 0 ;------------------------------------------------------------------------------------ .equ DTDAR0 , 0x2C46 ;------------------------------------------------------------------------------------ ; DTC Control Register 1 ;------------------------------------------------------------------------------------ .equ DTCCR1 , 0x2C48 .equ MODE_DTCCR1 , 0 .equ RPTSEL_DTCCR1 , 1 .equ SAMOD_DTCCR1 , 2 .equ DAMOD_DTCCR1 , 3 .equ CHNE_DTCCR1 , 4 .equ RPTINT_DTCCR1 , 5 ;------------------------------------------------------------------------------------ ; DTC Block Size Register 1 ;------------------------------------------------------------------------------------ .equ DTBLS1 , 0x2C49 ;------------------------------------------------------------------------------------ ; DTC Transfer Count Register 1 ;------------------------------------------------------------------------------------ .equ DTCCT1 , 0x2C4A ;------------------------------------------------------------------------------------ ; DTC Transfer Count Reload Register 1 ;------------------------------------------------------------------------------------ .equ DTRLD1 , 0x2C4B ;------------------------------------------------------------------------------------ ; DTC Source Address Register 1 ;------------------------------------------------------------------------------------ .equ DTSAR1 , 0x2C4C ;------------------------------------------------------------------------------------ ; DTC Destination Register 1 ;------------------------------------------------------------------------------------ .equ DTDAR1 , 0x2C4E ;------------------------------------------------------------------------------------ ; DTC Control Register 2 ;------------------------------------------------------------------------------------ .equ DTCCR2 , 0x2C50 .equ MODE_DTCCR2 , 0 .equ RPTSEL_DTCCR2 , 1 .equ SAMOD_DTCCR2 , 2 .equ DAMOD_DTCCR2 , 3 .equ CHNE_DTCCR2 , 4 .equ RPTINT_DTCCR2 , 5 ;------------------------------------------------------------------------------------ ; DTC Block Size Register 2 ;------------------------------------------------------------------------------------ .equ DTBLS2 , 0x2C51 ;------------------------------------------------------------------------------------ ; DTC Transfer Count Register 2 ;------------------------------------------------------------------------------------ .equ DTCCT2 , 0x2C52 ;------------------------------------------------------------------------------------ ; DTC Transfer Count Reload Register 2 ;------------------------------------------------------------------------------------ .equ DTRLD2 , 0x2C53 ;------------------------------------------------------------------------------------ ; DTC Source Address Register 2 ;------------------------------------------------------------------------------------ .equ DTSAR2 , 0x2C54 ;------------------------------------------------------------------------------------ ; DTC Destination Register 2 ;------------------------------------------------------------------------------------ .equ DTDAR2 , 0x2C56 ;------------------------------------------------------------------------------------ ; DTC Control Register 3 ;------------------------------------------------------------------------------------ .equ DTCCR3 , 0x2C58 .equ MODE_DTCCR3 , 0 .equ RPTSEL_DTCCR3 , 1 .equ SAMOD_DTCCR3 , 2 .equ DAMOD_DTCCR3 , 3 .equ CHNE_DTCCR3 , 4 .equ RPTINT_DTCCR3 , 5 ;------------------------------------------------------------------------------------ ; DTC Block Size Register 3 ;------------------------------------------------------------------------------------ .equ DTBLS3 , 0x2C59 ;------------------------------------------------------------------------------------ ; DTC Transfer Count Register 3 ;------------------------------------------------------------------------------------ .equ DTCCT3 , 0x2C5A ;------------------------------------------------------------------------------------ ; DTC Transfer Count Reload Register 3 ;------------------------------------------------------------------------------------ .equ DTRLD3 , 0x2C5B ;------------------------------------------------------------------------------------ ; DTC Source Address Register 3 ;------------------------------------------------------------------------------------ .equ DTSAR3 , 0x2C5C ;------------------------------------------------------------------------------------ ; DTC Destination Register 3 ;------------------------------------------------------------------------------------ .equ DTDAR3 , 0x2C5E ;------------------------------------------------------------------------------------ ; DTC Control Register 4 ;------------------------------------------------------------------------------------ .equ DTCCR4 , 0x2C60 .equ MODE_DTCCR4 , 0 .equ RPTSEL_DTCCR4 , 1 .equ SAMOD_DTCCR4 , 2 .equ DAMOD_DTCCR4 , 3 .equ CHNE_DTCCR4 , 4 .equ RPTINT_DTCCR4 , 5 ;------------------------------------------------------------------------------------ ; DTC Block Size Register 4 ;------------------------------------------------------------------------------------ .equ DTBLS4 , 0x2C61 ;------------------------------------------------------------------------------------ ; DTC Transfer Count Register 4 ;------------------------------------------------------------------------------------ .equ DTCCT4 , 0x2C62 ;------------------------------------------------------------------------------------ ; DTC Transfer Count Reload Register 4 ;------------------------------------------------------------------------------------ .equ DTRLD4 , 0x2C63 ;------------------------------------------------------------------------------------ ; DTC Source Address Register 4 ;------------------------------------------------------------------------------------ .equ DTSAR4 , 0x2C64 ;------------------------------------------------------------------------------------ ; DTC Destination Register 4 ;------------------------------------------------------------------------------------ .equ DTDAR4 , 0x2C66 ;------------------------------------------------------------------------------------ ; DTC Control Register 5 ;------------------------------------------------------------------------------------ .equ DTCCR5 , 0x2C68 .equ MODE_DTCCR5 , 0 .equ RPTSEL_DTCCR5 , 1 .equ SAMOD_DTCCR5 , 2 .equ DAMOD_DTCCR5 , 3 .equ CHNE_DTCCR5 , 4 .equ RPTINT_DTCCR5 , 5 ;------------------------------------------------------------------------------------ ; DTC Block Size Register 5 ;------------------------------------------------------------------------------------ .equ DTBLS5 , 0x2C69 ;------------------------------------------------------------------------------------ ; DTC Transfer Count Register 5 ;------------------------------------------------------------------------------------ .equ DTCCT5 , 0x2C6A ;------------------------------------------------------------------------------------ ; DTC Transfer Count Reload Register 5 ;------------------------------------------------------------------------------------ .equ DTRLD5 , 0x2C6B ;------------------------------------------------------------------------------------ ; DTC Source Address Register 5 ;------------------------------------------------------------------------------------ .equ DTSAR5 , 0x2C6C ;------------------------------------------------------------------------------------ ; DTC Destination Register 5 ;------------------------------------------------------------------------------------ .equ DTDAR5 , 0x2C6E ;------------------------------------------------------------------------------------ ; DTC Control Register 6 ;------------------------------------------------------------------------------------ .equ DTCCR6 , 0x2C70 .equ MODE_DTCCR6 , 0 .equ RPTSEL_DTCCR6 , 1 .equ SAMOD_DTCCR6 , 2 .equ DAMOD_DTCCR6 , 3 .equ CHNE_DTCCR6 , 4 .equ RPTINT_DTCCR6 , 5 ;------------------------------------------------------------------------------------ ; DTC Block Size Register 6 ;------------------------------------------------------------------------------------ .equ DTBLS6 , 0x2C71 ;------------------------------------------------------------------------------------ ; DTC Transfer Count Register 6 ;------------------------------------------------------------------------------------ .equ DTCCT6 , 0x2C72 ;------------------------------------------------------------------------------------ ; DTC Transfer Count Reload Register 6 ;------------------------------------------------------------------------------------ .equ DTRLD6 , 0x2C73 ;------------------------------------------------------------------------------------ ; DTC Source Address Register 6 ;------------------------------------------------------------------------------------ .equ DTSAR6 , 0x2C74 ;------------------------------------------------------------------------------------ ; DTC Destination Register 6 ;------------------------------------------------------------------------------------ .equ DTDAR6 , 0x2C76 ;------------------------------------------------------------------------------------ ; DTC Control Register 7 ;------------------------------------------------------------------------------------ .equ DTCCR7 , 0x2C78 .equ MODE_DTCCR7 , 0 .equ RPTSEL_DTCCR7 , 1 .equ SAMOD_DTCCR7 , 2 .equ DAMOD_DTCCR7 , 3 .equ CHNE_DTCCR7 , 4 .equ RPTINT_DTCCR7 , 5 ;------------------------------------------------------------------------------------ ; DTC Block Size Register 7 ;------------------------------------------------------------------------------------ .equ DTBLS7 , 0x2C79 ;------------------------------------------------------------------------------------ ; DTC Transfer Count Register 7 ;------------------------------------------------------------------------------------ .equ DTCCT7 , 0x2C7A ;------------------------------------------------------------------------------------ ; DTC Transfer Count Reload Register 7 ;------------------------------------------------------------------------------------ .equ DTRLD7 , 0x2C7B ;------------------------------------------------------------------------------------ ; DTC Source Address Register 7 ;------------------------------------------------------------------------------------ .equ DTSAR7 , 0x2C7C ;------------------------------------------------------------------------------------ ; DTC Destination Register 7 ;------------------------------------------------------------------------------------ .equ DTDAR7 , 0x2C7E ;------------------------------------------------------------------------------------ ; DTC Control Register 8 ;------------------------------------------------------------------------------------ .equ DTCCR8 , 0x2C80 .equ MODE_DTCCR8 , 0 .equ RPTSEL_DTCCR8 , 1 .equ SAMOD_DTCCR8 , 2 .equ DAMOD_DTCCR8 , 3 .equ CHNE_DTCCR8 , 4 .equ RPTINT_DTCCR8 , 5 ;------------------------------------------------------------------------------------ ; DTC Block Size Register 8 ;------------------------------------------------------------------------------------ .equ DTBLS8 , 0x2C81 ;------------------------------------------------------------------------------------ ; DTC Transfer Count Register 8 ;------------------------------------------------------------------------------------ .equ DTCCT8 , 0x2C82 ;------------------------------------------------------------------------------------ ; DTC Transfer Count Reload Register 8 ;------------------------------------------------------------------------------------ .equ DTRLD8 , 0x2C83 ;------------------------------------------------------------------------------------ ; DTC Source Address Register 8 ;------------------------------------------------------------------------------------ .equ DTSAR8 , 0x2C84 ;------------------------------------------------------------------------------------ ; DTC Destination Register 8 ;------------------------------------------------------------------------------------ .equ DTDAR8 , 0x2C86 ;------------------------------------------------------------------------------------ ; DTC Control Register 9 ;------------------------------------------------------------------------------------ .equ DTCCR9 , 0x2C88 .equ MODE_DTCCR9 , 0 .equ RPTSEL_DTCCR9 , 1 .equ SAMOD_DTCCR9 , 2 .equ DAMOD_DTCCR9 , 3 .equ CHNE_DTCCR9 , 4 .equ RPTINT_DTCCR9 , 5 ;------------------------------------------------------------------------------------ ; DTC Block Size Register 9 ;------------------------------------------------------------------------------------ .equ DTBLS9 , 0x2C89 ;------------------------------------------------------------------------------------ ; DTC Transfer Count Register 9 ;------------------------------------------------------------------------------------ .equ DTCCT9 , 0x2C8A ;------------------------------------------------------------------------------------ ; DTC Transfer Count Reload Register 9 ;------------------------------------------------------------------------------------ .equ DTRLD9 , 0x2C8B ;------------------------------------------------------------------------------------ ; DTC Source Address Register 9 ;------------------------------------------------------------------------------------ .equ DTSAR9 , 0x2C8C ;------------------------------------------------------------------------------------ ; DTC Destination Register 9 ;------------------------------------------------------------------------------------ .equ DTDAR9 , 0x2C8E ;------------------------------------------------------------------------------------ ; DTC Control Register 10 ;------------------------------------------------------------------------------------ .equ DTCCR10 , 0x2C90 .equ MODE_DTCCR10 , 0 .equ RPTSEL_DTCCR10 , 1 .equ SAMOD_DTCCR10 , 2 .equ DAMOD_DTCCR10 , 3 .equ CHNE_DTCCR10 , 4 .equ RPTINT_DTCCR10 , 5 ;------------------------------------------------------------------------------------ ; DTC Block Size Register 10 ;------------------------------------------------------------------------------------ .equ DTBLS10 , 0x2C91 ;------------------------------------------------------------------------------------ ; DTC Transfer Count Register 10 ;------------------------------------------------------------------------------------ .equ DTCCT10 , 0x2C92 ;------------------------------------------------------------------------------------ ; DTC Transfer Count Reload Register 10 ;------------------------------------------------------------------------------------ .equ DTRLD10 , 0x2C93 ;------------------------------------------------------------------------------------ ; DTC Source Address Register 10 ;------------------------------------------------------------------------------------ .equ DTSAR10 , 0x2C94 ;------------------------------------------------------------------------------------ ; DTC Destination Register 10 ;------------------------------------------------------------------------------------ .equ DTDAR10 , 0x2C96 ;------------------------------------------------------------------------------------ ; DTC Control Register 11 ;------------------------------------------------------------------------------------ .equ DTCCR11 , 0x2C98 .equ MODE_DTCCR11 , 0 .equ RPTSEL_DTCCR11 , 1 .equ SAMOD_DTCCR11 , 2 .equ DAMOD_DTCCR11 , 3 .equ CHNE_DTCCR11 , 4 .equ RPTINT_DTCCR11 , 5 ;------------------------------------------------------------------------------------ ; DTC Block Size Register 11 ;------------------------------------------------------------------------------------ .equ DTBLS11 , 0x2C99 ;------------------------------------------------------------------------------------ ; DTC Transfer Count Register 11 ;------------------------------------------------------------------------------------ .equ DTCCT11 , 0x2C9A ;------------------------------------------------------------------------------------ ; DTC Transfer Count Reload Register 11 ;------------------------------------------------------------------------------------ .equ DTRLD11 , 0x2C9B ;------------------------------------------------------------------------------------ ; DTC Source Address Register 11 ;------------------------------------------------------------------------------------ .equ DTSAR11 , 0x2C9C ;------------------------------------------------------------------------------------ ; DTC Destination Register 11 ;------------------------------------------------------------------------------------ .equ DTDAR11 , 0x2C9E ;------------------------------------------------------------------------------------ ; DTC Control Register 12 ;------------------------------------------------------------------------------------ .equ DTCCR12 , 0x2CA0 .equ MODE_DTCCR12 , 0 .equ RPTSEL_DTCCR12 , 1 .equ SAMOD_DTCCR12 , 2 .equ DAMOD_DTCCR12 , 3 .equ CHNE_DTCCR12 , 4 .equ RPTINT_DTCCR12 , 5 ;------------------------------------------------------------------------------------ ; DTC Block Size Register 12 ;------------------------------------------------------------------------------------ .equ DTBLS12 , 0x2CA1 ;------------------------------------------------------------------------------------ ; DTC Transfer Count Register 12 ;------------------------------------------------------------------------------------ .equ DTCCT12 , 0x2CA2 ;------------------------------------------------------------------------------------ ; DTC Transfer Count Reload Register 12 ;------------------------------------------------------------------------------------ .equ DTRLD12 , 0x2CA3 ;------------------------------------------------------------------------------------ ; DTC Source Address Register 12 ;------------------------------------------------------------------------------------ .equ DTSAR12 , 0x2CA4 ;------------------------------------------------------------------------------------ ; DTC Destination Register 12 ;------------------------------------------------------------------------------------ .equ DTDAR12 , 0x2CA6 ;------------------------------------------------------------------------------------ ; DTC Control Register 13 ;------------------------------------------------------------------------------------ .equ DTCCR13 , 0x2CA8 .equ MODE_DTCCR13 , 0 .equ RPTSEL_DTCCR13 , 1 .equ SAMOD_DTCCR13 , 2 .equ DAMOD_DTCCR13 , 3 .equ CHNE_DTCCR13 , 4 .equ RPTINT_DTCCR13 , 5 ;------------------------------------------------------------------------------------ ; DTC Block Size Register 13 ;------------------------------------------------------------------------------------ .equ DTBLS13 , 0x2CA9 ;------------------------------------------------------------------------------------ ; DTC Transfer Count Register 13 ;------------------------------------------------------------------------------------ .equ DTCCT13 , 0x2CAA ;------------------------------------------------------------------------------------ ; DTC Transfer Count Reload Register 13 ;------------------------------------------------------------------------------------ .equ DTRLD13 , 0x2CAB ;------------------------------------------------------------------------------------ ; DTC Source Address Register 13 ;------------------------------------------------------------------------------------ .equ DTSAR13 , 0x2CAC ;------------------------------------------------------------------------------------ ; DTC Destination Register 13 ;------------------------------------------------------------------------------------ .equ DTDAR13 , 0x2CAE ;------------------------------------------------------------------------------------ ; DTC Control Register 14 ;------------------------------------------------------------------------------------ .equ DTCCR14 , 0x2CB0 .equ MODE_DTCCR14 , 0 .equ RPTSEL_DTCCR14 , 1 .equ SAMOD_DTCCR14 , 2 .equ DAMOD_DTCCR14 , 3 .equ CHNE_DTCCR14 , 4 .equ RPTINT_DTCCR14 , 5 ;------------------------------------------------------------------------------------ ; DTC Block Size Register 14 ;------------------------------------------------------------------------------------ .equ DTBLS14 , 0x2CB1 ;------------------------------------------------------------------------------------ ; DTC Transfer Count Register 14 ;------------------------------------------------------------------------------------ .equ DTCCT14 , 0x2CB2 ;------------------------------------------------------------------------------------ ; DTC Transfer Count Reload Register 14 ;------------------------------------------------------------------------------------ .equ DTRLD14 , 0x2CB3 ;------------------------------------------------------------------------------------ ; DTC Source Address Register 14 ;------------------------------------------------------------------------------------ .equ DTSAR14 , 0x2CB4 ;------------------------------------------------------------------------------------ ; DTC Destination Register 14 ;------------------------------------------------------------------------------------ .equ DTDAR14 , 0x2CB6 ;------------------------------------------------------------------------------------ ; DTC Control Register 15 ;------------------------------------------------------------------------------------ .equ DTCCR15 , 0x2CB8 .equ MODE_DTCCR15 , 0 .equ RPTSEL_DTCCR15 , 1 .equ SAMOD_DTCCR15 , 2 .equ DAMOD_DTCCR15 , 3 .equ CHNE_DTCCR15 , 4 .equ RPTINT_DTCCR15 , 5 ;------------------------------------------------------------------------------------ ; DTC Block Size Register 15 ;------------------------------------------------------------------------------------ .equ DTBLS15 , 0x2CB9 ;------------------------------------------------------------------------------------ ; DTC Transfer Count Register 15 ;------------------------------------------------------------------------------------ .equ DTCCT15 , 0x2CBA ;------------------------------------------------------------------------------------ ; DTC Transfer Count Reload Register 15 ;------------------------------------------------------------------------------------ .equ DTRLD15 , 0x2CBB ;------------------------------------------------------------------------------------ ; DTC Source Address Register 15 ;------------------------------------------------------------------------------------ .equ DTSAR15 , 0x2CBC ;------------------------------------------------------------------------------------ ; DTC Destination Register 15 ;------------------------------------------------------------------------------------ .equ DTDAR15 , 0x2CBE ;------------------------------------------------------------------------------------ ; DTC Control Register 16 ;------------------------------------------------------------------------------------ .equ DTCCR16 , 0x2CC0 .equ MODE_DTCCR16 , 0 .equ RPTSEL_DTCCR16 , 1 .equ SAMOD_DTCCR16 , 2 .equ DAMOD_DTCCR16 , 3 .equ CHNE_DTCCR16 , 4 .equ RPTINT_DTCCR16 , 5 ;------------------------------------------------------------------------------------ ; DTC Block Size Register 16 ;------------------------------------------------------------------------------------ .equ DTBLS16 , 0x2CC1 ;------------------------------------------------------------------------------------ ; DTC Transfer Count Register 16 ;------------------------------------------------------------------------------------ .equ DTCCT16 , 0x2CC2 ;------------------------------------------------------------------------------------ ; DTC Transfer Count Reload Register 16 ;------------------------------------------------------------------------------------ .equ DTRLD16 , 0x2CC3 ;------------------------------------------------------------------------------------ ; DTC Source Address Register 16 ;------------------------------------------------------------------------------------ .equ DTSAR16 , 0x2CC4 ;------------------------------------------------------------------------------------ ; DTC Destination Register 16 ;------------------------------------------------------------------------------------ .equ DTDAR16 , 0x2CC6 ;------------------------------------------------------------------------------------ ; DTC Control Register 17 ;------------------------------------------------------------------------------------ .equ DTCCR17 , 0x2CC8 .equ MODE_DTCCR17 , 0 .equ RPTSEL_DTCCR17 , 1 .equ SAMOD_DTCCR17 , 2 .equ DAMOD_DTCCR17 , 3 .equ CHNE_DTCCR17 , 4 .equ RPTINT_DTCCR17 , 5 ;------------------------------------------------------------------------------------ ; DTC Block Size Register 17 ;------------------------------------------------------------------------------------ .equ DTBLS17 , 0x2CC9 ;------------------------------------------------------------------------------------ ; DTC Transfer Count Register 17 ;------------------------------------------------------------------------------------ .equ DTCCT17 , 0x2CCA ;------------------------------------------------------------------------------------ ; DTC Transfer Count Reload Register 17 ;------------------------------------------------------------------------------------ .equ DTRLD17 , 0x2CCB ;------------------------------------------------------------------------------------ ; DTC Source Address Register 17 ;------------------------------------------------------------------------------------ .equ DTSAR17 , 0x2CCC ;------------------------------------------------------------------------------------ ; DTC Destination Register 17 ;------------------------------------------------------------------------------------ .equ DTDAR17 , 0x2CCE ;------------------------------------------------------------------------------------ ; DTC Control Register 18 ;------------------------------------------------------------------------------------ .equ DTCCR18 , 0x2CD0 .equ MODE_DTCCR18 , 0 .equ RPTSEL_DTCCR18 , 1 .equ SAMOD_DTCCR18 , 2 .equ DAMOD_DTCCR18 , 3 .equ CHNE_DTCCR18 , 4 .equ RPTINT_DTCCR18 , 5 ;------------------------------------------------------------------------------------ ; DTC Block Size Register 18 ;------------------------------------------------------------------------------------ .equ DTBLS18 , 0x2CD1 ;------------------------------------------------------------------------------------ ; DTC Transfer Count Register 18 ;------------------------------------------------------------------------------------ .equ DTCCT18 , 0x2CD2 ;------------------------------------------------------------------------------------ ; DTC Transfer Count Reload Register 18 ;------------------------------------------------------------------------------------ .equ DTRLD18 , 0x2CD3 ;------------------------------------------------------------------------------------ ; DTC Source Address Register 18 ;------------------------------------------------------------------------------------ .equ DTSAR18 , 0x2CD4 ;------------------------------------------------------------------------------------ ; DTC Destination Register 18 ;------------------------------------------------------------------------------------ .equ DTDAR18 , 0x2CD6 ;------------------------------------------------------------------------------------ ; DTC Control Register 19 ;------------------------------------------------------------------------------------ .equ DTCCR19 , 0x2CD8 .equ MODE_DTCCR19 , 0 .equ RPTSEL_DTCCR19 , 1 .equ SAMOD_DTCCR19 , 2 .equ DAMOD_DTCCR19 , 3 .equ CHNE_DTCCR19 , 4 .equ RPTINT_DTCCR19 , 5 ;------------------------------------------------------------------------------------ ; DTC Block Size Register 19 ;------------------------------------------------------------------------------------ .equ DTBLS19 , 0x2CD9 ;------------------------------------------------------------------------------------ ; DTC Transfer Count Register 19 ;------------------------------------------------------------------------------------ .equ DTCCT19 , 0x2CDA ;------------------------------------------------------------------------------------ ; DTC Transfer Count Reload Register 19 ;------------------------------------------------------------------------------------ .equ DTRLD19 , 0x2CDB ;------------------------------------------------------------------------------------ ; DTC Source Address Register 19 ;------------------------------------------------------------------------------------ .equ DTSAR19 , 0x2CDC ;------------------------------------------------------------------------------------ ; DTC Destination Register 19 ;------------------------------------------------------------------------------------ .equ DTDAR19 , 0x2CDE ;------------------------------------------------------------------------------------ ; DTC Control Register 20 ;------------------------------------------------------------------------------------ .equ DTCCR20 , 0x2CE0 .equ MODE_DTCCR20 , 0 .equ RPTSEL_DTCCR20 , 1 .equ SAMOD_DTCCR20 , 2 .equ DAMOD_DTCCR20 , 3 .equ CHNE_DTCCR20 , 4 .equ RPTINT_DTCCR20 , 5 ;------------------------------------------------------------------------------------ ; DTC Block Size Register 20 ;------------------------------------------------------------------------------------ .equ DTBLS20 , 0x2CE1 ;------------------------------------------------------------------------------------ ; DTC Transfer Count Register 20 ;------------------------------------------------------------------------------------ .equ DTCCT20 , 0x2CE2 ;------------------------------------------------------------------------------------ ; DTC Transfer Count Reload Register 20 ;------------------------------------------------------------------------------------ .equ DTRLD20 , 0x2CE3 ;------------------------------------------------------------------------------------ ; DTC Source Address Register 20 ;------------------------------------------------------------------------------------ .equ DTSAR20 , 0x2CE4 ;------------------------------------------------------------------------------------ ; DTC Destination Register 20 ;------------------------------------------------------------------------------------ .equ DTDAR20 , 0x2CE6 ;------------------------------------------------------------------------------------ ; DTC Control Register 21 ;------------------------------------------------------------------------------------ .equ DTCCR21 , 0x2CE8 .equ MODE_DTCCR21 , 0 .equ RPTSEL_DTCCR21 , 1 .equ SAMOD_DTCCR21 , 2 .equ DAMOD_DTCCR21 , 3 .equ CHNE_DTCCR21 , 4 .equ RPTINT_DTCCR21 , 5 ;------------------------------------------------------------------------------------ ; DTC Block Size Register 21 ;------------------------------------------------------------------------------------ .equ DTBLS21 , 0x2CE9 ;------------------------------------------------------------------------------------ ; DTC Transfer Count Register 21 ;------------------------------------------------------------------------------------ .equ DTCCT21 , 0x2CEA ;------------------------------------------------------------------------------------ ; DTC Transfer Count Reload Register 21 ;------------------------------------------------------------------------------------ .equ DTRLD21 , 0x2CEB ;------------------------------------------------------------------------------------ ; DTC Source Address Register 21 ;------------------------------------------------------------------------------------ .equ DTSAR21 , 0x2CEC ;------------------------------------------------------------------------------------ ; DTC Destination Register 21 ;------------------------------------------------------------------------------------ .equ DTDAR21 , 0x2CEE ;------------------------------------------------------------------------------------ ; DTC Control Register 22 ;------------------------------------------------------------------------------------ .equ DTCCR22 , 0x2CF0 .equ MODE_DTCCR22 , 0 .equ RPTSEL_DTCCR22 , 1 .equ SAMOD_DTCCR22 , 2 .equ DAMOD_DTCCR22 , 3 .equ CHNE_DTCCR22 , 4 .equ RPTINT_DTCCR22 , 5 ;------------------------------------------------------------------------------------ ; DTC Block Size Register 22 ;------------------------------------------------------------------------------------ .equ DTBLS22 , 0x2CF1 ;------------------------------------------------------------------------------------ ; DTC Transfer Count Register 22 ;------------------------------------------------------------------------------------ .equ DTCCT22 , 0x2CF2 ;------------------------------------------------------------------------------------ ; DTC Transfer Count Reload Register 22 ;------------------------------------------------------------------------------------ .equ DTRLD22 , 0x2CF3 ;------------------------------------------------------------------------------------ ; DTC Source Address Register 22 ;------------------------------------------------------------------------------------ .equ DTSAR22 , 0x2CF4 ;------------------------------------------------------------------------------------ ; DTC Destination Register 22 ;------------------------------------------------------------------------------------ .equ DTDAR22 , 0x2CF6 ;------------------------------------------------------------------------------------ ; DTC Control Register 23 ;------------------------------------------------------------------------------------ .equ DTCCR23 , 0x2CF8 .equ MODE_DTCCR23 , 0 .equ RPTSEL_DTCCR23 , 1 .equ SAMOD_DTCCR23 , 2 .equ DAMOD_DTCCR23 , 3 .equ CHNE_DTCCR23 , 4 .equ RPTINT_DTCCR23 , 5 ;------------------------------------------------------------------------------------ ; DTC Block Size Register 23 ;------------------------------------------------------------------------------------ .equ DTBLS23 , 0x2CF9 ;------------------------------------------------------------------------------------ ; DTC Transfer Count Register 23 ;------------------------------------------------------------------------------------ .equ DTCCT23 , 0x2CFA ;------------------------------------------------------------------------------------ ; DTC Transfer Count Reload Register 23 ;------------------------------------------------------------------------------------ .equ DTRLD23 , 0x2CFB ;------------------------------------------------------------------------------------ ; DTC Source Address Register 23 ;------------------------------------------------------------------------------------ .equ DTSAR23 , 0x2CFC ;------------------------------------------------------------------------------------ ; DTC Destination Register 23 ;------------------------------------------------------------------------------------ .equ DTDAR23 , 0x2CFE ;------------------------------------------------------------------------------------ ; Timer RC Counter Register, General Register A,B,C,D ;------------------------------------------------------------------------------------ .equ TRC , 0x0126 ;------------------------------------------------------------------------------------ ; Timer RC Counter Register, General Register A,B,C,D ;------------------------------------------------------------------------------------ .equ TRCGRA , 0x0128 ;------------------------------------------------------------------------------------ ; Timer RC Counter Register, General Register A,B,C,D ;------------------------------------------------------------------------------------ .equ TRCGRB , 0x012A ;------------------------------------------------------------------------------------ ; Timer RC Counter Register, General Register A,B,C,D ;------------------------------------------------------------------------------------ .equ TRCGRC , 0x012C ;------------------------------------------------------------------------------------ ; Timer RC Counter Register, General Register A,B,C,D ;------------------------------------------------------------------------------------ .equ TRCGRD , 0x012E ;------------------------------------------------------------------------------------ ; Timer RC Counter Register, Timer RD Counter , General Register A,B,C,D ;------------------------------------------------------------------------------------ .equ TRD0 , 0x0146 ;------------------------------------------------------------------------------------ ; Timer RC Counter Register, Timer RD Counter , General Register A,B,C,D ;------------------------------------------------------------------------------------ .equ TRDGRA0 , 0x0148 ;------------------------------------------------------------------------------------ ; Timer RC Counter Register, Timer RD Counter , General Register A,B,C,D ;------------------------------------------------------------------------------------ .equ TRDGRB0 , 0x014A ;------------------------------------------------------------------------------------ ; Timer RC Counter Register, Timer RD Counter , General Register A,B,C,D ;------------------------------------------------------------------------------------ .equ TRDGRC0 , 0x014C ;------------------------------------------------------------------------------------ ; Timer RC Counter Register, Timer RD Counter , General Register A,B,C,D ;------------------------------------------------------------------------------------ .equ TRDGRD0 , 0x014E ;------------------------------------------------------------------------------------ ; Timer RC Counter Register, Timer RD Counter , General Register A,B,C,D ;------------------------------------------------------------------------------------ .equ TRD1 , 0x0156 ;------------------------------------------------------------------------------------ ; Timer RC Counter Register, Timer RD Counter , General Register A,B,C,D ;------------------------------------------------------------------------------------ .equ TRDGRA1 , 0x0158 ;------------------------------------------------------------------------------------ ; Timer RC Counter Register, Timer RD Counter , General Register A,B,C,D ;------------------------------------------------------------------------------------ .equ TRDGRB1 , 0x015A ;------------------------------------------------------------------------------------ ; Timer RC Counter Register, Timer RD Counter , General Register A,B,C,D ;------------------------------------------------------------------------------------ .equ TRDGRC1 , 0x015C ;------------------------------------------------------------------------------------ ; Timer RC Counter Register, Timer RD Counter , General Register A,B,C,D ;------------------------------------------------------------------------------------ .equ TRDGRD1 , 0x015E ;------------------------------------------------------------------------------------ ; Flash Memory Ready Interrupt Control Register ;------------------------------------------------------------------------------------ .equ FMRDYIC , 0x0041 ;------------------------------------------------------------------------------------ ; Timer RA1 Interrupt Control Register ;------------------------------------------------------------------------------------ .equ TRA1IC , 0x0042 ;------------------------------------------------------------------------------------ ; INT4 Interrupt Control Register ;------------------------------------------------------------------------------------ .equ INT4IC , 0x0046 ;------------------------------------------------------------------------------------ ; Timer RC Interrupt Control Register ;------------------------------------------------------------------------------------ .equ TRCIC , 0x0047 ;------------------------------------------------------------------------------------ ; Timer RD0 Interrupt Control Register ;------------------------------------------------------------------------------------ .equ TRD0IC , 0x0048 ;------------------------------------------------------------------------------------ ; Timer RD1 Interrupt Control Register ;------------------------------------------------------------------------------------ .equ TRD1IC , 0x0049 ;------------------------------------------------------------------------------------ ; Timer RE Interrupt Control Register ;------------------------------------------------------------------------------------ .equ TREIC , 0x004A ;------------------------------------------------------------------------------------ ; UART2 Transmit Interrupt Control Register ;------------------------------------------------------------------------------------ .equ S2TIC , 0x004B ;------------------------------------------------------------------------------------ ; UART2 Receive Interrupt Control Register ;------------------------------------------------------------------------------------ .equ S2RIC , 0x004C ;------------------------------------------------------------------------------------ ; Key Input Interrupt Control Register ;------------------------------------------------------------------------------------ .equ KUPIC , 0x004D ;------------------------------------------------------------------------------------ ; A/D Conversion Interrupt Control Register ;------------------------------------------------------------------------------------ .equ ADIC , 0x004E ;------------------------------------------------------------------------------------ ; SSU Interrupt Control Register ;------------------------------------------------------------------------------------ .equ SSUIC , 0x004F ;------------------------------------------------------------------------------------ ; Timer RF Compare 1 Interrupt Control Register ;------------------------------------------------------------------------------------ .equ CMP1IC , 0x0050 ;------------------------------------------------------------------------------------ ; UART0 Transmit Interrupt Control Register ;------------------------------------------------------------------------------------ .equ S0TIC , 0x0051 ;------------------------------------------------------------------------------------ ; UART0 Receive Interrupt Control Register ;------------------------------------------------------------------------------------ .equ S0RIC , 0x0052 ;------------------------------------------------------------------------------------ ; UART1 Transmit Interrupt Control Register ;------------------------------------------------------------------------------------ .equ S1TIC , 0x0053 ;------------------------------------------------------------------------------------ ; UART1 Receive Interrupt Control Register ;------------------------------------------------------------------------------------ .equ S1RIC , 0x0054 ;------------------------------------------------------------------------------------ ; INT2 Interrupt Control Register ;------------------------------------------------------------------------------------ .equ INT2IC , 0x0055 ;------------------------------------------------------------------------------------ ; Timer RA0 Interrupt Control Register ;------------------------------------------------------------------------------------ .equ TRA0IC , 0x0056 ;------------------------------------------------------------------------------------ ; Timer RB Interrupt Control Register ;------------------------------------------------------------------------------------ .equ TRBIC , 0x0058 ;------------------------------------------------------------------------------------ ; INT1 Interrupt Control Register ;------------------------------------------------------------------------------------ .equ INT1IC , 0x0059 ;------------------------------------------------------------------------------------ ; INT3 Interrupt Control Register ;------------------------------------------------------------------------------------ .equ INT3IC , 0x005A ;------------------------------------------------------------------------------------ ; Timer RF Interrupt Control Register ;------------------------------------------------------------------------------------ .equ TRFIC , 0x005B ;------------------------------------------------------------------------------------ ; Timer RF Compare 0 Interrupt Control Register ;------------------------------------------------------------------------------------ .equ CMP0IC , 0x005C ;------------------------------------------------------------------------------------ ; INT0 Interrupt Control Register ;------------------------------------------------------------------------------------ .equ INT0IC , 0x005D ;------------------------------------------------------------------------------------ ; UART2 Bus Collision Detection Interrupt Control Register ;------------------------------------------------------------------------------------ .equ U2BCNIC , 0x005E ;------------------------------------------------------------------------------------ ; Timer RF Capture Interrupt Control Register ;------------------------------------------------------------------------------------ .equ CAPIC , 0x005F ;------------------------------------------------------------------------------------ ; Timer RG Interrupt Control Register ;------------------------------------------------------------------------------------ .equ TRGIC , 0x006B ;------------------------------------------------------------------------------------ ; Voltage Monitor 1 Level Interrupt Control Register ;------------------------------------------------------------------------------------ .equ VCMP1IC , 0x0072 ;------------------------------------------------------------------------------------ ; Voltage Monitor 2 Level Interrupt Control Register ;------------------------------------------------------------------------------------ .equ VCMP2IC , 0x0073 ;------------------------------------------------------------------------------------ ; UARTi Transmit/Receive Mode Register ;------------------------------------------------------------------------------------ .equ U0MR , 0x00A0 ;------------------------------------------------------------------------------------ ; UARTi Transmit/Receive Mode Register ;------------------------------------------------------------------------------------ .equ U1MR , 0x0160 ;------------------------------------------------------------------------------------ ; UARTi Transmit/Receive Mode Register ;------------------------------------------------------------------------------------ .equ U2MR , 0x00A8 ;------------------------------------------------------------------------------------ ; UARTi Transmit/Receive Control Register0 ;------------------------------------------------------------------------------------ .equ U0C0 , 0x00A4 ;------------------------------------------------------------------------------------ ; UARTi Transmit/Receive Control Register0 ;------------------------------------------------------------------------------------ .equ U1C0 , 0x0164 ;------------------------------------------------------------------------------------ ; UARTi Transmit/Receive Control Register0 ;------------------------------------------------------------------------------------ .equ U2C0 , 0x00AC ;------------------------------------------------------------------------------------ ; UARTi Transmit/Receive Control Register1 ;------------------------------------------------------------------------------------ .equ U0C1 , 0x00A5 ;------------------------------------------------------------------------------------ ; UARTi Transmit/Receive Control Register1 ;------------------------------------------------------------------------------------ .equ U1C1 , 0x0165 ;------------------------------------------------------------------------------------ ; UARTi Transmit/Receive Control Register1 ;------------------------------------------------------------------------------------ .equ U2C1 , 0x00AD ;------------------------------------------------------------------------------------ ; UARTi Receive Buffer Register ;------------------------------------------------------------------------------------ .equ U0RB , 0x00A6 ;------------------------------------------------------------------------------------ ; UARTi Receive Buffer Register ;------------------------------------------------------------------------------------ .equ U1RB , 0x0166 ;------------------------------------------------------------------------------------ ; UARTi Receive Buffer Register ;------------------------------------------------------------------------------------ .equ U2RB , 0x00AE ;------------------------------------------------------------------------------------ ; UARTi Receive Buffer Register ;------------------------------------------------------------------------------------ .equ RMAD0 , 0x01C0 ;------------------------------------------------------------------------------------ ; UARTi Receive Buffer Register ;------------------------------------------------------------------------------------ .equ RMAD1 , 0x01C4 ;------------------------------------------------------------------------------------ ; UARTi Receive Buffer Register ;------------------------------------------------------------------------------------ .equ U0TB , 0x00A2 ;------------------------------------------------------------------------------------ ; UARTi Receive Buffer Register ;------------------------------------------------------------------------------------ .equ U1TB , 0x0162 ;------------------------------------------------------------------------------------ ; UARTi Receive Buffer Register ;------------------------------------------------------------------------------------ .equ U2TB , 0x00AA ;------------------------------------------------------------------------------------ ; UARTi Receive Buffer Register ;------------------------------------------------------------------------------------ .equ AD0 , 0x00C0 ;------------------------------------------------------------------------------------ ; UARTi Receive Buffer Register ;------------------------------------------------------------------------------------ .equ AD1 , 0x00C2 ;------------------------------------------------------------------------------------ ; UARTi Receive Buffer Register ;------------------------------------------------------------------------------------ .equ AD2 , 0x00C4 ;------------------------------------------------------------------------------------ ; UARTi Receive Buffer Register ;------------------------------------------------------------------------------------ .equ AD3 , 0x00C6 ;------------------------------------------------------------------------------------ ; UARTi Receive Buffer Register ;------------------------------------------------------------------------------------ .equ AD4 , 0x00C8 ;------------------------------------------------------------------------------------ ; UARTi Receive Buffer Register ;------------------------------------------------------------------------------------ .equ AD5 , 0x00CA ;------------------------------------------------------------------------------------ ; UARTi Receive Buffer Register ;------------------------------------------------------------------------------------ .equ AD6 , 0x00CC ;------------------------------------------------------------------------------------ ; UARTi Receive Buffer Register ;------------------------------------------------------------------------------------ .equ AD7 , 0x00CE ;------------------------------------------------------------------------------------ ; SS Transmit Data Register ;------------------------------------------------------------------------------------ .equ SSTDR , 0x0194 ;------------------------------------------------------------------------------------ ; SS Receive Data Register ;------------------------------------------------------------------------------------ .equ SSRDR , 0x0196 ;------------------------------------------------------------------------------------ ; definitiond for unilib ;------------------------------------------------------------------------------------ .equ P0_PIO , 0x00E0 .equ P0_DIR , 0x00E2 .equ P0_PIN , 0x00E0 .equ P0_PEN , 0x0001 .equ P1_PIO , 0x00E1 .equ P1_DIR , 0x00E3 .equ P1_PIN , 0x00E1 .equ P1_PEN , 0x0004 .equ P2_PIO , 0x00E4 .equ P2_DIR , 0x00E6 .equ P2_PIN , 0x00E4 .equ P2_PEN , 0x0010 .equ P3_PIO , 0x00E5 .equ P3_DIR , 0x00E7 .equ P3_PIN , 0x00E5 .equ P3_PEN , 0x0040 .equ P4_PIO , 0x00E8 .equ P4_DIR , 0x00EA .equ P4_PIN , 0x00E8 .equ P4_PEN , 0x0001 .equ P5_PIO , 0x00E9 .equ P5_DIR , 0x00EB .equ P5_PIN , 0x00E9 .equ P5_PEN , 0x0004 .equ P6_PIO , 0x00EC .equ P6_DIR , 0x00EE .equ P6_PIN , 0x00EC .equ P6_PEN , 0x0010 .equ P7_PIO , 0xFFFF .equ P7_DIR , 0xFFFF .equ P7_PIN , 0xFFFF .equ P7_PEN , 0x0000 .equ P8_PIO , 0x00F0 .equ P8_DIR , 0x00F2 .equ P8_PIN , 0x00F0 .equ P8_PEN , 0x0001 .equ P9_PIO , 0xFFFF .equ P9_DIR , 0xFFFF .equ P9_PIN , 0xFFFF .equ P9_PEN , 0x0000 .equ PC_PIO , 0xFFFF .equ PC_DIR , 0xFFFF .equ PC_PIN , 0xFFFF .equ PC_PEN , 0x0000 .equ PORT_0 , 0x0 .equ PORT_1 , 0x8 .equ PORT_2 , 0x16 .equ PORT_3 , 0x24 .equ PORT_4 , 0x32 .equ PORT_5 , 0x40 .equ PORT_6 , 0x48 .equ PORT_8 , 0x56 .equ PUR_0123 , 0x01E0 .equ PUR_4567 , 0x01E1 .equ PUR_89 , 0x01E2 .equ PWM0 , 1 .equ PWM0_PORT , PORT_6 .equ PWM0_PIN , 5 .equ PWM1 , 1 .equ PWM1_PORT , PORT_6 .equ PWM1_PIN , 6 .equ PWM2 , 1 .equ PWM2_PORT , PORT_6 .equ PWM2_PIN , 7 .equ UART0 , 1 .equ UART0_PORT , PORT_1 .equ UART0_RXD_PIN , 5 .equ UART0_TXD_PIN , 4 .equ UART2 , 1 .equ UART2_PORT , PORT_6 .equ UART2_RXD_PIN , 4 .equ UART2_TXD_PIN , 3 .equ EXTINT0 , 1 .equ EINT0_PORT , PORT_4 .equ EINT0_PIN , 5 .equ EXTINT1 , 1 .equ EINT1_PORT , PORT_1 .equ EINT1_PIN , 7 .equ SPI0 , 1 .equ HAVE_SPI0 , 0 .equ SPI0_PORT , PORT_3 .equ SPI0_SS_PIN , 3 .equ SPI0_SCK_PIN , 5 .equ SPI0_SI_PIN , 4 .equ SPI0_SO_PIN , 7 .equ ADC , 1 .equ ADC_CH0_PORT , PORT_0 .equ ADC_CH0_PIN , 7 .equ ADC_CH0_NUM , 0x00 .equ ADC_CH0_REG , AD0 .equ ADC_CH1_PORT , PORT_0 .equ ADC_CH1_PIN , 6 .equ ADC_CH1_NUM , 0x01 .equ ADC_CH1_REG , AD1 .equ ADC_CH2_PORT , PORT_0 .equ ADC_CH2_PIN , 5 .equ ADC_CH2_NUM , 0x02 .equ ADC_CH2_REG , AD2 .equ ADC_CH3_PORT , PORT_0 .equ ADC_CH3_PIN , 4 .equ ADC_CH3_NUM , 0x03 .equ ADC_CH3_REG , AD3 .equ ADC_CH4_PORT , PORT_0 .equ ADC_CH4_PIN , 3 .equ ADC_CH4_NUM , 0x04 .equ ADC_CH4_REG , AD4 .equ ADC_CH5_PORT , PORT_0 .equ ADC_CH5_PIN , 2 .equ ADC_CH5_NUM , 0x05 .equ ADC_CH5_REG , AD5 .equ ADC_CH6_PORT , PORT_0 .equ ADC_CH6_PIN , 1 .equ ADC_CH6_NUM , 0x06 .equ ADC_CH6_REG , AD6 .equ ADC_CH7_PORT , PORT_0 .equ ADC_CH7_PIN , 0 .equ ADC_CH7_NUM , 0x07 .equ ADC_CH7_REG , AD7 .equ CLOCKSYS1 , 1 .equ CLOCK_I_4 , 0x0400 .equ CLOCK_I_8 , 0x0800 .equ CLOCK_I_16 , 0x1000 .equ CLOCK_I_20 , 0x1400 .equ CLOCK_4_4 , 0x0404 .equ CLOCK_4_8 , 0x0804 .equ CLOCK_4_16 , 0x1004 .equ CLOCK_4_32 , 0x2004 .equ CLOCK_8_4 , 0x0408 .equ CLOCK_8_8 , 0x0808 .equ CLOCK_8_16 , 0x1008 .equ CLOCK_8_32 , 0x2008 .equ CLOCK_16_4 , 0x0410 .equ CLOCK_16_8 , 0x0810 .equ CLOCK_16_16 , 0x1010 .equ CLOCK_16_32 , 0x2010 .equ HAVE_TICK , 1 .equ VECTAB1 , 1