; DIR/STEP to GRAY code decoder for position interface 
; ATtiny13 @ 9.6MHz

; PB0: gray code signal A, output
; PB1: gray code signal B, output
; PB2: DIR, input
; PB3: STEP, input

.include "tn13adef.inc"

.def    tmp  = r16
.def    c0   = r17
.def    c1   = r18
.def    c2   = r19
.def    c3   = r20
.def    tmp2 = r21

.equ    DIR_BIT  = 2
.equ    STEP_BIT = 3


; macro for rising edge detection of STEP
; includes sampling of DIR for further processing
; sampling loop takes 5 CPU cycles

.macro wait_pos_edge
loop:
    mov     tmp2, tmp
    in      tmp, PINB
    sbrs    tmp, STEP_BIT
    rjmp    loop
    sbrc    tmp2, STEP_BIT
    rjmp    loop
.endm

.org 0
    ldi     tmp, 3
    out     DDRB, tmp
    ldi     c0, 0
    ldi     c1, 1
    ldi     c2, 2
    ldi     c3, 3
    ldi     tmp, 0
    ldi     tmp2, 0

; FSM with minimal overhead for maximum speed

gray0:
    out     portb, c0
    wait_pos_edge
    sbrc    tmp, DIR_BIT    ; forward
    rjmp    gray2           ; backward

gray1:
    out     portb, c1
    wait_pos_edge
    sbrc    tmp, DIR_BIT    ; forward
    rjmp    gray0           ; backward

gray3:
    out     portb, c3
    wait_pos_edge
    sbrc    tmp, DIR_BIT    ; forward
    rjmp    gray1           ; backward

gray2:
    out     portb, c2
    wait_pos_edge
    sbrc    tmp, DIR_BIT    ; forward
    rjmp    gray3           ; backward

end_FSM:
    rjmp    gray0