Signal Name Total Product Terms Product Terms Location Power Mode Pin Number PinType Pin Use
(unused) 0   MC1     (b)  
SRAM_AH<0> 2   2_1  2_2 MC2 STD 24 I/O O
(unused) 0   MC3     (b)  
Port_Reg<2>/Port_Reg<2>_SETF 3   4_1  4_2  4_3 MC4 STD   (b) (b)
AVR_AD<0> 4   5_1  5_2  5_3  5_4 MC5 STD 25 I/O I/O
Port_Reg<1>/Port_Reg<1>_SETF 3   6_1  6_2  6_3 MC6 STD   (b) (b)
Port_Reg<0>/Port_Reg<0>_SETF 3   7_1  7_2  7_3 MC7 STD   (b) (b)
AVR_AD<1> 4   8_1  8_2  8_3  8_4 MC8 STD 26 I/O I/O
Bank_Reg<4> 2   9_1  9_2    MC9 STD 27 I/O I
Bank_Reg<3> 2   10_1  10_2    MC10 STD   (b) (b)
AVR_AD<2> 4   11_1  11_2  11_3  11_4 MC11 STD 28 I/O I/O
Bank_Reg<2>/Bank_Reg<2>_SETF 3   12_1  12_2  12_3 MC12 STD   (b) (b)
Bank_Reg<2> 2   13_1  13_2    MC13 STD   (b) (b)
Bank_Reg<1>/Bank_Reg<1>_SETF 3   14_1  14_2  14_3 MC14 STD 29 I/O I
Bank_Reg<1> 2   15_1  15_2    MC15 STD 33 I/O I
Bank_Reg<0>/Bank_Reg<0>_SETF 3   16_1  16_2  16_3 MC16 STD   (b) (b)
SRAM_AH<1> 2   17_1  17_2 MC17 STD 34 I/O O
Bank_Reg<0> 2   18_1  18_2    MC18 STD   (b) (b)

Signals Used By Logic in Function Block
  1. $OpTx$$OpTx$FX_DC$8_INV$382
  2. AVR_AH<0>
  3. AVR_AH<1>
  4. AVR_AH<2>
  5. AVR_AH<3>
  6. AVR_AH<4>
  7. AVR_AH<5>
  8. AVR_AH<6>
  9. AVR_AH<7>
  10. AVR_RD
  11. AVR_WR
  12. Bank_Reg<0>.FBK.LFBK
  13. Bank_Reg<0>/Bank_Reg<0>_SETF.FBK.LFBK
  14. Bank_Reg<1>.FBK.LFBK
  15. Bank_Reg<1>/Bank_Reg<1>_SETF.FBK.LFBK
  16. Bank_Reg<2>.FBK.LFBK
  17. Bank_Reg<2>/Bank_Reg<2>_SETF.FBK.LFBK
  18. Bank_Reg<3>/Bank_Reg<3>_SETF
  19. Bank_Reg<4>.FBK.LFBK
  20. Bank_Reg<4>/Bank_Reg<4>_SETF
  21. Bank_Reg<5>
  22. AVR_AD<0>.PIN
  23. AVR_AD<1>.PIN
  24. AVR_AD<2>.PIN
  25. SPI_CS<0>.PIN
  26. SPI_CS<1>.PIN
  27. SPI_CS<2>.PIN