
09a-RTC_DS1307_UART.elf:     file format elf32-avr

Sections:
Idx Name          Size      VMA       LMA       File off  Algn
  0 .data         00000006  00800100  00000400  00000474  2**0
                  CONTENTS, ALLOC, LOAD, DATA
  1 .text         00000400  00000000  00000000  00000074  2**1
                  CONTENTS, ALLOC, LOAD, READONLY, CODE
  2 .comment      00000030  00000000  00000000  0000047a  2**0
                  CONTENTS, READONLY
  3 .note.gnu.avr.deviceinfo 00000040  00000000  00000000  000004ac  2**2
                  CONTENTS, READONLY
  4 .debug_aranges 00000108  00000000  00000000  000004ec  2**0
                  CONTENTS, READONLY, DEBUGGING
  5 .debug_info   000010a5  00000000  00000000  000005f4  2**0
                  CONTENTS, READONLY, DEBUGGING
  6 .debug_abbrev 00000ae7  00000000  00000000  00001699  2**0
                  CONTENTS, READONLY, DEBUGGING
  7 .debug_line   000008b1  00000000  00000000  00002180  2**0
                  CONTENTS, READONLY, DEBUGGING
  8 .debug_frame  000001c8  00000000  00000000  00002a34  2**2
                  CONTENTS, READONLY, DEBUGGING
  9 .debug_str    000004dc  00000000  00000000  00002bfc  2**0
                  CONTENTS, READONLY, DEBUGGING
 10 .debug_loc    00000460  00000000  00000000  000030d8  2**0
                  CONTENTS, READONLY, DEBUGGING
 11 .debug_ranges 000000b8  00000000  00000000  00003538  2**0
                  CONTENTS, READONLY, DEBUGGING

Disassembly of section .text:

00000000 <__vectors>:
   0:	0c 94 34 00 	jmp	0x68	; 0x68 <__ctors_end>
   4:	0c 94 49 00 	jmp	0x92	; 0x92 <__bad_interrupt>
   8:	0c 94 49 00 	jmp	0x92	; 0x92 <__bad_interrupt>
   c:	0c 94 49 00 	jmp	0x92	; 0x92 <__bad_interrupt>
  10:	0c 94 49 00 	jmp	0x92	; 0x92 <__bad_interrupt>
  14:	0c 94 49 00 	jmp	0x92	; 0x92 <__bad_interrupt>
  18:	0c 94 49 00 	jmp	0x92	; 0x92 <__bad_interrupt>
  1c:	0c 94 49 00 	jmp	0x92	; 0x92 <__bad_interrupt>
  20:	0c 94 49 00 	jmp	0x92	; 0x92 <__bad_interrupt>
  24:	0c 94 49 00 	jmp	0x92	; 0x92 <__bad_interrupt>
  28:	0c 94 49 00 	jmp	0x92	; 0x92 <__bad_interrupt>
  2c:	0c 94 49 00 	jmp	0x92	; 0x92 <__bad_interrupt>
  30:	0c 94 49 00 	jmp	0x92	; 0x92 <__bad_interrupt>
  34:	0c 94 49 00 	jmp	0x92	; 0x92 <__bad_interrupt>
  38:	0c 94 49 00 	jmp	0x92	; 0x92 <__bad_interrupt>
  3c:	0c 94 49 00 	jmp	0x92	; 0x92 <__bad_interrupt>
  40:	0c 94 49 00 	jmp	0x92	; 0x92 <__bad_interrupt>
  44:	0c 94 49 00 	jmp	0x92	; 0x92 <__bad_interrupt>
  48:	0c 94 49 00 	jmp	0x92	; 0x92 <__bad_interrupt>
  4c:	0c 94 49 00 	jmp	0x92	; 0x92 <__bad_interrupt>
  50:	0c 94 49 00 	jmp	0x92	; 0x92 <__bad_interrupt>
  54:	0c 94 49 00 	jmp	0x92	; 0x92 <__bad_interrupt>
  58:	0c 94 49 00 	jmp	0x92	; 0x92 <__bad_interrupt>
  5c:	0c 94 49 00 	jmp	0x92	; 0x92 <__bad_interrupt>
  60:	0c 94 49 00 	jmp	0x92	; 0x92 <__bad_interrupt>
  64:	0c 94 49 00 	jmp	0x92	; 0x92 <__bad_interrupt>

00000068 <__ctors_end>:
  68:	11 24       	eor	r1, r1
  6a:	1f be       	out	0x3f, r1	; 63
  6c:	cf ef       	ldi	r28, 0xFF	; 255
  6e:	d8 e0       	ldi	r29, 0x08	; 8
  70:	de bf       	out	0x3e, r29	; 62
  72:	cd bf       	out	0x3d, r28	; 61

00000074 <__do_copy_data>:
  74:	11 e0       	ldi	r17, 0x01	; 1
  76:	a0 e0       	ldi	r26, 0x00	; 0
  78:	b1 e0       	ldi	r27, 0x01	; 1
  7a:	e0 e0       	ldi	r30, 0x00	; 0
  7c:	f4 e0       	ldi	r31, 0x04	; 4
  7e:	02 c0       	rjmp	.+4      	; 0x84 <__do_copy_data+0x10>
  80:	05 90       	lpm	r0, Z+
  82:	0d 92       	st	X+, r0
  84:	a6 30       	cpi	r26, 0x06	; 6
  86:	b1 07       	cpc	r27, r17
  88:	d9 f7       	brne	.-10     	; 0x80 <__do_copy_data+0xc>
  8a:	0e 94 56 00 	call	0xac	; 0xac <main>
  8e:	0c 94 fe 01 	jmp	0x3fc	; 0x3fc <_exit>

00000092 <__bad_interrupt>:
  92:	0c 94 00 00 	jmp	0	; 0x0 <__vectors>

00000096 <DELAY_ms>:
     It generates a delay of 1ms for each count,
     if 1000 is passed as the argument then it generates delay of 1000ms(1sec)
 ***************************************************************************************************/
void DELAY_ms(uint16_t ms_count) 
{
    while (ms_count != 0) 
  96:	00 97       	sbiw	r24, 0x00	; 0
  98:	41 f0       	breq	.+16     	; 0xaa <DELAY_ms+0x14>
	#else
		//round up by default
		__ticks_dc = (uint32_t)(ceil(fabs(__tmp)));
	#endif

	__builtin_avr_delay_cycles(__ticks_dc);
  9a:	ef ec       	ldi	r30, 0xCF	; 207
  9c:	f7 e0       	ldi	r31, 0x07	; 7
  9e:	31 97       	sbiw	r30, 0x01	; 1
  a0:	f1 f7       	brne	.-4      	; 0x9e <DELAY_ms+0x8>
  a2:	00 c0       	rjmp	.+0      	; 0xa4 <DELAY_ms+0xe>
  a4:	00 00       	nop
    {
        _delay_us(1000); //DELAY_us is called to generate 1ms delay
        ms_count--;
  a6:	01 97       	sbiw	r24, 0x01	; 1
  a8:	f6 cf       	rjmp	.-20     	; 0x96 <DELAY_ms>
    }
}
  aa:	08 95       	ret

000000ac <main>:
#include "uart.h"
#include "delay.h"
#include <string.h>

int main() 
{
  ac:	cf 93       	push	r28
  ae:	df 93       	push	r29
  b0:	cd b7       	in	r28, 0x3d	; 61
  b2:	de b7       	in	r29, 0x3e	; 62
  b4:	27 97       	sbiw	r28, 0x07	; 7
  b6:	0f b6       	in	r0, 0x3f	; 63
  b8:	f8 94       	cli
  ba:	de bf       	out	0x3e, r29	; 62
  bc:	0f be       	out	0x3f, r0	; 63
  be:	cd bf       	out	0x3d, r28	; 61
    rtc_t rtc; 
	uart_init();
  c0:	0e 94 7a 01 	call	0x2f4	; 0x2f4 <uart_init>
    RTC_Init();
  c4:	0e 94 9d 00 	call	0x13a	; 0x13a <RTC_Init>
    rtc.hour = 0x10; //  10:40:20 am
  c8:	80 e1       	ldi	r24, 0x10	; 16
  ca:	8b 83       	std	Y+3, r24	; 0x03
    rtc.min =  0x40;
  cc:	80 e4       	ldi	r24, 0x40	; 64
  ce:	8a 83       	std	Y+2, r24	; 0x02
    rtc.sec =  0x00;
  d0:	19 82       	std	Y+1, r1	; 0x01

    rtc.date = 0x01; //1st Jan 2016
  d2:	81 e0       	ldi	r24, 0x01	; 1
  d4:	8d 83       	std	Y+5, r24	; 0x05
    rtc.month = 0x01;
  d6:	8e 83       	std	Y+6, r24	; 0x06
    rtc.year = 0x16;
  d8:	86 e1       	ldi	r24, 0x16	; 22
  da:	8f 83       	std	Y+7, r24	; 0x07
    rtc.weekDay = 5; // Friday: 5th day of week considering monday as first day.
  dc:	85 e0       	ldi	r24, 0x05	; 5
  de:	8c 83       	std	Y+4, r24	; 0x04

    /*##### Set the time and Date only once. Once the Time and Date is set, comment these lines
         and reflash the code. Else the time will be set every time the controller is reset*/
    RTC_SetDateTime(&rtc);  //  10:40:20 am, 1st Jan 2016
  e0:	ce 01       	movw	r24, r28
  e2:	01 96       	adiw	r24, 0x01	; 1
  e4:	0e 94 aa 00 	call	0x154	; 0x154 <RTC_SetDateTime>


    /* Display the Time and Date continuously */
    while(1)
    {
		uart_puts("Test");
  e8:	80 e0       	ldi	r24, 0x00	; 0
  ea:	91 e0       	ldi	r25, 0x01	; 1
  ec:	0e 94 94 01 	call	0x328	; 0x328 <uart_puts>
        RTC_GetDateTime(&rtc);
  f0:	ce 01       	movw	r24, r28
  f2:	01 96       	adiw	r24, 0x01	; 1
  f4:	0e 94 cc 00 	call	0x198	; 0x198 <RTC_GetDateTime>
		uart_puti(rtc.sec);
  f8:	89 81       	ldd	r24, Y+1	; 0x01
  fa:	90 e0       	ldi	r25, 0x00	; 0
  fc:	0e 94 a0 01 	call	0x340	; 0x340 <uart_puti>
		uart_puti(rtc.min);		
 100:	8a 81       	ldd	r24, Y+2	; 0x02
 102:	90 e0       	ldi	r25, 0x00	; 0
 104:	0e 94 a0 01 	call	0x340	; 0x340 <uart_puti>
		uart_puti(rtc.hour);
 108:	8b 81       	ldd	r24, Y+3	; 0x03
 10a:	90 e0       	ldi	r25, 0x00	; 0
 10c:	0e 94 a0 01 	call	0x340	; 0x340 <uart_puti>
		uart_puti(rtc.date);
 110:	8d 81       	ldd	r24, Y+5	; 0x05
 112:	90 e0       	ldi	r25, 0x00	; 0
 114:	0e 94 a0 01 	call	0x340	; 0x340 <uart_puti>
		uart_puti(rtc.month);
 118:	8e 81       	ldd	r24, Y+6	; 0x06
 11a:	90 e0       	ldi	r25, 0x00	; 0
 11c:	0e 94 a0 01 	call	0x340	; 0x340 <uart_puti>
		uart_puti(rtc.year);
 120:	8f 81       	ldd	r24, Y+7	; 0x07
 122:	90 e0       	ldi	r25, 0x00	; 0
 124:	0e 94 a0 01 	call	0x340	; 0x340 <uart_puti>
		uart_puti(rtc.weekDay);
 128:	8c 81       	ldd	r24, Y+4	; 0x04
 12a:	90 e0       	ldi	r25, 0x00	; 0
 12c:	0e 94 a0 01 	call	0x340	; 0x340 <uart_puti>
		DELAY_ms(100);
 130:	84 e6       	ldi	r24, 0x64	; 100
 132:	90 e0       	ldi	r25, 0x00	; 0
 134:	0e 94 4b 00 	call	0x96	; 0x96 <DELAY_ms>
 138:	d7 cf       	rjmp	.-82     	; 0xe8 <main+0x3c>

0000013a <RTC_Init>:

 * description :This function is used to Initialize the Ds1307 RTC.
***************************************************************************************************/
void RTC_Init(void)
{
    i2c_init();                             // Initialize the I2c module.
 13a:	0e 94 f3 00 	call	0x1e6	; 0x1e6 <i2c_init>
    i2c_start(C_Ds1307WriteMode_U8);
 13e:	80 ed       	ldi	r24, 0xD0	; 208
 140:	0e 94 f9 00 	call	0x1f2	; 0x1f2 <i2c_start>
    i2c_write(C_Ds1307ControlRegAddress_U8);// Select the Ds1307 ControlRegister to configure Ds1307
 144:	87 e0       	ldi	r24, 0x07	; 7
 146:	0e 94 55 01 	call	0x2aa	; 0x2aa <i2c_write>
    i2c_write(0x00);                        // Write 0x00 to Control register to disable SQW-Out
 14a:	80 e0       	ldi	r24, 0x00	; 0
 14c:	0e 94 55 01 	call	0x2aa	; 0x2aa <i2c_write>
    i2c_stop();                             // Stop I2C communication after initializing DS1307
 150:	0c 94 4d 01 	jmp	0x29a	; 0x29a <i2c_stop>

00000154 <RTC_SetDateTime>:
        Note: The date and time should be of BCD format, 
             like 0x12,0x39,0x26 for 12hr,39min and 26sec.    
                  0x15,0x08,0x47 for 15th day,8th month and 47th year.                 
***************************************************************************************************/
void RTC_SetDateTime(rtc_t *rtc)
{
 154:	cf 93       	push	r28
 156:	df 93       	push	r29
 158:	ec 01       	movw	r28, r24
	i2c_start(C_Ds1307WriteMode_U8);                          // Start I2C communication
 15a:	80 ed       	ldi	r24, 0xD0	; 208
 15c:	0e 94 f9 00 	call	0x1f2	; 0x1f2 <i2c_start>
    i2c_write(C_Ds1307SecondRegAddress_U8); // Request sec RAM address at 00H
 160:	80 e0       	ldi	r24, 0x00	; 0
 162:	0e 94 55 01 	call	0x2aa	; 0x2aa <i2c_write>
	
    i2c_write(rtc->sec);                    // Write sec from RAM address 00H
 166:	88 81       	ld	r24, Y
 168:	0e 94 55 01 	call	0x2aa	; 0x2aa <i2c_write>
    i2c_write(rtc->min);                    // Write min from RAM address 01H
 16c:	89 81       	ldd	r24, Y+1	; 0x01
 16e:	0e 94 55 01 	call	0x2aa	; 0x2aa <i2c_write>
    i2c_write(rtc->hour);                    // Write hour from RAM address 02H
 172:	8a 81       	ldd	r24, Y+2	; 0x02
 174:	0e 94 55 01 	call	0x2aa	; 0x2aa <i2c_write>
    i2c_write(rtc->weekDay);                // Write weekDay on RAM address 03H
 178:	8b 81       	ldd	r24, Y+3	; 0x03
 17a:	0e 94 55 01 	call	0x2aa	; 0x2aa <i2c_write>
    i2c_write(rtc->date);                    // Write date on RAM address 04H
 17e:	8c 81       	ldd	r24, Y+4	; 0x04
 180:	0e 94 55 01 	call	0x2aa	; 0x2aa <i2c_write>
    i2c_write(rtc->month);                    // Write month on RAM address 05H
 184:	8d 81       	ldd	r24, Y+5	; 0x05
 186:	0e 94 55 01 	call	0x2aa	; 0x2aa <i2c_write>
    i2c_write(rtc->year);                    // Write year on RAM address 06h
 18a:	8e 81       	ldd	r24, Y+6	; 0x06
 18c:	0e 94 55 01 	call	0x2aa	; 0x2aa <i2c_write>

    i2c_stop();                              // Stop I2C communication after Setting the Date
}
 190:	df 91       	pop	r29
 192:	cf 91       	pop	r28
    i2c_write(rtc->weekDay);                // Write weekDay on RAM address 03H
    i2c_write(rtc->date);                    // Write date on RAM address 04H
    i2c_write(rtc->month);                    // Write month on RAM address 05H
    i2c_write(rtc->year);                    // Write year on RAM address 06h

    i2c_stop();                              // Stop I2C communication after Setting the Date
 194:	0c 94 4d 01 	jmp	0x29a	; 0x29a <i2c_stop>

00000198 <RTC_GetDateTime>:
    Note: The date and time read from Ds1307 will be of BCD format, 
          like 0x12,0x39,0x26 for 12hr,39min and 26sec.    
               0x15,0x08,0x47 for 15th day,8th month and 47th year.              
***************************************************************************************************/
void RTC_GetDateTime(rtc_t *rtc)
{
 198:	cf 93       	push	r28
 19a:	df 93       	push	r29
 19c:	ec 01       	movw	r28, r24
    i2c_start_wait(C_Ds1307WriteMode_U8);                            // Start I2C communication
 19e:	80 ed       	ldi	r24, 0xD0	; 208
 1a0:	0e 94 24 01 	call	0x248	; 0x248 <i2c_start_wait>
    i2c_write(C_Ds1307SecondRegAddress_U8); // Request Sec RAM address at 00H
 1a4:	80 e0       	ldi	r24, 0x00	; 0
 1a6:	0e 94 55 01 	call	0x2aa	; 0x2aa <i2c_write>

    i2c_rep_start(C_Ds1307WriteMode_U8+I2C_READ);
 1aa:	81 ed       	ldi	r24, 0xD1	; 209
 1ac:	0e 94 4b 01 	call	0x296	; 0x296 <i2c_rep_start>
	TWDR = 0x00;
 1b0:	10 92 bb 00 	sts	0x00BB, r1	; 0x8000bb <__TEXT_REGION_LENGTH__+0x7f80bb>
    rtc->sec = i2c_readAck();                // read second and return Positive ACK 1
 1b4:	0e 94 66 01 	call	0x2cc	; 0x2cc <i2c_readAck>
 1b8:	88 83       	st	Y, r24
    rtc->min = i2c_readAck();                 // read minute and return Positive ACK
 1ba:	0e 94 66 01 	call	0x2cc	; 0x2cc <i2c_readAck>
 1be:	89 83       	std	Y+1, r24	; 0x01
    rtc->hour = i2c_readAck();               // read hour and return Negative/No ACK
 1c0:	0e 94 66 01 	call	0x2cc	; 0x2cc <i2c_readAck>
 1c4:	8a 83       	std	Y+2, r24	; 0x02
    rtc->weekDay = i2c_readAck();           // read weekDay and return Positive ACK
 1c6:	0e 94 66 01 	call	0x2cc	; 0x2cc <i2c_readAck>
 1ca:	8b 83       	std	Y+3, r24	; 0x03
    rtc->date = i2c_readAck();              // read Date and return Positive ACK
 1cc:	0e 94 66 01 	call	0x2cc	; 0x2cc <i2c_readAck>
 1d0:	8c 83       	std	Y+4, r24	; 0x04
    rtc->month = i2c_readAck();            // read Month and return Positive ACK
 1d2:	0e 94 66 01 	call	0x2cc	; 0x2cc <i2c_readAck>
 1d6:	8d 83       	std	Y+5, r24	; 0x05
    rtc->year =	i2c_readNak();             // read Year and return Negative/No ACK 0
 1d8:	0e 94 70 01 	call	0x2e0	; 0x2e0 <i2c_readNak>
 1dc:	8e 83       	std	Y+6, r24	; 0x06

    i2c_stop();                              // Stop I2C communication after reading the Date
 1de:	df 91       	pop	r29
 1e0:	cf 91       	pop	r28
    rtc->weekDay = i2c_readAck();           // read weekDay and return Positive ACK
    rtc->date = i2c_readAck();              // read Date and return Positive ACK
    rtc->month = i2c_readAck();            // read Month and return Positive ACK
    rtc->year =	i2c_readNak();             // read Year and return Negative/No ACK 0

    i2c_stop();                              // Stop I2C communication after reading the Date
 1e2:	0c 94 4d 01 	jmp	0x29a	; 0x29a <i2c_stop>

000001e6 <i2c_init>:
 Initialization of the I2C bus interface. Need to be called only once
*************************************************************************/
void i2c_init(void)
{
  /* initialize TWI clock: 100 kHz clock, TWPS = 0 => prescaler = 1 */
  TWSR = 0;                         /* no prescaler */
 1e6:	10 92 b9 00 	sts	0x00B9, r1	; 0x8000b9 <__TEXT_REGION_LENGTH__+0x7f80b9>
  TWBR = ((F_CPU/SCL_CLOCK)-16)/2;  /* must be > 10 for stable operation */
 1ea:	80 e2       	ldi	r24, 0x20	; 32
 1ec:	80 93 b8 00 	sts	0x00B8, r24	; 0x8000b8 <__TEXT_REGION_LENGTH__+0x7f80b8>
 1f0:	08 95       	ret

000001f2 <i2c_start>:
unsigned char i2c_start(unsigned char address)
{
    uint8_t   twst;

	// send START condition
	TWCR = (1<<TWINT) | (1<<TWSTA) | (1<<TWEN);
 1f2:	94 ea       	ldi	r25, 0xA4	; 164
 1f4:	90 93 bc 00 	sts	0x00BC, r25	; 0x8000bc <__TEXT_REGION_LENGTH__+0x7f80bc>

	// wait until transmission completed
	while(!(TWCR & (1<<TWINT)));
 1f8:	90 91 bc 00 	lds	r25, 0x00BC	; 0x8000bc <__TEXT_REGION_LENGTH__+0x7f80bc>
 1fc:	97 ff       	sbrs	r25, 7
 1fe:	fc cf       	rjmp	.-8      	; 0x1f8 <i2c_start+0x6>
	#else
		//round up by default
		__ticks_dc = (uint32_t)(ceil(fabs(__tmp)));
	#endif

	__builtin_avr_delay_cycles(__ticks_dc);
 200:	2f ef       	ldi	r18, 0xFF	; 255
 202:	30 e7       	ldi	r19, 0x70	; 112
 204:	92 e0       	ldi	r25, 0x02	; 2
 206:	21 50       	subi	r18, 0x01	; 1
 208:	30 40       	sbci	r19, 0x00	; 0
 20a:	90 40       	sbci	r25, 0x00	; 0
 20c:	e1 f7       	brne	.-8      	; 0x206 <i2c_start+0x14>
 20e:	00 c0       	rjmp	.+0      	; 0x210 <i2c_start+0x1e>
 210:	00 00       	nop
	_delay_ms(100);

	// check value of TWI Status Register. Mask prescaler bits.
	twst = TW_STATUS & 0xF8;
 212:	90 91 b9 00 	lds	r25, 0x00B9	; 0x8000b9 <__TEXT_REGION_LENGTH__+0x7f80b9>
 216:	98 7f       	andi	r25, 0xF8	; 248
	if ( (twst != TW_START) && (twst != TW_REP_START)) return 1;
 218:	98 30       	cpi	r25, 0x08	; 8
 21a:	21 f0       	breq	.+8      	; 0x224 <i2c_start+0x32>
 21c:	90 31       	cpi	r25, 0x10	; 16
 21e:	11 f0       	breq	.+4      	; 0x224 <i2c_start+0x32>
 220:	81 e0       	ldi	r24, 0x01	; 1
 222:	08 95       	ret

	// send device address
	TWDR = address;
 224:	80 93 bb 00 	sts	0x00BB, r24	; 0x8000bb <__TEXT_REGION_LENGTH__+0x7f80bb>
	TWCR = (1<<TWINT) | (1<<TWEN);
 228:	84 e8       	ldi	r24, 0x84	; 132
 22a:	80 93 bc 00 	sts	0x00BC, r24	; 0x8000bc <__TEXT_REGION_LENGTH__+0x7f80bc>

	// wail until transmission completed and ACK/NACK has been received
	while(!(TWCR & (1<<TWINT)));
 22e:	80 91 bc 00 	lds	r24, 0x00BC	; 0x8000bc <__TEXT_REGION_LENGTH__+0x7f80bc>
 232:	87 ff       	sbrs	r24, 7
 234:	fc cf       	rjmp	.-8      	; 0x22e <i2c_start+0x3c>

	// check value of TWI Status Register. Mask prescaler bits.
	twst = TW_STATUS & 0xF8;
 236:	80 91 b9 00 	lds	r24, 0x00B9	; 0x8000b9 <__TEXT_REGION_LENGTH__+0x7f80b9>
 23a:	88 7f       	andi	r24, 0xF8	; 248
	if ( (twst != TW_MT_SLA_ACK) && (twst != TW_MR_SLA_ACK) ) return 1;
 23c:	88 31       	cpi	r24, 0x18	; 24
 23e:	11 f0       	breq	.+4      	; 0x244 <i2c_start+0x52>
 240:	80 34       	cpi	r24, 0x40	; 64
 242:	71 f7       	brne	.-36     	; 0x220 <i2c_start+0x2e>

	return 0;
 244:	80 e0       	ldi	r24, 0x00	; 0

}/* i2c_start */
 246:	08 95       	ret

00000248 <i2c_start_wait>:
    uint8_t   twst;

    while ( 1 )
    {
	    // send START condition
	    TWCR = (1<<TWINT) | (1<<TWSTA) | (1<<TWEN);
 248:	24 ea       	ldi	r18, 0xA4	; 164
    	twst = TW_STATUS & 0xF8;
    	if ( (twst != TW_START) && (twst != TW_REP_START)) continue;
    
    	// send device address
    	TWDR = address;
    	TWCR = (1<<TWINT) | (1<<TWEN);
 24a:	34 e8       	ldi	r19, 0x84	; 132
    	// check value of TWI Status Register. Mask prescaler bits.
    	twst = TW_STATUS & 0xF8;
    	if ( (twst == TW_MT_SLA_NACK )||(twst ==TW_MR_DATA_NACK) ) 
    	{    	    
    	    /* device busy, send stop condition to terminate write operation */
	        TWCR = (1<<TWINT) | (1<<TWEN) | (1<<TWSTO);
 24c:	44 e9       	ldi	r20, 0x94	; 148
    uint8_t   twst;

    while ( 1 )
    {
	    // send START condition
	    TWCR = (1<<TWINT) | (1<<TWSTA) | (1<<TWEN);
 24e:	20 93 bc 00 	sts	0x00BC, r18	; 0x8000bc <__TEXT_REGION_LENGTH__+0x7f80bc>
    
    	// wait until transmission completed
    	while(!(TWCR & (1<<TWINT)));
 252:	90 91 bc 00 	lds	r25, 0x00BC	; 0x8000bc <__TEXT_REGION_LENGTH__+0x7f80bc>
 256:	97 ff       	sbrs	r25, 7
 258:	fc cf       	rjmp	.-8      	; 0x252 <i2c_start_wait+0xa>
    
    	// check value of TWI Status Register. Mask prescaler bits.
    	twst = TW_STATUS & 0xF8;
 25a:	90 91 b9 00 	lds	r25, 0x00B9	; 0x8000b9 <__TEXT_REGION_LENGTH__+0x7f80b9>
 25e:	98 7f       	andi	r25, 0xF8	; 248
    	if ( (twst != TW_START) && (twst != TW_REP_START)) continue;
 260:	98 30       	cpi	r25, 0x08	; 8
 262:	11 f0       	breq	.+4      	; 0x268 <i2c_start_wait+0x20>
 264:	90 31       	cpi	r25, 0x10	; 16
 266:	99 f7       	brne	.-26     	; 0x24e <i2c_start_wait+0x6>
    
    	// send device address
    	TWDR = address;
 268:	80 93 bb 00 	sts	0x00BB, r24	; 0x8000bb <__TEXT_REGION_LENGTH__+0x7f80bb>
    	TWCR = (1<<TWINT) | (1<<TWEN);
 26c:	30 93 bc 00 	sts	0x00BC, r19	; 0x8000bc <__TEXT_REGION_LENGTH__+0x7f80bc>
    
    	// wail until transmission completed
    	while(!(TWCR & (1<<TWINT)));
 270:	90 91 bc 00 	lds	r25, 0x00BC	; 0x8000bc <__TEXT_REGION_LENGTH__+0x7f80bc>
 274:	97 ff       	sbrs	r25, 7
 276:	fc cf       	rjmp	.-8      	; 0x270 <i2c_start_wait+0x28>
	
    	// check value of TWI Status Register. Mask prescaler bits.
    	twst = TW_STATUS & 0xF8;
 278:	90 91 b9 00 	lds	r25, 0x00B9	; 0x8000b9 <__TEXT_REGION_LENGTH__+0x7f80b9>
 27c:	98 7f       	andi	r25, 0xF8	; 248
    	if ( (twst == TW_MT_SLA_NACK )||(twst ==TW_MR_DATA_NACK) ) 
 27e:	90 32       	cpi	r25, 0x20	; 32
 280:	11 f0       	breq	.+4      	; 0x286 <i2c_start_wait+0x3e>
 282:	98 35       	cpi	r25, 0x58	; 88
 284:	39 f4       	brne	.+14     	; 0x294 <i2c_start_wait+0x4c>
    	{    	    
    	    /* device busy, send stop condition to terminate write operation */
	        TWCR = (1<<TWINT) | (1<<TWEN) | (1<<TWSTO);
 286:	40 93 bc 00 	sts	0x00BC, r20	; 0x8000bc <__TEXT_REGION_LENGTH__+0x7f80bc>
	        
	        // wait until stop condition is executed and bus released
	        while(TWCR & (1<<TWSTO));
 28a:	90 91 bc 00 	lds	r25, 0x00BC	; 0x8000bc <__TEXT_REGION_LENGTH__+0x7f80bc>
 28e:	94 fd       	sbrc	r25, 4
 290:	fc cf       	rjmp	.-8      	; 0x28a <i2c_start_wait+0x42>
 292:	dd cf       	rjmp	.-70     	; 0x24e <i2c_start_wait+0x6>
 294:	08 95       	ret

00000296 <i2c_rep_start>:
 Return:  0 device accessible
          1 failed to access device
*************************************************************************/
unsigned char i2c_rep_start(unsigned char address)
{
    return i2c_start( address );
 296:	0c 94 f9 00 	jmp	0x1f2	; 0x1f2 <i2c_start>

0000029a <i2c_stop>:
 Terminates the data transfer and releases the I2C bus
*************************************************************************/
void i2c_stop(void)
{
    /* send stop condition */
	TWCR = (1<<TWINT) | (1<<TWEN) | (1<<TWSTO);
 29a:	84 e9       	ldi	r24, 0x94	; 148
 29c:	80 93 bc 00 	sts	0x00BC, r24	; 0x8000bc <__TEXT_REGION_LENGTH__+0x7f80bc>
	
	// wait until stop condition is executed and bus released
	while(TWCR & (1<<TWSTO));
 2a0:	80 91 bc 00 	lds	r24, 0x00BC	; 0x8000bc <__TEXT_REGION_LENGTH__+0x7f80bc>
 2a4:	84 fd       	sbrc	r24, 4
 2a6:	fc cf       	rjmp	.-8      	; 0x2a0 <i2c_stop+0x6>

}/* i2c_stop */
 2a8:	08 95       	ret

000002aa <i2c_write>:
unsigned char i2c_write( unsigned char data )
{	
    uint8_t   twst;
    
	// send data to the previously addressed device
	TWDR = data;
 2aa:	80 93 bb 00 	sts	0x00BB, r24	; 0x8000bb <__TEXT_REGION_LENGTH__+0x7f80bb>
	TWCR = (1<<TWINT) | (1<<TWEN);
 2ae:	84 e8       	ldi	r24, 0x84	; 132
 2b0:	80 93 bc 00 	sts	0x00BC, r24	; 0x8000bc <__TEXT_REGION_LENGTH__+0x7f80bc>

	// wait until transmission completed
	while(!(TWCR & (1<<TWINT)));
 2b4:	80 91 bc 00 	lds	r24, 0x00BC	; 0x8000bc <__TEXT_REGION_LENGTH__+0x7f80bc>
 2b8:	87 ff       	sbrs	r24, 7
 2ba:	fc cf       	rjmp	.-8      	; 0x2b4 <i2c_write+0xa>
	
	// check value of TWI Status Register. Mask prescaler bits
	twst = TW_STATUS & 0xF8;
 2bc:	90 91 b9 00 	lds	r25, 0x00B9	; 0x8000b9 <__TEXT_REGION_LENGTH__+0x7f80b9>
 2c0:	98 7f       	andi	r25, 0xF8	; 248
 2c2:	81 e0       	ldi	r24, 0x01	; 1
 2c4:	98 32       	cpi	r25, 0x28	; 40
 2c6:	09 f4       	brne	.+2      	; 0x2ca <i2c_write+0x20>
 2c8:	80 e0       	ldi	r24, 0x00	; 0
	if( twst != TW_MT_DATA_ACK) return 1;
	return 0;

}/* i2c_write */
 2ca:	08 95       	ret

000002cc <i2c_readAck>:
 
 Return:  byte read from I2C device
*************************************************************************/
unsigned char i2c_readAck(void)
{
	TWCR = (1<<TWINT) | (1<<TWEN) | (1<<TWEA);
 2cc:	84 ec       	ldi	r24, 0xC4	; 196
 2ce:	80 93 bc 00 	sts	0x00BC, r24	; 0x8000bc <__TEXT_REGION_LENGTH__+0x7f80bc>
	while(!(TWCR & (1<<TWINT)));    
 2d2:	80 91 bc 00 	lds	r24, 0x00BC	; 0x8000bc <__TEXT_REGION_LENGTH__+0x7f80bc>
 2d6:	87 ff       	sbrs	r24, 7
 2d8:	fc cf       	rjmp	.-8      	; 0x2d2 <i2c_readAck+0x6>

    return TWDR;
 2da:	80 91 bb 00 	lds	r24, 0x00BB	; 0x8000bb <__TEXT_REGION_LENGTH__+0x7f80bb>

}/* i2c_readAck */
 2de:	08 95       	ret

000002e0 <i2c_readNak>:
 
 Return:  byte read from I2C device
*************************************************************************/
unsigned char i2c_readNak(void)
{
	TWCR = (1<<TWINT) | (1<<TWEN);
 2e0:	84 e8       	ldi	r24, 0x84	; 132
 2e2:	80 93 bc 00 	sts	0x00BC, r24	; 0x8000bc <__TEXT_REGION_LENGTH__+0x7f80bc>
	while(!(TWCR & (1<<TWINT)));
 2e6:	80 91 bc 00 	lds	r24, 0x00BC	; 0x8000bc <__TEXT_REGION_LENGTH__+0x7f80bc>
 2ea:	87 ff       	sbrs	r24, 7
 2ec:	fc cf       	rjmp	.-8      	; 0x2e6 <i2c_readNak+0x6>
	
    return TWDR;
 2ee:	80 91 bb 00 	lds	r24, 0x00BB	; 0x8000bb <__TEXT_REGION_LENGTH__+0x7f80bb>

 2f2:	08 95       	ret

000002f4 <uart_init>:
Input:    none
Returns:  none
**************************************************************************/
void uart_init(void)   
{
   UBRR0H = UBRRH_VALUE;
 2f4:	10 92 c5 00 	sts	0x00C5, r1	; 0x8000c5 <__TEXT_REGION_LENGTH__+0x7f80c5>
   UBRR0L = UBRRL_VALUE;
 2f8:	8c e0       	ldi	r24, 0x0C	; 12
 2fa:	80 93 c4 00 	sts	0x00C4, r24	; 0x8000c4 <__TEXT_REGION_LENGTH__+0x7f80c4>
   /* evtl. verkuerzt falls Register aufeinanderfolgen (vgl. Datenblatt)
      UBRR = UBRR_VALUE;
   */
#if USE_2X
   /* U2X-Modus erforderlich */
   UCSR0A |= (1 << U2X0);
 2fe:	e0 ec       	ldi	r30, 0xC0	; 192
 300:	f0 e0       	ldi	r31, 0x00	; 0
 302:	80 81       	ld	r24, Z
 304:	82 60       	ori	r24, 0x02	; 2
 306:	80 83       	st	Z, r24
   /* U2X-Modus nicht erforderlich */
   UCSR0A &= ~(1 << U2X0);
#endif 


   UCSR0B = (1<<TXEN0)|(1<<RXEN0);  // UART TX und RX einschalten
 308:	88 e1       	ldi	r24, 0x18	; 24
 30a:	80 93 c1 00 	sts	0x00C1, r24	; 0x8000c1 <__TEXT_REGION_LENGTH__+0x7f80c1>
   UCSR0C = (1<<UCSZ00)|(1<<UCSZ01);  // Asynchron 8N1
 30e:	86 e0       	ldi	r24, 0x06	; 6
 310:	80 93 c2 00 	sts	0x00C2, r24	; 0x8000c2 <__TEXT_REGION_LENGTH__+0x7f80c2>
 314:	08 95       	ret

00000316 <uart_putc>:
Input:    byte to be transmitted
Returns:  none
**************************************************************************/
int uart_putc(unsigned char c)
{
	while (!(UCSR0A & (1<<UDRE0)))  /* warten bis Senden moeglich */
 316:	90 91 c0 00 	lds	r25, 0x00C0	; 0x8000c0 <__TEXT_REGION_LENGTH__+0x7f80c0>
 31a:	95 ff       	sbrs	r25, 5
 31c:	fc cf       	rjmp	.-8      	; 0x316 <uart_putc>
	{
	}

	UDR0 = c;                      /* sende Zeichen */
 31e:	80 93 c6 00 	sts	0x00C6, r24	; 0x8000c6 <__TEXT_REGION_LENGTH__+0x7f80c6>
	return 0;

}/* uart_putc */
 322:	80 e0       	ldi	r24, 0x00	; 0
 324:	90 e0       	ldi	r25, 0x00	; 0
 326:	08 95       	ret

00000328 <uart_puts>:
Purpose:  transmit string to UART
Input:    string to be transmitted
Returns:  none
**************************************************************************/
void uart_puts(const char *s )
{
 328:	cf 93       	push	r28
 32a:	df 93       	push	r29
 32c:	ec 01       	movw	r28, r24
	while (*s)
 32e:	89 91       	ld	r24, Y+
 330:	88 23       	and	r24, r24
 332:	19 f0       	breq	.+6      	; 0x33a <uart_puts+0x12>
	uart_putc(*s++);
 334:	0e 94 8b 01 	call	0x316	; 0x316 <uart_putc>
 338:	fa cf       	rjmp	.-12     	; 0x32e <uart_puts+0x6>

	}/* uart_puts */
 33a:	df 91       	pop	r29
 33c:	cf 91       	pop	r28
 33e:	08 95       	ret

00000340 <uart_puti>:
	
void uart_puti (int i)							// sende Ganzzahl (int) ueber UART
{
 340:	cf 93       	push	r28
 342:	df 93       	push	r29
 344:	cd b7       	in	r28, 0x3d	; 61
 346:	de b7       	in	r29, 0x3e	; 62
 348:	27 97       	sbiw	r28, 0x07	; 7
 34a:	0f b6       	in	r0, 0x3f	; 63
 34c:	f8 94       	cli
 34e:	de bf       	out	0x3e, r29	; 62
 350:	0f be       	out	0x3f, r0	; 63
 352:	cd bf       	out	0x3d, r28	; 61
	char s[7];									// Pufferspeicher f?r die umgewandelte Zahl (int, uint oder float)
	itoa( i, s, 10 );							// 10 fuer Dezimalsystem
 354:	4a e0       	ldi	r20, 0x0A	; 10
 356:	50 e0       	ldi	r21, 0x00	; 0
 358:	be 01       	movw	r22, r28
 35a:	6f 5f       	subi	r22, 0xFF	; 255
 35c:	7f 4f       	sbci	r23, 0xFF	; 255
 35e:	0e 94 be 01 	call	0x37c	; 0x37c <itoa>
	uart_puts(s);
 362:	ce 01       	movw	r24, r28
 364:	01 96       	adiw	r24, 0x01	; 1
 366:	0e 94 94 01 	call	0x328	; 0x328 <uart_puts>
 36a:	27 96       	adiw	r28, 0x07	; 7
 36c:	0f b6       	in	r0, 0x3f	; 63
 36e:	f8 94       	cli
 370:	de bf       	out	0x3e, r29	; 62
 372:	0f be       	out	0x3f, r0	; 63
 374:	cd bf       	out	0x3d, r28	; 61
 376:	df 91       	pop	r29
 378:	cf 91       	pop	r28
 37a:	08 95       	ret

0000037c <itoa>:
 37c:	45 32       	cpi	r20, 0x25	; 37
 37e:	51 05       	cpc	r21, r1
 380:	20 f4       	brcc	.+8      	; 0x38a <itoa+0xe>
 382:	42 30       	cpi	r20, 0x02	; 2
 384:	10 f0       	brcs	.+4      	; 0x38a <itoa+0xe>
 386:	0c 94 c9 01 	jmp	0x392	; 0x392 <__itoa_ncheck>
 38a:	fb 01       	movw	r30, r22
 38c:	10 82       	st	Z, r1
 38e:	cb 01       	movw	r24, r22
 390:	08 95       	ret

00000392 <__itoa_ncheck>:
 392:	bb 27       	eor	r27, r27
 394:	4a 30       	cpi	r20, 0x0A	; 10
 396:	31 f4       	brne	.+12     	; 0x3a4 <__itoa_ncheck+0x12>
 398:	99 23       	and	r25, r25
 39a:	22 f4       	brpl	.+8      	; 0x3a4 <__itoa_ncheck+0x12>
 39c:	bd e2       	ldi	r27, 0x2D	; 45
 39e:	90 95       	com	r25
 3a0:	81 95       	neg	r24
 3a2:	9f 4f       	sbci	r25, 0xFF	; 255
 3a4:	0c 94 d5 01 	jmp	0x3aa	; 0x3aa <__utoa_common>

000003a8 <__utoa_ncheck>:
 3a8:	bb 27       	eor	r27, r27

000003aa <__utoa_common>:
 3aa:	fb 01       	movw	r30, r22
 3ac:	55 27       	eor	r21, r21
 3ae:	aa 27       	eor	r26, r26
 3b0:	88 0f       	add	r24, r24
 3b2:	99 1f       	adc	r25, r25
 3b4:	aa 1f       	adc	r26, r26
 3b6:	a4 17       	cp	r26, r20
 3b8:	10 f0       	brcs	.+4      	; 0x3be <__utoa_common+0x14>
 3ba:	a4 1b       	sub	r26, r20
 3bc:	83 95       	inc	r24
 3be:	50 51       	subi	r21, 0x10	; 16
 3c0:	b9 f7       	brne	.-18     	; 0x3b0 <__utoa_common+0x6>
 3c2:	a0 5d       	subi	r26, 0xD0	; 208
 3c4:	aa 33       	cpi	r26, 0x3A	; 58
 3c6:	08 f0       	brcs	.+2      	; 0x3ca <__utoa_common+0x20>
 3c8:	a9 5d       	subi	r26, 0xD9	; 217
 3ca:	a1 93       	st	Z+, r26
 3cc:	00 97       	sbiw	r24, 0x00	; 0
 3ce:	79 f7       	brne	.-34     	; 0x3ae <__utoa_common+0x4>
 3d0:	b1 11       	cpse	r27, r1
 3d2:	b1 93       	st	Z+, r27
 3d4:	11 92       	st	Z+, r1
 3d6:	cb 01       	movw	r24, r22
 3d8:	0c 94 ee 01 	jmp	0x3dc	; 0x3dc <strrev>

000003dc <strrev>:
 3dc:	dc 01       	movw	r26, r24
 3de:	fc 01       	movw	r30, r24
 3e0:	67 2f       	mov	r22, r23
 3e2:	71 91       	ld	r23, Z+
 3e4:	77 23       	and	r23, r23
 3e6:	e1 f7       	brne	.-8      	; 0x3e0 <strrev+0x4>
 3e8:	32 97       	sbiw	r30, 0x02	; 2
 3ea:	04 c0       	rjmp	.+8      	; 0x3f4 <strrev+0x18>
 3ec:	7c 91       	ld	r23, X
 3ee:	6d 93       	st	X+, r22
 3f0:	70 83       	st	Z, r23
 3f2:	62 91       	ld	r22, -Z
 3f4:	ae 17       	cp	r26, r30
 3f6:	bf 07       	cpc	r27, r31
 3f8:	c8 f3       	brcs	.-14     	; 0x3ec <strrev+0x10>
 3fa:	08 95       	ret

000003fc <_exit>:
 3fc:	f8 94       	cli

000003fe <__stop_program>:
 3fe:	ff cf       	rjmp	.-2      	; 0x3fe <__stop_program>
