************************
;****    TWI TEST    ****
;********PCF8547A********
;************************

.include "m8def.inc"

.def	temp	  	 =r16
.equ	SLA_W	     =0x70			;adresse pcf8574a a0&a1&a2=low
.equ	start		 =0x08
.equ	MT_SLA_ACK   =0x18
.equ	MT_DATA_ACK  =0x28
.def	data	  	 =r17	;Daten die verschickt werden sollen
;Hardwareeinstellungen

;Ram
	.dseg
	.org 0x60


;EEProm
	.eseg


;Programm

	.cseg
	.org	0x00

	rjmp	RESET			; Reset Handler
	reti	;EXT_INT0		; IRQ0  Handler
	reti	;EXT_INT1		; IRQ1  Handler
	reti	;TIM2_COMP		; Timer 2 Compare   Handler
	reti	;TIM2_OVF		; Timer 2 Overflow  Handler
	reti	;TIM1_CAPT		; Timer 1 Capture   Handler
	reti	;TIM1_COMPA		; Timer 1 CompareA  Handler
	reti	;TIM1_COMPB		; Timer 1 CompareB  Handler
	reti	;TIM1_OVF		; Timer 1 Overflow  Handler 
	reti	;TIM0_OVF		; Timer 0 Overflow  Handler
	reti	;SPI_STC			; SPI Transfer Complete Handler
	reti	;USART_RXC		; USART TX Complete Handler
	reti	;USART_UDRE		; UDR Empty Handler
	reti	;USART_TXC		; Usart TX Complete Handler
	reti	;ADC_COMPLETE	; ADC Conversion Complete Handler
	reti	;EE_RDY			; EEprom Ready Handler
	reti	;ANA_COMP		; Analog Comparator Handler
	reti	;TWSI			; Two-Wire Serial Interface Handler
	reti	;SPM_RDY			; Store Programm Memory Ready Handler


;EXT_INT0:		reti	; IRQ0  Handler
;EXT_INT1:		reti	; IRQ1  Handler
;TIM2_COMP:		reti	; Timer 2 Compare   Handler
;TIM2_OVF:		reti	; Timer 2 Overflow  Handler
;TIM1_CAPT:		reti	; Timer 1 Capture   Handler
;TIM1_COMPA:	reti	; Timer 1 CompareA  Handler
;TIM1_COMPB:	reti	; Timer 1 CompareB  Handler
;TIM1_OVF:		reti	; Timer 1 Overflow  Handler 
;TIM0_OVF:		reti	; Timer 0 Overflow  Handler
;SPI_STC:		reti	; SPI Transfer Complete Handler
;USART_RXC:		reti	; USART TX Complete Handler
;USART_UDRE:	reti	; UDR Empty Handler
;USART_TXC:		reti	; Usart TX Complete Handler
;ADC_COMPLETE:	reti	; ADC Conversion Complete Handler
;EE_RDY:		reti	; EEprom Ready Handler
;ANA_COMP:		reti	; Analog Comparator Handler
;TWSI:			reti	; Two-Wire Serial Interface Handler
;SPM_RDY:		reti	; Store Programm Memory Ready Handler
;       *****************
;       *Programmstart  *
;       *Initialisierung*
;       *****************
RESET:
;*****Stack initialisieren*****
	ldi	temp,low(RAMEND)
	out	SPL,temp
	ldi	temp,high(RAMEND)
	out	SPH,temp

;****Watchdog initialisieren***
;	ldi	temp,0x08
;	out WDTCR,temp

;*****Ports initialisieren*****
;**** Register setzen ****
ldi data,0x0a
;**AD-Wandler initialisieren***
	
;******TWI initialisieren******
	ldi temp, 0x0A					;Bit Rate Generator
	out TWBR, temp
 	
	ldi temp,(1<<TWPS0)|(0<<TWPS1)	;1
	out TWSR,temp
	

HAUPTPROGRAMM:
inc data	
;****StartTwI:****
	ldi temp, (1<<TWINT)|(1<<TWSTA)|(1<<TWEN)
	out TWCR, temp
wait1:	;Wait for TWINT Flag Set (If set, Start condition has been transmitted)
	in temp, TWCR
	sbrs temp, TWINT
	rjmp wait1
	in temp,TWSR
	andi temp,0xF8
	cpi temp,start
	brne error
;****Send SLAVE ADDRESS: ****
	ldi temp,SLA_W
	out TWDR,temp
	ldi temp,(1<<TWINT)|(1<<TWEN)
	out TWCR,temp
wait2:
	in temp,TWCR
	sbrs temp,TWINT
	rjmp wait2
	in temp,TWSR
	andi temp,0xF8
	cpi temp,MT_SLA_ACK
	brne error
;****Send Data to Slave ****
	mov temp,data
	out TWDR,temp
	ldi r16,(1<<TWINT)|(1<<TWEN)
	out TWCR,temp
wait3:
	in temp,TWCR
	sbrs temp,TWINT
	rjmp wait3
	in temp,TWSR
	andi temp,0xF8
	cpi temp,MT_DATA_ACK
	brne error
stop_twi:
	ldi temp,(1<<TWINT)|(1<<TWEN)|(1<<TWSTO)
	out TWCR,temp
rjmp	HAUPTPROGRAMM
error:
	rjmp stop_twi
rjmp Hauptprogramm