.include <AVR64DD32def.inc>

.macro xout ; eXtended "out"
.if @0 > 0x3F
    sts @0, @1
.else
    out @0, @1
.endif
.endmacro

.macro xin ; eXtended "in"
.if @1 > 0x3F
    lds @0, @1
.else
    in  @0, @1
.endif
.endmacro

.equ F_CPU = 4_000_000 ; internal osc. default

.def wri0 = r16

.cseg
.org 0
    rjmp    reset

; == Interrupt vectors ==
.org RTC_PIT_vect
    rjmp    rtcIsr
.org TCA0_OVF_vect
    rjmp    tca0Isr

.org INT_VECTORS_SIZE
reset:
    sbi     VPORTA_DIR, 6
    sbi     VPORTA_DIR, 7

; == RTC ==
    ldi     wri0, RTC_RTCEN_bm
    xout    RTC_CTRLA, wri0
waitForRtc:
    xin     wri0, RTC_STATUS
    tst     wri0
    brne    waitForRtc
waitForOsc32k:
    xin     wri0, CLKCTRL_MCLKSTATUS
    andi    wri0, CLKCTRL_OSC32KS_bm
    breq    waitForOsc32k

    ldi     wri0, RTC_PI_bm
    xout    RTC_PITINTCTRL, wri0
    ldi     wri0, RTC_PERIOD_CYC32768_gc | RTC_PITEN_bm
    xout    RTC_PITCTRLA, wri0
    ldi     wri0, RTC_CLKSEL_OSC32K_gc
    xout    RTC_CLKSEL, wri0
    
; == TCA0 ==
.equ TCA0_PERIOD = 3600-1
    ldi     wri0, low(TCA0_PERIOD)
    xout    TCA0_SINGLE_PERL, wri0
    ldi     wri0, high(TCA0_PERIOD)
    xout    TCA0_SINGLE_PERH, wri0
    ldi     wri0, TCA_SINGLE_CLKSEL_DIV1024_gc | TCA_SINGLE_ENABLE_bm
    xout    TCA0_SINGLE_CTRLA, wri0
    ldi     wri0, TCA_SINGLE_WGMODE_NORMAL_gc
    xout    TCA0_SINGLE_CTRLB, wri0
    ldi     wri0, TCA_SINGLE_OVF_bm
    xout    TCA0_SINGLE_INTCTRL, wri0
    
    sei

infinity:
    rjmp    infinity

rtcIsr:
    sbi     VPORTA_IN, 7
    ldi     wri0, RTC_PI_bm
    xout    RTC_PITINTFLAGS, wri0
    reti

tca0Isr:
    sbi     VPORTA_IN, 6
    ldi     wri0, TCA_SINGLE_OVF_bm
    xout    TCA0_SINGLE_INTFLAGS, wri0
    reti