#define F_CPU 8000000
#define BAUD 250000L			// DMX512, hardware UART          
#define BAUD_SOFT_UART  9600    // software UART

#define BIT_TIME (F_CPU/BAUD_SOFT_UART)

#define TEST_LOW  PORTB &= ~(1<<PB0)
#define TEST_HIGH PORTB  =  (1<<PB0)
#define TEST_TOG  PORTB ^=  (1<<PB0)

#define READ_DMX_ADR \
    do { \
        dmx_adr = 0; \
        if (~PIND & (1<<PD3)) dmx_adr |= 1; \
        if (~PIND & (1<<PD2)) dmx_adr |= 2; \
        if (~PIND & (1<<PD1)) dmx_adr |= 4; \
        if (~PINC & (1<<PC5)) dmx_adr |= 8; \
        if (~PINC & (1<<PC4)) dmx_adr |= 16; \
        if (~PINC & (1<<PC3)) dmx_adr |= 32; \
        if (~PINC & (1<<PC2)) dmx_adr |= 64; \
        if (~PINC & (1<<PC1)) dmx_adr |= 128; \
        if (~PINC & (1<<PC0)) dmx_adr |= 256; \
    } while(0) 

// trigger soft uart data transmission
// start bit will be sent after 0.1 bit times

#define SEND_SOFT_UART(x) \
    do { \
        OCR1A   = TCNT1 + BIT_TIME/10; \
        TCCR1A  = (1<<COM1A1);  /* clear output, start bit */ \
        TIFR1   = (1<<OCF1A);   /* clear ISR flag */ \
        soft_tx_active = 1; \
        soft_tx = (x & 0xFF) | 0x100; \
        TIMSK1 |= (1<<OCIE1A);  /* enable ISR */ \
    } while(0)


#define UBRR_VAL  ((F_CPU+BAUD*8)/(BAUD*16)-1)  
#define BAUD_REAL (F_CPU/(16*(UBRR_VAL+1)))     
#define BAUD_ERROR ((BAUD_REAL*1000)/BAUD-1000) 
 
#if ((BAUD_ERROR>10) || (BAUD_ERROR<-10))
  #error Systematic baud error above 1% which is too high! 
#endif

#if (BIT_TIME > 0xFFFF)
  #error Soft UART baud rate too low! 
#endif

#define BAUD_REAL_SOFT  (F_CPU/BIT_TIME)     
#define BAUD_ERROR_SOFT ((BAUD_REAL_SOFT*1000)/BAUD_SOFT_UART-1000) 
 
#if ((BAUD_ERROR_SOFT>10) || (BAUD_ERROR_SOFT<-10))
  #error Systematic baud error of soft UART above 1% which is too high! 
#endif