Input voltage drop (measurement at idle power): VF1 +
VDS(Q1) + VFB1 = VSys
-VExt
VExt [V]
Vdrop [mV]
5.01
59.8
4.49
66.4
4.00
74.6
3.51
84.2
3.01
113.1
2.90
123.0
2.81
131.9
2.69
147.1
2.60
161.0
2.49
192.8
Notes:
Reverse polarity protection is functional.
V~Ext(min) should be 3.3V to make FET conduct properly (with some
headroom). At this voltage, the body diode forward drop would also allow
operation with VSys > 1.8 (with further increased losses).
At VExt < 5V the RS-485 cannot supply external hardware at
all (see ISOW1412
datasheet).
Current/power
consumption (idle, external supply)
VExt [V]
VSys [V]
IExt [mA]
PExt [mW]
5.03
✔️ 4.97
31.7
159.5
3.32
✔️ 3.21
47.8
158.7
2.52
✔️ 2.32
78.9
198.8
2.13
❌ 1.59
116.0
247.1
U6 (TCA9539) write, 400 kHz
Functional (read, write, /int, /reset).
Pushing buttons sets /int line (correct).
Pulling reset low seems to be obligatory on start-up with the current
“power sequencing”.
Pulse output measurement (isolated by transformer):
isoSPI, U7 (LTC6820IMS), write, 1MHz,
CS-low pulse (150ns)isoSPI, U7 (LTC6820IMS), write, 1MHz,
data bit pulses (50ns)
Results:
Pulse durations are as expected.
Signal level is lower (700mVp) than expected (20IFIBIAS (RTerm/2) = 20833µA (100Ω/2) = 850mVp). But
it should be sufficient with comparator threshold of 333mV and an
environment with little noise. It also fits to BMFE values (which should
be updated in the future as well).
Changes
Version 0.1.0 (retroactive)
Add pull-ups for digital inputs.
TODO:
LTC6820 Pin 3 1kΩ pull-up (open drain output)
LTC6820 (u7+U8) Pin 13 (Slow) to GND (> 200 kHz)
Replace R43 and R45 with 1.3kΩ, R44/R47 and R46/R48 with 1.3kΩ to
increase signal level slightly and harmonize dimensioning with BMFE.
Version 0.1.1
Add pull-ups for digital inputs.
TODO:
LTC6820 Pin 3 1kΩ pull-up (open drain output)
LTC6820 (u7+U8) Pin 13 (Slow) to GND (> 200 kHz)
Replace R43 and R45 with 1.3kΩ, R44/R47 and R46/R48 with 1.3kΩ to
increase signal level slightly and harmonize dimensioning with BMFE.