I found the PT6010 battery protection IC datasheet, but I cannot yet confirm that it matches the marking AA 23A73A. The PT6010 is a PowTech protection IC for 8–10 series lithium-ion/lithium-polymer batteries. Datasheet links: 1. PT6010 Datasheet – PDF / ChipSourceTek 2. PT6010 Application Note – PDF (Chinese) file2.dzsc.com+1 Important: The available application note is in Chinese, not English. Can you upload a photo of the chip showing the complete top marking? I can help identify the exact manufacturer and find the correct English datasheet. PT6010 Application Note – PDF (Chinese) translate I accessed the complete 9-page Chinese document. Below is the English translation of the PT6010 Application Note (Revision 0.1) by CR PowTech (Shanghai). PT6010 – English translation 8–10 Cell Series Lithium-Ion / Lithium-Polymer Battery Protection IC Manufacturer: CR PowTech (Shanghai) Co., Ltd. Document: PT6010_AN01 Revision: 0.1 1. Product overview The PT6010 is a battery protection IC designed for 8–10 series-connected lithium-ion or lithium-polymer cells. 1.1 High-precision voltage detection Protection function Detection voltage Accuracy Overcharge (OV) 4.25 V ±25 mV Overcharge recovery hysteresis 100 mV — Overdischarge (UV) 2.80 V ±80 mV Overdischarge recovery hysteresis 200 mV — Cell disconnection detection 1.20 V ±100 mV Disconnection recovery hysteresis 100 mV — Cell balancing detection 4.15 V ±25 mV Discharge overcurrent level 1 100 mV ±10 mV Discharge overcurrent level 2 200 mV ±20 mV Load short-circuit detection 500 mV ±50 mV Charge overcurrent detection 20 mV ±6 mV 1.2 Additional features - Charge and discharge overtemperature thresholds adjustable using external resistors. - Charge low-temperature protection adjustable using external resistors. - Adjustable protection delays for undervoltage and discharge overcurrent. - Low power consumption: - Normal operation: 25 µA typical. - Sleep mode: 2 µA maximum. - Shutdown mode: 2 µA maximum. - Supports cascading multiple ICs. - Electronic lock function. - Alarm signal output. - Package: LQFP-32. 2. Typical application circuit The reference circuit uses: - 10 series-connected battery cells. - Separate N-channel MOSFETs for charging and discharging. - Individual cell-voltage monitoring. - Current sensing resistor. - Temperature sensor. - Cell-balancing circuitry. The application circuit is shown on page 2 of the original PDF. 3. Demonstration board The document describes a demonstration protection board for a 7-cell series battery pack. It includes: - PCB layout. - Hardware arrangement and wiring. - Complete component list. The component list includes capacitors, resistors, diodes, transistors, MOSFETs and the PT6010 itself. 4. Component list The reference design uses the following important components: Component Value / type Current-sense resistor 5 mΩ (R005) Temperature sensor 103AT, B=3435 NTC Main protection IC PT6010, LQFP-32 Discharge MOSFETs NCE7560K Small signal transistors LBC846 Switching transistor 2N7002 Signal diodes 1N4148WS Main capacitors 100 nF, 220 nF, 4.7 µF Main resistors 160 Ω, 1 kΩ, 10 kΩ 5. Important component design parameters 5.1 VCx input resistors and capacitors The input resistors on VC1–VC10 depend on the balancing method. - External balancing: recommended input resistor = 1 kΩ. - Internal balancing: input resistor should be greater than 50 Ω. - All VC1–VC10 input resistors should have the same resistance. The input resistors and capacitors form RC filters to suppress voltage spikes. Recommended capacitors: - VC1–VC7: 47–220 nF, 50 V, X7R ceramic. - VC8–VC10: 100 V ceramic capacitors are recommended because of higher DC bias voltage. 5.2 VCC input resistor and capacitor VCC must be supplied from the highest battery cell. Recommended components: - Input resistor: 200 Ω. - Capacitors: 4.7 µF / 100 V and 100 nF / 100 V in parallel. - A diode is used to prevent the IC supply from collapsing during sudden battery-pack voltage drops. 5.3 LDO output capacitor The VREF output capacitor should be: - 100 nF to 1 µF. - 16 V ceramic capacitor. The internal LDO has limited output-current capability. It is not recommended for directly powering LEDs. LED power can instead be taken from P+ using a source-follower circuit. 5.4 Current-sensing resistor (RCS) The current-sensing resistor determines the overcurrent and short-circuit protection thresholds. The protection currents are calculated as: \[ I_{DOC1}=\frac{V_{DOC1}}{R_{CS}} \] \[ I_{DOC2}=\frac{V_{DOC2}}{R_{CS}} \] \[ I_{SC}=\frac{V_{SC}}{R_{CS}} \] \[ I_{COC}=\frac{V_{COC}}{R_{CS}} \] The resistor must have sufficient power and pulse capability so that it does not burn out before the protection circuit responds. The current-sense signal should pass through an RC filter before reaching the CS pin. Kelvin connections are recommended for accurate current measurement. 5.5 Temperature protection settings The temperature sensor is an NTC thermistor: 103AT, B = 3435. The circuit uses two external resistors: - RVTD: discharge overtemperature setting. - RVTC: charging overtemperature and low-temperature settings. A. Discharge overtemperature (TDOT) \[ R_{VTD}=9\times R_{DOT} \] Examples: Temperature threshold NTC resistance RVTD 65°C 2.588 kΩ 23 kΩ 70°C 2.228 kΩ 20 kΩ 75°C 1.924 kΩ 17 kΩ B. Charge overtemperature and low-temperature protection \[ R_{VTC}=4.75\times R_{COT} \] The low-temperature resistor relationship is: \[ R_{CUT}=7.125\times R_{COT} \] Examples: Charge overtemperature NTC resistance RVTC Low-temperature threshold 45°C 4.911 kΩ 23 kΩ -5.5°C 50°C 4.16 kΩ 20 kΩ -2°C C. Disabling temperature protection - To disable discharge overtemperature, charge overtemperature and charge low-temperature protection: replace the NTC with a 20 kΩ resistor. - To disable only charge low-temperature protection: connect a 51 kΩ resistor in parallel with the NTC. 5.6 Protection delay settings Protection Delay Overcharge 1–2 × TTDET Overdischarge 3–4, 6–8 or 12–16 × TTDET Discharge overcurrent level 1 1, 2 or 4 seconds Discharge overcurrent level 2 100, 200 or 400 ms Short circuit 250 µs typical Charge overcurrent 10 ms Overdischarge delay is selected through SUVT: - SUVT = VSS: 3–4 × TTDET. - SUVT floating: 6–8 × TTDET. - SUVT = VREF: 12–16 × TTDET. Discharge overcurrent delays are configured using SOC1T and SOC2T. 5.7 Configuring the number of battery cells The number of series-connected cells is selected using the SEL pin. SEL connection Configuration VSS 10 cells Floating 9 cells VREF 8 cells For 9 cells, VC9 and VC10 are connected together. For 8 cells, VC8, VC9 and VC10 are connected together. 5.8 Cell-balancing current The PT6010 has internal balancing resistors of approximately 300 Ω. For external balancing, the recommended VCx input resistor is generally 1 kΩ. Important details: - Internal balancing is controlled by the IC. - External balancing uses additional transistors and resistors. - VC1 balancing current differs from VC2–VC10 because of differences in the series resistance. - VC1's external resistor may need adjustment. The PT6010 uses alternating odd/even cell balancing: - First half of the voltage-detection cycle: odd-numbered cells. - Second half: even-numbered cells. Therefore, the actual average balancing current is approximately half the calculated instantaneous current. When external balancing MOSFETs are used, clamp diodes should be connected between gate and source. 5.9 Selecting charging and discharging MOSFETs The PT6010 supports: - Common-port charging/discharging. - Separate-port charging/discharging. For electric bicycle applications, MOSFET selection must consider: 1. RDS(on). 2. Package type. 3. Heat dissipation. 4. Switching speed. 5. Safe operating limits. TO-262 and TO-220 packages are generally recommended, preferably with heatsinks. The discharge MOSFET switching speed is important when PWM motor control is used. If switching is too slow, switching losses increase and the MOSFET can overheat. If switching is too fast, parasitic inductance can produce voltage spikes and unwanted MOSFET switching. For motor applications, the motor's inductive energy must also be considered when the discharge MOSFET switches off. Fast-recovery diodes and ceramic capacitors may be required to absorb motor back-EMF. Parallel MOSFETs may be needed to increase the total energy absorption capability (EAS). 5.10 Charging MOSFET drive (CDRV) The CDRV pin is not designed to withstand high voltage. A diode must be included in the application circuit for reverse-voltage protection. 5.11 Low-power operating modes The PT6010 supports two low-power modes: - Sleep mode. - Shutdown mode. The EN_N pin selects the operating mode: EN_N connection Operating mode VSS Normal operation VREF Sleep mode permitted Floating Shutdown mode When EN_N is connected to VREF, the IC can enter sleep mode after detecting an undervoltage condition and waiting for the specified delay. When EN_N is floating, the IC enters shutdown mode. 6. PCB layout recommendations 1. Main power traces must be wide enough to carry the required discharge overcurrent without excessive heating. 2. MOSFET heat-dissipation areas should be connected to large copper areas. 3. Current-sense signals and ground should use differential routing. 4. The CS pin RC filter must be placed close to the IC. 5. VCx and VCC input resistors and capacitors should be placed close to the IC. 6. Use a separate, continuous ground copper area for the IC, connected to battery negative at a single point. 7. Keep signal traces away from PCB edges. Additional important consideration: Internal balancing current through VC1 can create several milliamps of current through VSS. This can affect current-measurement accuracy. The VSS-to-B0 connection must therefore have sufficiently low resistance. 7. Application precautions 7.1 Voltage inputs The VCx voltage-detection pins support high voltage and can tolerate cells being connected in different sequences. However, low-voltage pins must never be exposed to high-voltage signals, as this can damage the IC or cause leakage current. 7.2 Temperature sensor placement The NTC sensor should be attached closely to the surface of the middle battery cell to measure the highest cell temperature accurately. 7.3 Cell-disconnection detection The PT6010 draws a very small current from VCx pins to detect disconnected cells. If the VCx input capacitors are too large, the time required to detect a disconnected cell will increase. 7.4 BCL pin The BCL pin can be connected to VSS or VREF to disable balancing or change the balancing algorithm. Do not connect BCL to an intermediate voltage, as this can cause leakage current. 7.5 CS pin The CS pin is a low-voltage input. It cannot directly measure the internal resistance of discharge MOSFETs. Additional external components are required if this measurement method is used. In this configuration, the COC function must be disabled. Otherwise, when the discharge MOSFETs are off during charging, the body-diode voltage drop can cause the CS pin to detect a continuous charge-overcurrent condition. 7.6 Discharge MOSFET protection A 10 MΩ resistor should preferably be connected between the gate and source of the discharge MOSFET. This ensures that the MOSFET remains switched off if the DDRV output resistor becomes open-circuit. 7.7 Charging MOSFET protection If a low CDRV output resistance is used to increase drive capability, a Zener diode should preferably be connected between the charging MOSFET gate and source. This protects the gate from excessive voltage when the charger is connected. 7.8 LSW pin The LSW pin supports PWM control and recovery from discharge-protection events other than short-circuit protection. 7.9 Charging overcurrent switching delay The specified TCOC delay is the time between detecting charge overcurrent and disabling the charging MOSFET drive. However, the MOSFET does not switch off immediately. After the drive is disabled, the gate is placed in a high-impedance state. The resistor connected between gate and source must discharge the MOSFET's parasitic gate-source capacitance. The actual MOSFET turn-off delay is approximately twice the RC time constant. 7.10 Demonstration board configuration The demonstration board can be configured for: - 8-cell battery packs. - 9-cell battery packs. 7.11 Charging/discharging configuration The demonstration board supports common-port and separate-port charging/discharging configurations. Important technical summary PT6010 key specifications 8–10S Battery configuration 4.25 V Overcharge threshold per cell 2.80 V Undervoltage threshold per cell 300 Ω Approximate internal balancing resistance 250 µs Short-circuit detection delay (typical) 25 µA Typical operating current Original Chinese application note: Open PT6010 PDF (9 pages) Important: This is a translation of the application note, not the complete electrical datasheet. Pin descriptions, absolute maximum ratings, electrical characteristics and timing specifications should be checked against the manufacturer's official datasheet before designing or repairing a BMS. I can also help translate the actual PT6010 pinout and schematic, including every pin's function and connections.