; 
; ATmega8 (HW-Rev.1)
; 
; 
;         +-------------v-------------+ 
;  Reset\ | 01 (RESET)         PC5 28 | CAS\
;  TXD    | 02 (RXD)           PC4 27 | D2
;  RXD    | 03 (TXD)           PC3 26 | D3
;  OE\    | 04 PD2             PC2 25 | D1
;  A8     | 05 PD3             PC1 24 | WE\
;  SD_CS\ | 06 PD4             PC0 23 | D0
;  VCC    | 07 VCC             GND 22 | GND
;  GND    | 08 GND            AREF 21 | n.c.
;  Q20MHz | 09 (XTAL1)        AVCC 20 | VCC
;  Q20MHz | 10 (XTAL2)   (SCK) PB5 19 | RAS\ / SD_SCK
;  A5     | 11 PD5      (MISO) PB4 18 | A0   / SD_MISO
;  A6     | 12 PD6      (MOSI) PB3 17 | A1   / SD_MOSI
;  A7     | 13 PD7             PB2 16 | A2
;  A4     | 14 PB0             PB1 15 | A3
;         +---------------------------+ 


; ATmega8 (HW-Rev.1)

dram_getnibble:
	andi temp,0xf0
	sbic pinc,ram_d1
	 ori temp,0x1
	sbic pinc,ram_d2
	 ori temp,0x2
	sbic pinc,ram_d3
	 ori temp,0x4
	sbic pinc,ram_d4
	 ori temp,0x8
	ret


; ATmega8 (HW-Rev.1)

dram_sendnibble:
	push temp2
	in temp2,portc
	andi temp2,0xE2

	sbrc temp,0
	 ori temp2,(1<<ram_d1)
	sbrc temp,1
	 ori temp2,(1<<ram_d2)
	sbrc temp,2
	 ori temp2,(1<<ram_d3)
	sbrc temp,3
	 ori temp2,(1<<ram_d4)

	out portc,temp2
	pop temp2
	ret


; 
; ATmega8 (HW-Rev.2)
; 
; 
;             +-------------v-------------+ 
;      Reset\ | 01 (RESET)         PC5 28 | CAS\
;      TXD    | 02 (RXD)           PC4 27 | RAS\ (*)
;      RXD    | 03 (TXD)           PC3 26 | D3
;      OE\    | 04 PD2             PC2 25 | D1
;  (*) WE\    | 05 PD3             PC1 24 | D2   (*)
;      SD_CS\ | 06 PD4             PC0 23 | D0
;      VCC    | 07 VCC             GND 22 | GND
;      GND    | 08 GND            AREF 21 | n.c.
;      Q20MHz | 09 (XTAL1)        AVCC 20 | VCC
;      Q20MHz | 10 (XTAL2)   (SCK) PB5 19 | A8 / SD_SCK (*)
;      A5     | 11 PD5      (MISO) PB4 18 | A0 / SD_MISO
;      A6     | 12 PD6      (MOSI) PB3 17 | A1 / SD_MOSI
;      A7     | 13 PD7             PB2 16 | A2
;      A4     | 14 PB0             PB1 15 | A3
;             +---------------------------+ 


; ATmega8 (HW-Rev.2)
; PORTC: [ x, x, CAS\, RAS\, D3, D2, D1, D0]

dram_getnibble_v2:
	andi temp,0xF0
	in   temp2,pinc
	andi temp2,0x0F
	or   temp,temp2
	ret


; ATmega8 (HW-Rev.2)
; PORTC: [ x, x, CAS\, RAS\, D3, D2, D1, D0]

dram_sendnibble_v2:
	
	push temp

	andi temp,0x0F         ; mask lower data nibble
	ori  temp,0x30         ; set CAS\ and RAS\ inactive

	out portc,temp
	pop temp
	ret