Signal Name Total Product Terms Product Terms Location Power Mode Pin Number PinType Pin Use
AVR_AD<0> 4   1_1  1_2  1_3  1_4 MC1 STD 1 I/O I/O
AVR_AD<1> 4   2_1  2_2  2_3  2_4 MC2 STD 44 I/O I/O
(unused) 0   MC3   42 I/O/GTS1 I
MMD_CS<1> 3   4_1  4_2  4_3 MC4 STD 43 I/O O
(unused) 0   MC5   40 I/O/GTS2 I
(unused) 0   MC6   39 I/O/GSR I
SPI_CS<5> 2   7_1  7_2    MC7 STD 38 I/O O
SPI_CS<6> 2   8_1  8_2    MC8 STD 37 I/O O
SPI_CS<7> 2   9_1  9_2    MC9 STD 36 I/O O
SRAM_AH<0> 2   10_1  10_2 MC10 STD 35 I/O O
SRAM_AH<1> 2   11_1  11_2 MC11 STD 34 I/O O
SRAM_AH<2> 2   12_1  12_2 MC12 STD 33 I/O O
SRAM_AH<3> 2   13_1  13_2 MC13 STD 29 I/O O
FTDI_WR 1   14_1 MC14 STD 28 I/O O
MMD_CS<0> 1   15_1 MC15 STD 27 I/O O
$OpTx$FX_DC$1 2   16_1  16_2 MC16 STD 26 I/O I
Bank_Reg<7> 2   17_1  17_2    MC17 STD 25 I/O I
Bank_Reg<6> 2   18_1  18_2    MC18 STD   (b) (b)

Signals Used By Logic in Function Block
  1. $OpTx$FX_DC$1
  2. AVR_AH<0>
  3. AVR_AH<1>
  4. AVR_AH<2>
  5. AVR_AH<3>
  6. AVR_AH<4>
  7. AVR_AH<5>
  8. AVR_AH<6>
  9. AVR_AH<7>
  10. AVR_RD
  11. AVR_WR
  12. Bank_Reg<0>
  13. Bank_Reg<1>
  14. Bank_Reg<2>
  15. Bank_Reg<3>
  16. Bank_Reg<4>
  17. Bank_Reg<5>
  18. Bank_Reg<6>
  19. Bank_Reg<7>
  20. AVR_AD<5>.PIN
  21. AVR_AD<6>.PIN
  22. AVR_AD<7>.PIN
  23. SPI_CS<0>
  24. SPI_CS<1>