Signal Name | Total Pterms | Signals Used | Functional Block | Macrocell | Power Mode | Slew Rate | Pin Number | Pin Type | Pin Use | Reg Init State | |||
---|---|---|---|---|---|---|---|---|---|---|---|---|---|
Ext_CS<0> | 2 | 10 | FB2 | MC5 | STD | FAST | 1 | I/O/GTS3 | O | RESET | |||
Ext_CS<1> | 2 | 10 | FB2 | MC6 | STD | FAST | 2 | I/O/GTS4 | O | RESET | |||
Ext_CS<2> | 2 | 10 | FB2 | MC8 | STD | FAST | 3 | I/O/GTS1 | O | RESET | |||
AVR_AD<0> | 2 | 2 | FB2 | MC9 | STD | FAST | 4 | I/O/GTS2 | I/O | ||||
AVR_AD<1> | 13 | 15 | FB2 | MC11 | STD | FAST | 6 | I/O | I/O | ||||
AVR_AD<2> | 13 | 15 | FB2 | MC12 | STD | FAST | 7 | I/O | I/O | ||||
AVR_AD<3> | 2 | 2 | FB2 | MC14 | STD | FAST | 8 | I/O | I/O | ||||
AVR_AD<4> | 2 | 2 | FB2 | MC15 | STD | FAST | 9 | I/O | I/O | ||||
AVR_AD<5> | 2 | 2 | FB2 | MC17 | STD | FAST | 10 | I/O | I/O | ||||
AVR_AD<6> | 23 | 14 | FB1 | MC2 | STD | FAST | 11 | I/O | I/O | ||||
AVR_AD<7> | 23 | 14 | FB1 | MC3 | STD | FAST | 12 | I/O | I/O | ||||
Bank<1> | 3 | 4 | FB1 | MC12 | STD | 18 | I/O | I | RESET | ||||
Bank<3> | 3 | 4 | FB1 | MC14 | STD | 19 | I/O | I | RESET | ||||
Flag<0> | 3 | 4 | FB1 | MC15 | STD | 20 | I/O | I | RESET | ||||
AVR_Clock | 0 | 0 | FB3 | MC6 | STD | FAST | 25 | I/O | O | RESET | |||
HCounter<6> | 4 | 10 | FB3 | MC8 | STD | 27 | I/O/GCK3 | GCK/I | RESET | ||||
VGA_Trace | 3 | 5 | FB3 | MC9 | STD | FAST | 28 | I/O | O | ||||
HCounter<9> | 5 | 11 | FB3 | MC11 | STD | 29 | I/O | (b) | RESET | ||||
HCounter<8> | 5 | 11 | FB3 | MC12 | STD | 30 | I/O | (b) | RESET | ||||
HCounter<5> | 7 | 11 | FB3 | MC14 | STD | 32 | I/O | (b) | RESET | ||||
HCounter<3> | 7 | 11 | FB3 | MC17 | STD | 34 | I/O | (b) | RESET | ||||
VGA_RGB<5> | 5 | 6 | FB5 | MC2 | STD | FAST | 35 | I/O | O | RESET | |||
VGA_RGB<4> | 5 | 6 | FB5 | MC5 | STD | FAST | 36 | I/O | O | RESET | |||
VGA_RGB<3> | 5 | 6 | FB5 | MC6 | STD | FAST | 37 | I/O | O | RESET | |||
VGA_RGB<2> | 5 | 6 | FB5 | MC8 | STD | FAST | 39 | I/O | O | RESET | |||
VGA_RGB<1> | 5 | 6 | FB5 | MC9 | STD | FAST | 40 | I/O | O | RESET | |||
VGA_RGB<0> | 5 | 6 | FB5 | MC11 | STD | FAST | 41 | I/O | O | RESET | |||
VGA_CSync | 1 | 1 | FB5 | MC12 | STD | FAST | 42 | I/O | O | ||||
VGA_HSync | 1 | 1 | FB5 | MC14 | STD | FAST | 43 | I/O | O | ||||
VGA_VSync | 1 | 1 | FB5 | MC15 | STD | FAST | 46 | I/O | O | ||||
Addr<18> | 6 | 23 | FB5 | MC17 | STD | 49 | I/O | (b) | RESET | ||||
Addr<8> | 6 | 13 | FB7 | MC2 | STD | 50 | I/O | (b) | RESET | ||||
Addr<15> | 6 | 20 | FB7 | MC5 | STD | 52 | I/O | (b) | RESET | ||||
SRAM_Addr<0> | 3 | 4 | FB7 | MC6 | STD | FAST | 53 | I/O | O | ||||
SRAM_Addr<1> | 3 | 4 | FB7 | MC8 | STD | FAST | 54 | I/O | O | ||||
SRAM_Addr<2> | 3 | 4 | FB7 | MC9 | STD | FAST | 55 | I/O | O | ||||
SRAM_Addr<3> | 3 | 4 | FB7 | MC11 | STD | FAST | 56 | I/O | O | ||||
SRAM_Addr<4> | 3 | 4 | FB7 | MC12 | STD | FAST | 58 | I/O | O | ||||
SRAM_Addr<5> | 3 | 4 | FB7 | MC14 | STD | FAST | 59 | I/O | O | ||||
SRAM_Addr<6> | 3 | 4 | FB7 | MC15 | STD | FAST | 60 | I/O | O | ||||
SRAM_Addr<7> | 3 | 4 | FB7 | MC17 | STD | FAST | 61 | I/O | O | ||||
SRAM_Addr<8> | 3 | 4 | FB8 | MC2 | STD | FAST | 63 | I/O | O | ||||
SRAM_Addr<9> | 3 | 4 | FB8 | MC5 | STD | FAST | 64 | I/O | O | ||||
SRAM_Addr<10> | 3 | 4 | FB8 | MC6 | STD | FAST | 65 | I/O | O | ||||
SRAM_Addr<11> | 3 | 4 | FB8 | MC8 | STD | FAST | 66 | I/O | O | ||||
SRAM_Addr<12> | 3 | 4 | FB8 | MC9 | STD | FAST | 67 | I/O | O | ||||
SRAM_Addr<13> | 3 | 4 | FB8 | MC11 | STD | FAST | 68 | I/O | O | ||||
SRAM_Addr<14> | 3 | 4 | FB8 | MC12 | STD | FAST | 70 | I/O | O | ||||
SRAM_Addr<15> | 3 | 5 | FB8 | MC14 | STD | FAST | 71 | I/O | O | ||||
SRAM_Addr<16> | 3 | 5 | FB8 | MC15 | STD | FAST | 72 | I/O | O | ||||
SRAM_Addr<17> | 3 | 5 | FB8 | MC17 | STD | FAST | 73 | I/O | O | ||||
SRAM_Addr<18> | 3 | 5 | FB6 | MC2 | STD | FAST | 74 | I/O | O | ||||
SRAM_Data<0> | 2 | 4 | FB6 | MC5 | STD | FAST | 76 | I/O | I/O | ||||
SRAM_Data<1> | 2 | 4 | FB6 | MC6 | STD | FAST | 77 | I/O | I/O | ||||
SRAM_Data<2> | 2 | 4 | FB6 | MC8 | STD | FAST | 78 | I/O | I/O | ||||
SRAM_Data<3> | 2 | 4 | FB6 | MC9 | STD | FAST | 79 | I/O | I/O | ||||
SRAM_Data<4> | 2 | 4 | FB6 | MC11 | STD | FAST | 80 | I/O | I/O | ||||
SRAM_Data<5> | 2 | 4 | FB6 | MC12 | STD | FAST | 81 | I/O | I/O | ||||
SRAM_Data<6> | 2 | 4 | FB6 | MC14 | STD | FAST | 82 | I/O | I/O | ||||
SRAM_Data<7> | 2 | 4 | FB6 | MC15 | STD | FAST | 85 | I/O | I/O | ||||
SRAM_OE | 2 | 3 | FB6 | MC17 | STD | FAST | 86 | I/O | O | ||||
SRAM_WR | 2 | 3 | FB4 | MC2 | STD | FAST | 87 | I/O | O | ||||
SRAM_CS | 3 | 8 | FB4 | MC5 | STD | FAST | 89 | I/O | O | ||||
AVR_AL<0> | 3 | 2 | FB4 | MC6 | STD | FAST | 90 | I/O | O | RESET | |||
AVR_AL<1> | 3 | 2 | FB4 | MC8 | STD | FAST | 91 | I/O | O | RESET | |||
AVR_AL<2> | 3 | 2 | FB4 | MC9 | STD | FAST | 92 | I/O | O | RESET | |||
AVR_AL<3> | 3 | 2 | FB4 | MC11 | STD | FAST | 93 | I/O | O | RESET | |||
AVR_AL<4> | 3 | 2 | FB4 | MC12 | STD | FAST | 94 | I/O | O | RESET | |||
AVR_AL<5> | 3 | 2 | FB4 | MC14 | STD | FAST | 95 | I/O | O | RESET | |||
AVR_AL<6> | 3 | 2 | FB4 | MC15 | STD | FAST | 96 | I/O | O | RESET | |||
AVR_AL<7> | 3 | 2 | FB4 | MC17 | STD | FAST | 97 | I/O | O | RESET | |||
Ext_CS_2/Ext_CS_2_SETF__$INT | 1 | 8 | FB2 | MC2 | STD | 99 | I/O/GSR | I | |||||
AVR_AD<4>_BUFR | 22 | 13 | FB1 | MC10 | STD | (b) | (b) | ||||||
Bank<2> | 3 | 4 | FB1 | MC13 | STD | (b) | (b) | D | RESET | ||||
Bank<0> | 3 | 4 | FB1 | MC16 | STD | (b) | (b) | D | RESET | ||||
AVR_AD<0>_BUFR | 16 | 15 | FB2 | MC1 | STD | (b) | (b) | ||||||
Ext_CS_1/Ext_CS_1_SETF__$INT | 1 | 8 | FB2 | MC3 | STD | (b) | (b) | ||||||
CS_CPLD/CS_CPLD_SETF__$INT | 1 | 7 | FB2 | MC4 | STD | (b) | (b) | ||||||
$OpTx$$OpTx$FX_DC$65_INV$93 | 1 | 8 | FB2 | MC7 | STD | (b) | (b) | ||||||
Ext_CS_0/Ext_CS_0_SETF__$INT | 2 | 9 | FB2 | MC16 | STD | (b) | (b) | ||||||
HCounter<2> | 7 | 11 | FB3 | MC1 | STD | (b) | (b) | D | RESET | ||||
AVR_AD<5>_BUFR | 22 | 13 | FB3 | MC4 | STD | (b) | (b) | ||||||
HCounter<7> | 4 | 11 | FB3 | MC7 | STD | (b) | (b) | T | RESET | ||||
HCounter<0> | 4 | 9 | FB3 | MC10 | STD | (b) | (b) | T | RESET | ||||
HCounter<1> | 6 | 10 | FB3 | MC13 | STD | (b) | (b) | D | RESET | ||||
HCounter<4> | 7 | 11 | FB3 | MC16 | STD | (b) | (b) | T | RESET | ||||
Addr<0> | 3 | 5 | FB5 | MC1 | STD | (b) | (b) | T | RESET | ||||
Addr<1> | 5 | 6 | FB5 | MC3 | STD | (b) | (b) | D | RESET | ||||
Addr<6> | 6 | 11 | FB5 | MC4 | STD | (b) | (b) | T | RESET | ||||
Addr<5> | 6 | 10 | FB5 | MC7 | STD | (b) | (b) | T | RESET | ||||
Addr<4> | 6 | 9 | FB5 | MC10 | STD | (b) | (b) | T | RESET | ||||
Addr<3> | 6 | 8 | FB5 | MC13 | STD | (b) | (b) | T | RESET | ||||
Addr<2> | 6 | 7 | FB5 | MC16 | STD | (b) | (b) | D | RESET | ||||
Addr<17> | 6 | 22 | FB5 | MC18 | STD | (b) | (b) | T | RESET | ||||
Addr<9> | 6 | 14 | FB7 | MC1 | STD | (b) | (b) | T | RESET | ||||
Addr<7> | 6 | 12 | FB7 | MC3 | STD | (b) | (b) | T | RESET | ||||
Addr<16> | 6 | 21 | FB7 | MC4 | STD | (b) | (b) | T | RESET | ||||
Addr<14> | 6 | 19 | FB7 | MC7 | STD | (b) | (b) | T | RESET | ||||
Addr<13> | 6 | 18 | FB7 | MC10 | STD | (b) | (b) | T | RESET | ||||
Addr<12> | 6 | 17 | FB7 | MC13 | STD | (b) | (b) | T | RESET | ||||
Addr<11> | 6 | 16 | FB7 | MC16 | STD | (b) | (b) | T | RESET | ||||
Addr<10> | 6 | 15 | FB7 | MC18 | STD | (b) | (b) | T | RESET | ||||
Mtrien_AVR_AD | 3 | 4 | FB8 | MC13 | STD | (b) | (b) | D | RESET | ||||
CS_CPLD | 3 | 10 | FB8 | MC16 | STD | (b) | (b) | D | RESET | ||||
AVR_AD<3>_BUFR | 12 | 14 | FB8 | MC18 | STD | (b) | (b) |