Design Name | avga |
Fitting Status | Successful |
SW Version | G.36 |
Device Used | XC95144XL-5-TQ100 |
Date | 3- 5-2005, 3:34PM |
Macrocells Used | Pterms Used | Registers Used | Pins Used | Function Block Inputs Used |
---|---|---|---|---|
105/144 (73%) | 489/720 (68%) | 54/144 (38%) | 73/81 (91%) | 201/432 (47%) |
|
|
Total Macrocells Available | 144 |
Registered Macrocells | 54 |
Non-registered Macrocells driving I/O | 42 |
Signal mapped onto global clock net (GCK1) | AVR_ALE |
Signal mapped onto global clock net (GCK2) | AVR_WR |
Signal mapped onto global clock net (GCK3) | Clock |
Macrocells in high performance mode (MCHP) | 105 |
Macrocells in low power mode (MCLP) | 0 |
Total macrocells used (MC) | 105 |