-- ----------------------------------------- -- -- VGA Ansteuerung in VHDL -- -- Ausgabe eines roten Bildes am VGA Port -- -- -- -- Patrick Hergan 08.11.2012 -- -- Terasic DE1 Board -- -- ----------------------------------------- -- library IEEE; use ieee.std_logic_1164.all; use ieee.std_logic_unsigned.all; entity vga is port( clk50_i : in std_ulogic; --50MHz Clock red_o : out std_ulogic; blue_o : out std_ulogic; green_o : out std_ulogic; hs_o : out std_ulogic; --horizontal sync vs_o: out std_ulogic; --vertival sync reset_i : in std_ulogic --asynchroner reset ); end vga; architecture rtl of vga is signal clk25 : std_logic; signal horizontal_counter : std_logic_vector (9 downto 0); signal vertical_counter : std_logic_vector (9 downto 0); begin takt: process (clk50_i) --25MHz fuer VGA begin if clk50_i'event and clk50_i='1' then if (clk25 = '0') then clk25 <= '1'; else clk25 <= '0'; end if; end if; end process takt; process(clk25, reset_i) begin if(reset_i = '1') then horizontal_counter <= "0000000000"; vertical_counter <= "0000000000"; elsif (clk25 ' event and clk25 = '1') then --horizontal timings horizontal_counter <= horizontal_counter + 1; if(horizontal_counter > "1010010000" and horizontal_counter < "1011110000") Then -- >656 and <752 hs_o <= '0'; else hs_o <= '1'; end if; if(horizontal_counter > "0000000000" and horizontal_counter < "1010000001") then -- > 0 and < 641 blue_o <= '0'; red_o <= '1'; green_o <= '0'; else blue_o <= '0'; red_o <= '0'; green_o <= '0'; end if; if(horizontal_counter = "1100100000") then --800 horizontal_counter <= "0000000000"; vertical_counter <= vertical_counter + 1; end if; --Vertical Timings if (vertical_counter > "111101010" and vertical_counter < "111101101") then -- > 490 and < 493 vs_o <= '0'; else vs_o <= '1'; end if; if(vertical_counter > "111100000" and vertical_counter < "1000001110") then -- >480 and < 526 blue_o <= '0'; red_o <= '0'; green_o <= '0'; end if; if(vertical_counter = "1000001110") then --525 vertical_counter <= "0000000000"; end if; end if; end process; end rtl;