1 | #include <mega64.h>
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2 | #include <delay.h>
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3 | #include <stdio.h>
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4 |
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5 | #define RXB8 1
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6 | #define TXB8 0
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7 | #define UPE 2
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8 | #define OVR 3
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9 | #define FE 4
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10 | #define UDRE 5
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11 | #define RXC 7
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12 |
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13 | #define FRAMING_ERROR (1<<FE)
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14 | #define PARITY_ERROR (1<<UPE)
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15 | #define DATA_OVERRUN (1<<OVR)
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16 | #define DATA_REGISTER_EMPTY (1<<UDRE)
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17 | #define RX_COMPLETE (1<<RXC)
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18 |
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19 | // USART0 Receiver buffer
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20 | #define RX_BUFFER_SIZE0 8
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21 | char rx_buffer0[RX_BUFFER_SIZE0];
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22 | unsigned char rx_wr_index0,rx_rd_index0,rx_counter0;
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23 | // This flag is set on USART0 Receiver buffer overflow
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24 | bit rx_buffer_overflow0;
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25 |
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26 | // USART0 Receiver interrupt service routine
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27 | #pragma savereg-
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28 | interrupt [USART0_RXC] void uart0_rx_isr(void)
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29 | {
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30 | char status,data;
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31 | #asm
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32 | push r26
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33 | push r27
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34 | push r30
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35 | push r31
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36 | in r26,sreg
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37 | push r26
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38 | #endasm
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39 | status=UCSR0A;
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40 | data=UDR0;
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41 | if ((status & (FRAMING_ERROR | PARITY_ERROR | DATA_OVERRUN))==0)
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42 | {
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43 | rx_buffer0[rx_wr_index0]=data;
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44 | if (++rx_wr_index0 == RX_BUFFER_SIZE0) rx_wr_index0=0;
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45 | if (++rx_counter0 == RX_BUFFER_SIZE0)
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46 | {
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47 | rx_counter0=0;
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48 | rx_buffer_overflow0=1;
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49 | };
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50 | };
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51 | #asm
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52 | pop r26
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53 | out sreg,r26
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54 | pop r31
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55 | pop r30
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56 | pop r27
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57 | pop r26
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58 | #endasm
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59 | }
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60 | #pragma savereg+
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61 |
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62 | #ifndef _DEBUG_TERMINAL_IO_
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63 | // Get a character from the USART0 Receiver buffer
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64 | #define _ALTERNATE_GETCHAR_
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65 | #pragma used+
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66 | char getchar(void)
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67 | {
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68 | char data;
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69 | while (rx_counter0==0);
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70 | data=rx_buffer0[rx_rd_index0];
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71 | if (++rx_rd_index0 == RX_BUFFER_SIZE0) rx_rd_index0=0;
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72 | #asm("cli")
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73 | --rx_counter0;
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74 | #asm("sei")
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75 | return data;
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76 | }
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77 | #pragma used-
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78 | #endif
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79 |
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80 | // USART0 Transmitter buffer
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81 | #define TX_BUFFER_SIZE0 8
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82 | char tx_buffer0[TX_BUFFER_SIZE0];
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83 | unsigned char tx_wr_index0,tx_rd_index0,tx_counter0;
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84 |
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85 | // USART0 Transmitter interrupt service routine
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86 | #pragma savereg-
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87 | interrupt [USART0_TXC] void uart0_tx_isr(void)
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88 | {
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89 | #asm
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90 | push r26
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91 | push r27
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92 | push r30
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93 | push r31
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94 | in r26,sreg
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95 | push r26
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96 | #endasm
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97 | if (tx_counter0)
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98 | {
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99 | --tx_counter0;
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100 | UDR0=tx_buffer0[tx_rd_index0];
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101 | if (++tx_rd_index0 == TX_BUFFER_SIZE0) tx_rd_index0=0;
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102 | };
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103 | #asm
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104 | pop r26
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105 | out sreg,r26
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106 | pop r31
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107 | pop r30
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108 | pop r27
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109 | pop r26
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110 | #endasm
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111 | }
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112 | #pragma savereg+
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113 |
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114 | #ifndef _DEBUG_TERMINAL_IO_
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115 | // Write a character to the USART0 Transmitter buffer
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116 | #define _ALTERNATE_PUTCHAR_
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117 | #pragma used+
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118 | void putchar(char c)
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119 | {
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120 | while (tx_counter0 == TX_BUFFER_SIZE0);
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121 | #asm("cli")
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122 | if (tx_counter0 || ((UCSR0A & DATA_REGISTER_EMPTY)==0))
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123 | {
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124 | tx_buffer0[tx_wr_index0]=c;
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125 | if (++tx_wr_index0 == TX_BUFFER_SIZE0) tx_wr_index0=0;
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126 | ++tx_counter0;
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127 | }
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128 | else UDR0=c;
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129 | #asm("sei")
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130 | }
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131 | #pragma used-
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132 | #endif
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133 |
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134 | // USART1 Receiver buffer
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135 | #define RX_BUFFER_SIZE1 8
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136 | char rx_buffer1[RX_BUFFER_SIZE1];
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137 | unsigned char rx_wr_index1,rx_rd_index1,rx_counter1;
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138 | // This flag is set on USART1 Receiver buffer overflow
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139 | bit rx_buffer_overflow1;
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140 |
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141 | // USART1 Receiver interrupt service routine
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142 | #pragma savereg-
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143 | interrupt [USART1_RXC] void uart1_rx_isr(void)
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144 | {
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145 | char status,data;
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146 | #asm
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147 | push r26
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148 | push r27
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149 | push r30
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150 | push r31
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151 | in r26,sreg
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152 | push r26
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153 | #endasm
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154 | status=UCSR1A;
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155 | data=UDR1;
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156 | if ((status & (FRAMING_ERROR | PARITY_ERROR | DATA_OVERRUN))==0)
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157 | {
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158 | rx_buffer1[rx_wr_index1]=data;
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159 | if (++rx_wr_index1 == RX_BUFFER_SIZE1) rx_wr_index1=0;
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160 | if (++rx_counter1 == RX_BUFFER_SIZE1)
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161 | {
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162 | rx_counter1=0;
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163 | rx_buffer_overflow1=1;
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164 | };
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165 | };
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166 | #asm
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167 | pop r26
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168 | out sreg,r26
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169 | pop r31
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170 | pop r30
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171 | pop r27
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172 | pop r26
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173 | #endasm
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174 | }
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175 | #pragma savereg+
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176 |
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177 | // Get a character from the USART1 Receiver buffer
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178 | #pragma used+
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179 | char getchar1(void)
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180 | {
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181 | char data;
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182 | while (rx_counter1==0);
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183 | data=rx_buffer1[rx_rd_index1];
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184 | if (++rx_rd_index1 == RX_BUFFER_SIZE1) rx_rd_index1=0;
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185 | #asm("cli")
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186 | --rx_counter1;
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187 | #asm("sei")
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188 | return data;
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189 | }
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190 | #pragma used-
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191 | // USART1 Transmitter buffer
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192 | #define TX_BUFFER_SIZE1 8
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193 | char tx_buffer1[TX_BUFFER_SIZE1];
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194 | unsigned char tx_wr_index1,tx_rd_index1,tx_counter1;
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195 |
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196 | // USART1 Transmitter interrupt service routine
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197 | #pragma savereg-
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198 | interrupt [USART1_TXC] void uart1_tx_isr(void)
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199 | {
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200 | #asm
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201 | push r26
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202 | push r27
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203 | push r30
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204 | push r31
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205 | in r26,sreg
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206 | push r26
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207 | #endasm
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208 | if (tx_counter1)
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209 | {
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210 | --tx_counter1;
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211 | UDR1=tx_buffer1[tx_rd_index1];
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212 | if (++tx_rd_index1 == TX_BUFFER_SIZE1) tx_rd_index1=0;
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213 | };
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214 | #asm
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215 | pop r26
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216 | out sreg,r26
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217 | pop r31
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218 | pop r30
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219 | pop r27
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220 | pop r26
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221 | #endasm
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222 | }
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223 | #pragma savereg+
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224 |
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225 | // Write a character to the USART1 Transmitter buffer
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226 | #pragma used+
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227 | void putchar1(char c)
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228 | {
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229 | while (tx_counter1 == TX_BUFFER_SIZE1);
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230 | #asm("cli")
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231 | if (tx_counter1 || ((UCSR1A & DATA_REGISTER_EMPTY)==0))
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232 | {
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233 | tx_buffer1[tx_wr_index1]=c;
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234 | if (++tx_wr_index1 == TX_BUFFER_SIZE1) tx_wr_index1=0;
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235 | ++tx_counter1;
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236 | }
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237 | else UDR1=c;
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238 | #asm("sei")
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239 | }
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240 | #pragma used-
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241 |
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242 | // Standard Input/Output functions
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243 | #include <stdio.h>
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244 |
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245 | // 2 Wire bus interrupt service routine
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246 | interrupt [TWI] void twi_isr(void)
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247 | {
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248 | // Place your code here
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249 |
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250 | PORTC=~PORTC;
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251 |
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252 |
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253 | }
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254 |
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255 |
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256 | // Declare your global variables here
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257 | void main(void)
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258 | {
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259 | // Declare your local variables here
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260 |
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261 | // Input/Output Ports initialization
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262 | // Port A initialization
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263 | // Func0=In Func1=In Func2=In Func3=In Func4=In Func5=In Func6=In Func7=In
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264 | // State0=T State1=T State2=T State3=T State4=T State5=T State6=T State7=T
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265 | PORTA=0x00;
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266 | DDRA=0x00;
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267 |
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268 | // Port B initialization
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269 | // Func0=In Func1=In Func2=In Func3=In Func4=In Func5=In Func6=In Func7=In
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270 | // State0=T State1=T State2=T State3=T State4=T State5=T State6=T State7=T
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271 |
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272 | //PORTB=0xFF;
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273 | //DDRB=0xFF;
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274 |
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275 | PORTB=0xFF;
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276 | DDRB=0x00;
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277 |
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278 | // Port C initialization
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279 | // Func0=In Func1=In Func2=In Func3=In Func4=In Func5=In Func6=In Func7=In
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280 | // State0=T State1=T State2=T State3=T State4=T State5=T State6=T State7=T
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281 | PORTC=0x00;
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282 | DDRC=0xFF;
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283 |
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284 | // Port D initialization
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285 | // Func0=In Func1=In Func2=In Func3=In Func4=In Func5=In Func6=In Func7=In
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286 | // State0=T State1=T State2=T State3=T State4=T State5=T State6=T State7=T
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287 | PORTD=0x00;
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288 | DDRD=0x00;
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289 |
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290 | // Port E initialization
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291 | // Func0=In Func1=In Func2=In Func3=In Func4=In Func5=In Func6=In Func7=In
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292 | // State0=T State1=T State2=T State3=T State4=T State5=T State6=T State7=T
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293 | PORTE=0x00;
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294 | DDRE=0x00;
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295 |
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296 | // Port F initialization
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297 | // Func0=In Func1=In Func2=In Func3=In Func4=In Func5=In Func6=In Func7=In
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298 | // State0=T State1=T State2=T State3=T State4=T State5=T State6=T State7=T
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299 | PORTF=0x00;
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300 | DDRF=0x00;
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301 |
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302 | // Port G initialization
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303 | // Func0=In Func1=In Func2=In Func3=In Func4=In
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304 | // State0=T State1=T State2=T State3=T State4=T
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305 | PORTG=0x00;
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306 | DDRG=0x00;
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307 |
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308 | // Timer/Counter 0 initialization
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309 | // Clock source: System Clock
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310 | // Clock value: Timer 0 Stopped
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311 | // Mode: Normal top=FFh
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312 | // OC0 output: Disconnected
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313 | ASSR=0x00;
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314 | TCCR0=0x00;
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315 | TCNT0=0x00;
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316 | OCR0=0x00;
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317 |
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318 | // Timer/Counter 1 initialization
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319 | // Clock source: System Clock
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320 | // Clock value: Timer 1 Stopped
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321 | // Mode: Normal top=FFFFh
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322 | // OC1A output: Discon.
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323 | // OC1B output: Discon.
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324 | // OC1C output: Discon.
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325 | // Noise Canceler: Off
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326 | // Input Capture on Falling Edge
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327 | TCCR1A=0x00;
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328 | TCCR1B=0x00;
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329 | TCNT1H=0x00;
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330 | TCNT1L=0x00;
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331 | OCR1AH=0x00;
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332 | OCR1AL=0x00;
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333 | OCR1BH=0x00;
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334 | OCR1BL=0x00;
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335 | OCR1CH=0x00;
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336 | OCR1CL=0x00;
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337 |
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338 | // Timer/Counter 2 initialization
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339 | // Clock source: System Clock
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340 | // Clock value: Timer 2 Stopped
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341 | // Mode: Normal top=FFh
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342 | // OC2 output: Disconnected
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343 | TCCR2=0x00;
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344 | TCNT2=0x00;
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345 | OCR2=0x00;
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346 |
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347 | // Timer/Counter 3 initialization
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348 | // Clock source: System Clock
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349 | // Clock value: Timer 3 Stopped
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350 | // Mode: Normal top=FFFFh
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351 | // OC3A output: Discon.
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352 | // OC3B output: Discon.
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353 | // OC3C output: Discon.
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354 | TCCR3A=0x00;
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355 | TCCR3B=0x00;
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356 | TCNT3H=0x00;
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357 | TCNT3L=0x00;
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358 | OCR3AH=0x00;
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359 | OCR3AL=0x00;
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360 | OCR3BH=0x00;
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361 | OCR3BL=0x00;
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362 | OCR3CH=0x00;
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363 | OCR3CL=0x00;
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364 |
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365 | // External Interrupt(s) initialization
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366 | // INT0: Off
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367 | // INT1: Off
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368 | // INT2: Off
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369 | // INT3: Off
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370 | // INT4: Off
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371 | // INT5: Off
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372 | // INT6: Off
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373 | // INT7: Off
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374 | EICRA=0x00;
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375 | EICRB=0x00;
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376 | EIMSK=0x00;
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377 |
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378 | // Timer(s)/Counter(s) Interrupt(s) initialization
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379 | TIMSK=0x00;
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380 | ETIMSK=0x00;
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381 |
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382 | // USART0 initialization
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383 | // Communication Parameters: 8 Data, 1 Stop, No Parity
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384 | // USART0 Receiver: On
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385 | // USART0 Transmitter: On
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386 | // USART0 Mode: Asynchronous
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387 | // USART0 Baud rate: 9600
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388 | UCSR0A=0x00;
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389 | UCSR0B=0xD8;
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390 | UCSR0C=0x06;
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391 | UBRR0H=0x00;
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392 | UBRR0L=0x19;
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393 |
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394 | // USART1 initialization
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395 | // Communication Parameters: 8 Data, 1 Stop, No Parity
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396 | // USART1 Receiver: On
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397 | // USART1 Transmitter: On
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398 | // USART1 Mode: Asynchronous
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399 | // USART1 Baud rate: 9600
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400 | UCSR1A=0x00;
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401 | UCSR1B=0xD8;
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402 | UCSR1C=0x06;
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403 | UBRR1H=0x00;
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404 | UBRR1L=0x19;
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405 |
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406 | // Analog Comparator initialization
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407 | // Analog Comparator: Off
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408 | // Analog Comparator Input Capture by Timer/Counter 1: Off
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409 | // Analog Comparator Output: Off
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410 | ACSR=0x80;
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411 | SFIOR=0x00;
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412 |
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413 | // 2 Wire Bus initialization
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414 | // Generate Acknowledge Pulse: On
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415 | // 2 Wire Bus Slave Address: 1h
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416 | // General Call Recognition: On
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417 | // Bit Rate: 230,400 kHz
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418 |
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419 | TWBR=0x00;
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420 | TWAR=0x03;
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421 | TWCR=0x45;
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422 | //TWCR=0x44; //interrupt aus
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423 |
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424 |
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425 |
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426 | // Global enable interrupts
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427 | #asm("sei")
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428 |
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429 | delay_ms(5);
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430 | printf("Start:\r\n");
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431 |
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432 |
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433 | while (1)
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434 | {
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435 |
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436 | unsigned char adress=0x02;
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437 | unsigned char data=0;
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438 |
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439 | // Place your code here
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440 | #define TWINT 7
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441 | #define TWSTA 5
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442 | #define TWEN 2
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443 | #define TWSTO 4
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444 | #define TWEA 6
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445 |
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446 | #define START 0x08
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447 | #define MT_SLA_ACK 0x18
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448 | #define MT_DATA_ACK 0x28
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449 |
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450 |
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451 |
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452 | printf("Master\r\n");
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453 | PORTC=0x00;
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454 |
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455 | printf("TWSR=%X \r\n",TWSR);
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456 |
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457 | //Start Bedinnung
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458 | TWCR=(1<<TWINT)|(1<<TWSTA)|(1<<TWEN);
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459 |
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460 | //warte auf Twint flag, Start wurde gesendt
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461 | printf("Wait TWINT Flag Set\r\n");
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462 | while (!(TWCR&(1<<TWINT))) {
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463 | printf("TWSR=%X \r\n",TWSR);
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464 | delay_ms(100);
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465 | }
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466 |
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467 |
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468 |
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469 |
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470 | };
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471 | }
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