1 | Verdrahtung:
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2 | ++++++++++++
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3 |
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4 | Master Sklave
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5 | ++++++++ ++++++++
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6 | + + PB0 PB4 + +
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7 | + /SS +------------->+ /SS +
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8 | + + PB1 PB7 + +
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9 | + SCK +------------->+ SCK +
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10 | + + PB2 PB5 + +
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11 | + MOSI +------------->+ MOSI +
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12 | + + PB3 PB6 + +
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13 | + MISO +<-------------+ MISO +
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14 | + + + +
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15 | ++++++++ ++++++++
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16 |
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17 |
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18 | //===========================================================================
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19 | // ATT-Testbench - SPI-Sklave : ATMEGA 32
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20 | // (c) Thomas Mueller
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21 | // File: main.c
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22 | //===========================================================================
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23 |
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24 | //standard header files
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25 | #include <avr/io.h>
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26 | #include <stdint.h>
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27 | #include <avr/interrupt.h>
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28 |
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29 |
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30 | //Init SPI as Sklave
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31 | void spi_sklave_init(void)
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32 | {
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33 | //datasheet atmega32 at page 133
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34 | //portdirection
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35 | DDRB |= 0x40; //MISO -> output
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36 | SPCR = 0xC0; //SPI enable
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37 | }
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38 |
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39 |
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40 | //SPI transfer complete
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41 | ISR(SPI_STC_vect)
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42 | {
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43 | SPDR = 0x04; //return 0x04 to master
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44 | PORTC = SPDR; //reading SPI-data
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45 | }
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46 |
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47 |
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48 | //main
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49 | int main(void)
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50 | {
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51 | spi_sklave_init();
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52 | DDRC = 0xFF; //8Bit SPI-Dataframe from master on Port C
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53 | sei(); //enable global interrupt
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54 |
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55 | while(1);
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56 |
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57 | return(0);
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58 | }
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59 |
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60 | //===========================================================================
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61 | // End of SourceCode.
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62 | //===========================================================================
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63 |
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64 |
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65 |
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66 | //===========================================================================
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67 | // ATT-Testbench - SPI-Master : ATMEGA 128
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68 | // (c) Thomas Mueller
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69 | // File: main.c
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70 | //===========================================================================
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71 |
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72 | //standard header files
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73 | #include <avr/io.h>
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74 | #include <stdint.h>
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75 | #include <avr/interrupt.h>
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76 |
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77 |
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78 | void spi_master_init(void)
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79 | {
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80 | //datasheet atmega128 on page 164
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81 | //portdirection
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82 | DDRB |= 0x07; // /SS,SCK and MOSI output
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83 | PORTB |= 0x01; // /SS=1
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84 | SPCR = 0xD1; // init SPI with SPI-ISR
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85 | }
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86 |
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87 | ISR(TIMER1_OVF_vect) //f ca. 1Hz
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88 | {
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89 | //TIMER1 has overflowed
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90 | TCNT1H = 0xF8; //reload counter high value
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91 | TCNT1L = 0x30; //reload counter low value
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92 |
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93 | PORTB &= 0xFE;// /SS=0
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94 | SPDR = 0xAA; // starting transmission
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95 | }
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96 |
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97 |
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98 | //SPI transfer complete
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99 | ISR(SPI_STC_vect)
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100 | {
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101 | PORTD = SPDR; //data from sklave at PORTC
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102 | PORTB |= 0x01;// /SS=1
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103 | }
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104 |
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105 |
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106 |
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107 | int main(void)
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108 | {
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109 | DDRD = 0xFF; //Portdirection
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110 | spi_master_init();
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111 | timer1_init();
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112 | TIMSK = 0x04; //timer interrupt sources
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113 | sei();
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114 |
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115 | while(1);
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116 |
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117 | return(0);
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118 | }
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119 |
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120 | //===========================================================================
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121 | // End of SourceCode.
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122 | //===========================================================================
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