1 | #include <stdint.h>
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2 | #include <avr/io.h>
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3 | #include <avr/wdt.h>
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4 | #include <avr/interrupt.h>
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5 |
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6 | #define FAN_BIT 3
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7 | #define FAN_PORT PORTA
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8 | // #define FAN_DDR DDRA
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9 |
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10 | #define PM_BIT PINA7
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11 | #define PM_PIN PINA
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12 |
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13 |
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14 | // Software-defines
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15 | #define ADMUX_REFS ((0<<REFS1)|(0<<REFS0))
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16 | #define ADMUX_CH_MASK 7
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17 | #define ADCSRA_BASE_MASK ((1<<ADEN)|(1<<ADATE)|(1<<ADIF)|(1<<ADIE)|7) // enable ADC, clear Interrupt Flag, enable ADC-Interrupts, select prescaler 7 == 1/128
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18 | #define GIMSK_INIT (1<<PCIE1)
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19 |
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20 | // State-Bits
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21 | #define SB_ADC_NEWDAT 0
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22 | #define SB_SPI_NEWTX 1
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23 | #define SB_SPI_ACTIVE 2
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24 | #define SB_SPI_NEWRX 3
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25 | #define SB_SPI_TXVALID 4
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26 |
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27 |
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28 | // globale Variablen
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29 | volatile uint8_t state_bits = 0;
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30 | volatile uint8_t spi_cntr;
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31 | volatile uint8_t spi_tx_buf[5];
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32 | volatile uint8_t spi_rx_buf[6];
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33 |
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34 |
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35 |
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36 |
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37 | int main(void)
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38 | {
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39 | // initialize Ports
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40 | DDRA = (1<<FAN_BIT);
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41 | PORTA = (1<<FAN_BIT); // Fan is default on
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42 |
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43 | // initialize external interrupts
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44 | PCMSK1 = (1<<PCINT9); // select PCINT1 for #SS-pin
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45 | GIMSK = GIMSK_INIT; // enable external interrupts
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46 |
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47 | // enable Interrupts
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48 | sei();
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49 |
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50 | while(1)
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51 | {
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52 | }
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53 | }
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54 |
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55 | ISR( PCINT1_vect )
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56 | {
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57 | // SS-pin toggled
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58 | if( !( PINB & (1<<PB1) ) )
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59 | {
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60 | // Slave selected
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61 | spi_cntr = 0;
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62 | // enable SPI
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63 | USISR = (1<<USIOIF) | 0; // reset InterruptFlag and USI-counter
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64 | USICR = (1<<USIOIE) | (1<<USIWM0) | (1<<USICS1); // Enable USI-Overflow-Interrupt, select 3-Wire-Mode, set SPI-Mode 0
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65 | DDRA = (1<<FAN_BIT) | (1<<MISO_BIT); // MISO-Pin is Output
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66 | // transmit state
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67 | uint8_t tmp = state_bits;
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68 | USIDR = tmp;
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69 | state_bits = (tmp & ~(1<<SB_SPI_NEWRX)) | (1<<SB_SPI_ACTIVE);
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70 | }
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71 | else
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72 | {
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73 | // Slave unselsected => disable SPI
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74 | USICR = 0; // deactivate USI
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75 | DDRA = (1<<FAN_BIT) & ~(1<<MISO_BIT); // set MISO-Pin as Input
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76 |
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77 | uint8_t tmp = state_bits;
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78 | tmp &= ~(1<<SB_SPI_ACTIVE);
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79 | if( spi_cntr <= 6 )
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80 | tmp = ( tmp & ~(1<<SB_SPI_NEWTX) ) | (1<<SB_SPI_NEWRX);
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81 | state_bits = tmp;
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82 | }
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83 | }
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84 |
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85 | ISR( USI_OVF_vect )
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86 | {
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87 | FAN_PORT ^= (1<<FAN_BIT); // debug
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88 |
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89 | // SPI data transfer complete
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90 | uint8_t state = spi_cntr;
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91 | if( state <= 5 )
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92 | spi_rx_buf[state] = USIBR;
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93 | if( state < 5 )
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94 | //USIDR = spi_tx_buf[state];
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95 | USIDR = spi_rx_buf[state]; // empfangene Daten direkt wieder zurück schicken...
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96 | if( state < 255 )
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97 | state++;
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98 | spi_cntr = state;
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99 |
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100 | FAN_PORT ^= (1<<FAN_BIT); // debug
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101 | }
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