1 | #ifndef __GPIO_H__
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2 | #define __GPIO_H__
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3 |
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4 | /* Generated for XMC1100_TSSOP38 on: Thu Feb 7 12:31:52 2013*/
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5 |
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6 | #include <XMC1100.h>
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7 |
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8 | #define INPUT 0x00U
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9 | #define INPUT_PD 0x08U
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10 | #define INPUT_PU 0x10U
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11 | #define INPUT_PPS 0x18U
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12 | #define INPUT_INV 0x20U
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13 | #define INPUT_INV_PD 0x28U
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14 | #define INPUT_INV_PU 0x30U
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15 | #define INPUT_INV_PPS 0x38U
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16 | #define OUTPUT_PP_GP 0x80U
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17 | #define OUTPUT_PP_AF1 0x88U
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18 | #define OUTPUT_PP_AF2 0x90U
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19 | #define OUTPUT_PP_AF3 0x98U
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20 | #define OUTPUT_PP_AF4 0xA0U
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21 | #define OUTPUT_PP_AF5 0xA8U
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22 | #define OUTPUT_PP_AF6 0xB0U
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23 | #define OUTPUT_PP_AF7 0xB8U
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24 | #define OUTPUT_OD_GP 0xC0U
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25 | #define OUTPUT_OD_AF1 0xC8U
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26 | #define OUTPUT_OD_AF2 0xD0U
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27 | #define OUTPUT_OD_AF3 0xD8U
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28 | #define OUTPUT_OD_AF4 0XE0U
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29 | #define OUTPUT_OD_AF5 0xE8U
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30 | #define OUTPUT_OD_AF6 0xF0U
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31 | #define OUTPUT_OD_AF7 0XF8U
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32 |
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33 | #define SOFTWARE 0x0UL
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34 | #define HW0 0x1UL
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35 | #define HW1 0x2UL
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36 |
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37 | __STATIC_INLINE void P0_0_set_mode(uint8_t mode){
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38 | PORT0->IOCR0 &= ~0x000000f8UL;
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39 | PORT0->IOCR0 |= mode << 0;
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40 | }
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41 |
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42 | __STATIC_INLINE void P0_0_set_hwsel(uint32_t config){
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43 | PORT0->HWSEL &= ~0x00000003UL;
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44 | PORT0->HWSEL |= config << 0;
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45 | }
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46 |
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47 | __STATIC_INLINE void P0_0_set_standard_hysteresis(){
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48 | PORT0->PHCR0 &= ~0x00000004UL;
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49 | }
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50 |
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51 | __STATIC_INLINE void P0_0_set_large_hysteresis(){
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52 | PORT0->PHCR0 |= 0x00000004UL;
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53 | }
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54 |
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55 | __STATIC_INLINE void P0_0_set(void){
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56 | PORT0->OMR = 0x00000001UL;
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57 | }
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58 |
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59 | __STATIC_INLINE void P0_0_reset(void){
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60 | PORT0->OMR = 0x00010000UL;
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61 | }
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62 |
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63 | __STATIC_INLINE void P0_0_toggle(void){
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64 | PORT0->OMR = 0x00010001UL;
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65 | }
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66 |
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67 | __STATIC_INLINE uint32_t P0_0_read(void){
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68 | return(PORT0->IN & 0x00000001UL);
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69 | }
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70 |
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71 | __STATIC_INLINE void P0_0_enable_pps(void){
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72 | PORT0->PPS |= 0x00000001UL;
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73 | }
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74 |
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75 | __STATIC_INLINE void P0_0_disable_pps(void){
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76 | PORT0->PPS &= ~0x00000001UL;
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77 | }
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78 |
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79 | __STATIC_INLINE void P0_1_set_mode(uint8_t mode){
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80 | PORT0->IOCR0 &= ~0x0000f800UL;
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81 | PORT0->IOCR0 |= mode << 8;
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82 | }
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83 |
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84 | __STATIC_INLINE void P0_1_set_hwsel(uint32_t config){
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85 | PORT0->HWSEL &= ~0x0000000cUL;
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86 | PORT0->HWSEL |= config << 2;
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87 | }
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88 |
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89 | __STATIC_INLINE void P0_1_set_standard_hysteresis(){
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90 | PORT0->PHCR0 &= ~0x00000040UL;
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91 | }
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92 |
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93 | __STATIC_INLINE void P0_1_set_large_hysteresis(){
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94 | PORT0->PHCR0 |= 0x00000040UL;
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95 | }
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96 |
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97 | __STATIC_INLINE void P0_1_set(void){
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98 | PORT0->OMR = 0x00000002UL;
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99 | }
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100 |
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101 | __STATIC_INLINE void P0_1_reset(void){
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102 | PORT0->OMR = 0x00020000UL;
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103 | }
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104 |
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105 | __STATIC_INLINE void P0_1_toggle(void){
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106 | PORT0->OMR = 0x00020002UL;
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107 | }
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108 |
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109 | __STATIC_INLINE uint32_t P0_1_read(void){
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110 | return(PORT0->IN & 0x00000002UL);
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111 | }
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112 |
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113 | __STATIC_INLINE void P0_1_enable_pps(void){
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114 | PORT0->PPS |= 0x00000002UL;
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115 | }
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116 |
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117 | __STATIC_INLINE void P0_1_disable_pps(void){
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118 | PORT0->PPS &= ~0x00000002UL;
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119 | }
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120 |
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121 | __STATIC_INLINE void P0_2_set_mode(uint8_t mode){
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122 | PORT0->IOCR0 &= ~0x00f80000UL;
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123 | PORT0->IOCR0 |= mode << 16;
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124 | }
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125 |
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126 | __STATIC_INLINE void P0_2_set_hwsel(uint32_t config){
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127 | PORT0->HWSEL &= ~0x00000030UL;
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128 | PORT0->HWSEL |= config << 4;
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129 | }
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130 |
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131 | __STATIC_INLINE void P0_2_set_standard_hysteresis(){
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132 | PORT0->PHCR0 &= ~0x00000400UL;
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133 | }
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134 |
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135 | __STATIC_INLINE void P0_2_set_large_hysteresis(){
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136 | PORT0->PHCR0 |= 0x00000400UL;
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137 | }
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138 |
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139 | __STATIC_INLINE void P0_2_set(void){
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140 | PORT0->OMR = 0x00000004UL;
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141 | }
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142 |
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143 | __STATIC_INLINE void P0_2_reset(void){
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144 | PORT0->OMR = 0x00040000UL;
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145 | }
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146 |
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147 | __STATIC_INLINE void P0_2_toggle(void){
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148 | PORT0->OMR = 0x00040004UL;
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149 | }
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150 |
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151 | __STATIC_INLINE uint32_t P0_2_read(void){
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152 | return(PORT0->IN & 0x00000004UL);
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153 | }
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154 |
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155 | __STATIC_INLINE void P0_2_enable_pps(void){
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156 | PORT0->PPS |= 0x00000004UL;
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157 | }
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158 |
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159 | __STATIC_INLINE void P0_2_disable_pps(void){
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160 | PORT0->PPS &= ~0x00000004UL;
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161 | }
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162 |
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163 | __STATIC_INLINE void P0_3_set_mode(uint8_t mode){
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164 | PORT0->IOCR0 &= ~0xf8000000UL;
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165 | PORT0->IOCR0 |= mode << 24;
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166 | }
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167 |
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168 | __STATIC_INLINE void P0_3_set_hwsel(uint32_t config){
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169 | PORT0->HWSEL &= ~0x000000c0UL;
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170 | PORT0->HWSEL |= config << 6;
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171 | }
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172 |
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173 | __STATIC_INLINE void P0_3_set_standard_hysteresis(){
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174 | PORT0->PHCR0 &= ~0x00004000UL;
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175 | }
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176 |
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177 | __STATIC_INLINE void P0_3_set_large_hysteresis(){
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178 | PORT0->PHCR0 |= 0x00004000UL;
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179 | }
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180 |
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181 | __STATIC_INLINE void P0_3_set(void){
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182 | PORT0->OMR = 0x00000008UL;
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183 | }
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184 |
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185 | __STATIC_INLINE void P0_3_reset(void){
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186 | PORT0->OMR = 0x00080000UL;
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187 | }
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188 |
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189 | __STATIC_INLINE void P0_3_toggle(void){
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190 | PORT0->OMR = 0x00080008UL;
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191 | }
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192 |
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193 | __STATIC_INLINE uint32_t P0_3_read(void){
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194 | return(PORT0->IN & 0x00000008UL);
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195 | }
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196 |
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197 | __STATIC_INLINE void P0_3_enable_pps(void){
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198 | PORT0->PPS |= 0x00000008UL;
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199 | }
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200 |
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201 | __STATIC_INLINE void P0_3_disable_pps(void){
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202 | PORT0->PPS &= ~0x00000008UL;
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203 | }
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204 |
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205 | __STATIC_INLINE void P0_4_set_mode(uint8_t mode){
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206 | PORT0->IOCR4 &= ~0x000000f8UL;
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207 | PORT0->IOCR4 |= mode << 0;
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208 | }
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209 |
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210 | __STATIC_INLINE void P0_4_set_hwsel(uint32_t config){
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211 | PORT0->HWSEL &= ~0x00000300UL;
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212 | PORT0->HWSEL |= config << 8;
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213 | }
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214 |
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215 | __STATIC_INLINE void P0_4_set_standard_hysteresis(){
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216 | PORT0->PHCR0 &= ~0x00040000UL;
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217 | }
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218 |
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219 | __STATIC_INLINE void P0_4_set_large_hysteresis(){
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220 | PORT0->PHCR0 |= 0x00040000UL;
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221 | }
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222 |
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223 | __STATIC_INLINE void P0_4_set(void){
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224 | PORT0->OMR = 0x00000010UL;
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225 | }
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226 |
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227 | __STATIC_INLINE void P0_4_reset(void){
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228 | PORT0->OMR = 0x00100000UL;
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229 | }
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230 |
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231 | __STATIC_INLINE void P0_4_toggle(void){
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232 | PORT0->OMR = 0x00100010UL;
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233 | }
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234 |
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235 | __STATIC_INLINE uint32_t P0_4_read(void){
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236 | return(PORT0->IN & 0x00000010UL);
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237 | }
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238 |
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239 | __STATIC_INLINE void P0_4_enable_pps(void){
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240 | PORT0->PPS |= 0x00000010UL;
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241 | }
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242 |
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243 | __STATIC_INLINE void P0_4_disable_pps(void){
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244 | PORT0->PPS &= ~0x00000010UL;
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245 | }
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246 |
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247 | __STATIC_INLINE void P0_5_set_mode(uint8_t mode){
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248 | PORT0->IOCR4 &= ~0x0000f800UL;
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249 | PORT0->IOCR4 |= mode << 8;
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250 | }
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251 |
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252 | __STATIC_INLINE void P0_5_set_hwsel(uint32_t config){
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253 | PORT0->HWSEL &= ~0x00000c00UL;
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254 | PORT0->HWSEL |= config << 10;
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255 | }
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256 |
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257 | __STATIC_INLINE void P0_5_set_standard_hysteresis(){
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258 | PORT0->PHCR0 &= ~0x00400000UL;
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259 | }
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260 |
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261 | __STATIC_INLINE void P0_5_set_large_hysteresis(){
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262 | PORT0->PHCR0 |= 0x00400000UL;
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263 | }
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264 |
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265 | __STATIC_INLINE void P0_5_set(void){
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266 | PORT0->OMR = 0x00000020UL;
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267 | }
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268 |
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269 | __STATIC_INLINE void P0_5_reset(void){
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270 | PORT0->OMR = 0x00200000UL;
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271 | }
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272 |
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273 | __STATIC_INLINE void P0_5_toggle(void){
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274 | PORT0->OMR = 0x00200020UL;
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275 | }
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276 |
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277 | __STATIC_INLINE uint32_t P0_5_read(void){
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278 | return(PORT0->IN & 0x00000020UL);
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279 | }
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280 |
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281 | __STATIC_INLINE void P0_5_enable_pps(void){
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282 | PORT0->PPS |= 0x00000020UL;
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283 | }
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284 |
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285 | __STATIC_INLINE void P0_5_disable_pps(void){
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286 | PORT0->PPS &= ~0x00000020UL;
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287 | }
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288 |
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289 | __STATIC_INLINE void P0_6_set_mode(uint8_t mode){
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290 | PORT0->IOCR4 &= ~0x00f80000UL;
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291 | PORT0->IOCR4 |= mode << 16;
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292 | }
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293 |
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294 | __STATIC_INLINE void P0_6_set_hwsel(uint32_t config){
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295 | PORT0->HWSEL &= ~0x00003000UL;
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296 | PORT0->HWSEL |= config << 12;
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297 | }
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298 |
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299 | __STATIC_INLINE void P0_6_set_standard_hysteresis(){
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300 | PORT0->PHCR0 &= ~0x04000000UL;
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301 | }
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302 |
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303 | __STATIC_INLINE void P0_6_set_large_hysteresis(){
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304 | PORT0->PHCR0 |= 0x04000000UL;
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305 | }
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306 |
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307 | __STATIC_INLINE void P0_6_set(void){
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308 | PORT0->OMR = 0x00000040UL;
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309 | }
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310 |
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311 | __STATIC_INLINE void P0_6_reset(void){
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312 | PORT0->OMR = 0x00400000UL;
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313 | }
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314 |
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315 | __STATIC_INLINE void P0_6_toggle(void){
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316 | PORT0->OMR = 0x00400040UL;
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317 | }
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318 |
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319 | __STATIC_INLINE uint32_t P0_6_read(void){
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320 | return(PORT0->IN & 0x00000040UL);
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321 | }
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322 |
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323 | __STATIC_INLINE void P0_6_enable_pps(void){
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324 | PORT0->PPS |= 0x00000040UL;
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325 | }
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326 |
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327 | __STATIC_INLINE void P0_6_disable_pps(void){
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328 | PORT0->PPS &= ~0x00000040UL;
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329 | }
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330 |
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331 | __STATIC_INLINE void P0_7_set_mode(uint8_t mode){
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332 | PORT0->IOCR4 &= ~0xf8000000UL;
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333 | PORT0->IOCR4 |= mode << 24;
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334 | }
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335 |
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336 | __STATIC_INLINE void P0_7_set_hwsel(uint32_t config){
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337 | PORT0->HWSEL &= ~0x0000c000UL;
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338 | PORT0->HWSEL |= config << 14;
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339 | }
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340 |
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341 | __STATIC_INLINE void P0_7_set_standard_hysteresis(){
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342 | PORT0->PHCR0 &= ~0x40000000UL;
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343 | }
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344 |
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345 | __STATIC_INLINE void P0_7_set_large_hysteresis(){
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346 | PORT0->PHCR0 |= 0x40000000UL;
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347 | }
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348 |
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349 | __STATIC_INLINE void P0_7_set(void){
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350 | PORT0->OMR = 0x00000080UL;
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351 | }
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352 |
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353 | __STATIC_INLINE void P0_7_reset(void){
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354 | PORT0->OMR = 0x00800000UL;
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355 | }
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356 |
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357 | __STATIC_INLINE void P0_7_toggle(void){
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358 | PORT0->OMR = 0x00800080UL;
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359 | }
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360 |
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361 | __STATIC_INLINE uint32_t P0_7_read(void){
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362 | return(PORT0->IN & 0x00000080UL);
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363 | }
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364 |
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365 | __STATIC_INLINE void P0_7_enable_pps(void){
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366 | PORT0->PPS |= 0x00000080UL;
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367 | }
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368 |
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369 | __STATIC_INLINE void P0_7_disable_pps(void){
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370 | PORT0->PPS &= ~0x00000080UL;
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371 | }
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372 |
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373 | __STATIC_INLINE void P0_8_set_mode(uint8_t mode){
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374 | PORT0->IOCR8 &= ~0x000000f8UL;
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375 | PORT0->IOCR8 |= mode << 0;
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376 | }
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377 |
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378 | __STATIC_INLINE void P0_8_set_hwsel(uint32_t config){
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379 | PORT0->HWSEL &= ~0x00030000UL;
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380 | PORT0->HWSEL |= config << 16;
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381 | }
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382 |
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383 | __STATIC_INLINE void P0_8_set_standard_hysteresis(){
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384 | PORT0->PHCR1 &= ~0x00000004UL;
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385 | }
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386 |
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387 | __STATIC_INLINE void P0_8_set_large_hysteresis(){
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388 | PORT0->PHCR1 |= 0x00000004UL;
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389 | }
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390 |
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391 | __STATIC_INLINE void P0_8_set(void){
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392 | PORT0->OMR = 0x00000100UL;
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393 | }
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394 |
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395 | __STATIC_INLINE void P0_8_reset(void){
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396 | PORT0->OMR = 0x01000000UL;
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397 | }
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398 |
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399 | __STATIC_INLINE void P0_8_toggle(void){
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400 | PORT0->OMR = 0x01000100UL;
|
401 | }
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402 |
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403 | __STATIC_INLINE uint32_t P0_8_read(void){
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404 | return(PORT0->IN & 0x00000100UL);
|
405 | }
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406 |
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407 | __STATIC_INLINE void P0_8_enable_pps(void){
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408 | PORT0->PPS |= 0x00000100UL;
|
409 | }
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410 |
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411 | __STATIC_INLINE void P0_8_disable_pps(void){
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412 | PORT0->PPS &= ~0x00000100UL;
|
413 | }
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414 |
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415 | __STATIC_INLINE void P0_9_set_mode(uint8_t mode){
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416 | PORT0->IOCR8 &= ~0x0000f800UL;
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417 | PORT0->IOCR8 |= mode << 8;
|
418 | }
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419 |
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420 | __STATIC_INLINE void P0_9_set_hwsel(uint32_t config){
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421 | PORT0->HWSEL &= ~0x000c0000UL;
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422 | PORT0->HWSEL |= config << 18;
|
423 | }
|
424 |
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425 | __STATIC_INLINE void P0_9_set_standard_hysteresis(){
|
426 | PORT0->PHCR1 &= ~0x00000040UL;
|
427 | }
|
428 |
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429 | __STATIC_INLINE void P0_9_set_large_hysteresis(){
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430 | PORT0->PHCR1 |= 0x00000040UL;
|
431 | }
|
432 |
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433 | __STATIC_INLINE void P0_9_set(void){
|
434 | PORT0->OMR = 0x00000200UL;
|
435 | }
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436 |
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437 | __STATIC_INLINE void P0_9_reset(void){
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438 | PORT0->OMR = 0x02000000UL;
|
439 | }
|
440 |
|
441 | __STATIC_INLINE void P0_9_toggle(void){
|
442 | PORT0->OMR = 0x02000200UL;
|
443 | }
|
444 |
|
445 | __STATIC_INLINE uint32_t P0_9_read(void){
|
446 | return(PORT0->IN & 0x00000200UL);
|
447 | }
|
448 |
|
449 | __STATIC_INLINE void P0_9_enable_pps(void){
|
450 | PORT0->PPS |= 0x00000200UL;
|
451 | }
|
452 |
|
453 | __STATIC_INLINE void P0_9_disable_pps(void){
|
454 | PORT0->PPS &= ~0x00000200UL;
|
455 | }
|
456 |
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457 | __STATIC_INLINE void P0_10_set_mode(uint8_t mode){
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458 | PORT0->IOCR8 &= ~0x00f80000UL;
|
459 | PORT0->IOCR8 |= mode << 16;
|
460 | }
|
461 |
|
462 | __STATIC_INLINE void P0_10_set_hwsel(uint32_t config){
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463 | PORT0->HWSEL &= ~0x00300000UL;
|
464 | PORT0->HWSEL |= config << 20;
|
465 | }
|
466 |
|
467 | __STATIC_INLINE void P0_10_set_standard_hysteresis(){
|
468 | PORT0->PHCR1 &= ~0x00000400UL;
|
469 | }
|
470 |
|
471 | __STATIC_INLINE void P0_10_set_large_hysteresis(){
|
472 | PORT0->PHCR1 |= 0x00000400UL;
|
473 | }
|
474 |
|
475 | __STATIC_INLINE void P0_10_set(void){
|
476 | PORT0->OMR = 0x00000400UL;
|
477 | }
|
478 |
|
479 | __STATIC_INLINE void P0_10_reset(void){
|
480 | PORT0->OMR = 0x04000000UL;
|
481 | }
|
482 |
|
483 | __STATIC_INLINE void P0_10_toggle(void){
|
484 | PORT0->OMR = 0x04000400UL;
|
485 | }
|
486 |
|
487 | __STATIC_INLINE uint32_t P0_10_read(void){
|
488 | return(PORT0->IN & 0x00000400UL);
|
489 | }
|
490 |
|
491 | __STATIC_INLINE void P0_10_enable_pps(void){
|
492 | PORT0->PPS |= 0x00000400UL;
|
493 | }
|
494 |
|
495 | __STATIC_INLINE void P0_10_disable_pps(void){
|
496 | PORT0->PPS &= ~0x00000400UL;
|
497 | }
|
498 |
|
499 | __STATIC_INLINE void P0_11_set_mode(uint8_t mode){
|
500 | PORT0->IOCR8 &= ~0xf8000000UL;
|
501 | PORT0->IOCR8 |= mode << 24;
|
502 | }
|
503 |
|
504 | __STATIC_INLINE void P0_11_set_hwsel(uint32_t config){
|
505 | PORT0->HWSEL &= ~0x00c00000UL;
|
506 | PORT0->HWSEL |= config << 22;
|
507 | }
|
508 |
|
509 | __STATIC_INLINE void P0_11_set_standard_hysteresis(){
|
510 | PORT0->PHCR1 &= ~0x00004000UL;
|
511 | }
|
512 |
|
513 | __STATIC_INLINE void P0_11_set_large_hysteresis(){
|
514 | PORT0->PHCR1 |= 0x00004000UL;
|
515 | }
|
516 |
|
517 | __STATIC_INLINE void P0_11_set(void){
|
518 | PORT0->OMR = 0x00000800UL;
|
519 | }
|
520 |
|
521 | __STATIC_INLINE void P0_11_reset(void){
|
522 | PORT0->OMR = 0x08000000UL;
|
523 | }
|
524 |
|
525 | __STATIC_INLINE void P0_11_toggle(void){
|
526 | PORT0->OMR = 0x08000800UL;
|
527 | }
|
528 |
|
529 | __STATIC_INLINE uint32_t P0_11_read(void){
|
530 | return(PORT0->IN & 0x00000800UL);
|
531 | }
|
532 |
|
533 | __STATIC_INLINE void P0_11_enable_pps(void){
|
534 | PORT0->PPS |= 0x00000800UL;
|
535 | }
|
536 |
|
537 | __STATIC_INLINE void P0_11_disable_pps(void){
|
538 | PORT0->PPS &= ~0x00000800UL;
|
539 | }
|
540 |
|
541 | __STATIC_INLINE void P0_12_set_mode(uint8_t mode){
|
542 | PORT0->IOCR12 &= ~0x000000f8UL;
|
543 | PORT0->IOCR12 |= mode << 0;
|
544 | }
|
545 |
|
546 | __STATIC_INLINE void P0_12_set_hwsel(uint32_t config){
|
547 | PORT0->HWSEL &= ~0x03000000UL;
|
548 | PORT0->HWSEL |= config << 24;
|
549 | }
|
550 |
|
551 | __STATIC_INLINE void P0_12_set_standard_hysteresis(){
|
552 | PORT0->PHCR1 &= ~0x00040000UL;
|
553 | }
|
554 |
|
555 | __STATIC_INLINE void P0_12_set_large_hysteresis(){
|
556 | PORT0->PHCR1 |= 0x00040000UL;
|
557 | }
|
558 |
|
559 | __STATIC_INLINE void P0_12_set(void){
|
560 | PORT0->OMR = 0x00001000UL;
|
561 | }
|
562 |
|
563 | __STATIC_INLINE void P0_12_reset(void){
|
564 | PORT0->OMR = 0x10000000UL;
|
565 | }
|
566 |
|
567 | __STATIC_INLINE void P0_12_toggle(void){
|
568 | PORT0->OMR = 0x10001000UL;
|
569 | }
|
570 |
|
571 | __STATIC_INLINE uint32_t P0_12_read(void){
|
572 | return(PORT0->IN & 0x00001000UL);
|
573 | }
|
574 |
|
575 | __STATIC_INLINE void P0_12_enable_pps(void){
|
576 | PORT0->PPS |= 0x00001000UL;
|
577 | }
|
578 |
|
579 | __STATIC_INLINE void P0_12_disable_pps(void){
|
580 | PORT0->PPS &= ~0x00001000UL;
|
581 | }
|
582 |
|
583 | __STATIC_INLINE void P0_13_set_mode(uint8_t mode){
|
584 | PORT0->IOCR12 &= ~0x0000f800UL;
|
585 | PORT0->IOCR12 |= mode << 8;
|
586 | }
|
587 |
|
588 | __STATIC_INLINE void P0_13_set_hwsel(uint32_t config){
|
589 | PORT0->HWSEL &= ~0x0c000000UL;
|
590 | PORT0->HWSEL |= config << 26;
|
591 | }
|
592 |
|
593 | __STATIC_INLINE void P0_13_set_standard_hysteresis(){
|
594 | PORT0->PHCR1 &= ~0x00400000UL;
|
595 | }
|
596 |
|
597 | __STATIC_INLINE void P0_13_set_large_hysteresis(){
|
598 | PORT0->PHCR1 |= 0x00400000UL;
|
599 | }
|
600 |
|
601 | __STATIC_INLINE void P0_13_set(void){
|
602 | PORT0->OMR = 0x00002000UL;
|
603 | }
|
604 |
|
605 | __STATIC_INLINE void P0_13_reset(void){
|
606 | PORT0->OMR = 0x20000000UL;
|
607 | }
|
608 |
|
609 | __STATIC_INLINE void P0_13_toggle(void){
|
610 | PORT0->OMR = 0x20002000UL;
|
611 | }
|
612 |
|
613 | __STATIC_INLINE uint32_t P0_13_read(void){
|
614 | return(PORT0->IN & 0x00002000UL);
|
615 | }
|
616 |
|
617 | __STATIC_INLINE void P0_13_enable_pps(void){
|
618 | PORT0->PPS |= 0x00002000UL;
|
619 | }
|
620 |
|
621 | __STATIC_INLINE void P0_13_disable_pps(void){
|
622 | PORT0->PPS &= ~0x00002000UL;
|
623 | }
|
624 |
|
625 | __STATIC_INLINE void P0_14_set_mode(uint8_t mode){
|
626 | PORT0->IOCR12 &= ~0x00f80000UL;
|
627 | PORT0->IOCR12 |= mode << 16;
|
628 | }
|
629 |
|
630 | __STATIC_INLINE void P0_14_set_hwsel(uint32_t config){
|
631 | PORT0->HWSEL &= ~0x30000000UL;
|
632 | PORT0->HWSEL |= config << 28;
|
633 | }
|
634 |
|
635 | __STATIC_INLINE void P0_14_set_standard_hysteresis(){
|
636 | PORT0->PHCR1 &= ~0x04000000UL;
|
637 | }
|
638 |
|
639 | __STATIC_INLINE void P0_14_set_large_hysteresis(){
|
640 | PORT0->PHCR1 |= 0x04000000UL;
|
641 | }
|
642 |
|
643 | __STATIC_INLINE void P0_14_set(void){
|
644 | PORT0->OMR = 0x00004000UL;
|
645 | }
|
646 |
|
647 | __STATIC_INLINE void P0_14_reset(void){
|
648 | PORT0->OMR = 0x40000000UL;
|
649 | }
|
650 |
|
651 | __STATIC_INLINE void P0_14_toggle(void){
|
652 | PORT0->OMR = 0x40004000UL;
|
653 | }
|
654 |
|
655 | __STATIC_INLINE uint32_t P0_14_read(void){
|
656 | return(PORT0->IN & 0x00004000UL);
|
657 | }
|
658 |
|
659 | __STATIC_INLINE void P0_14_enable_pps(void){
|
660 | PORT0->PPS |= 0x00004000UL;
|
661 | }
|
662 |
|
663 | __STATIC_INLINE void P0_14_disable_pps(void){
|
664 | PORT0->PPS &= ~0x00004000UL;
|
665 | }
|
666 |
|
667 | __STATIC_INLINE void P0_15_set_mode(uint8_t mode){
|
668 | PORT0->IOCR12 &= ~0xf8000000UL;
|
669 | PORT0->IOCR12 |= mode << 24;
|
670 | }
|
671 |
|
672 | __STATIC_INLINE void P0_15_set_hwsel(uint32_t config){
|
673 | PORT0->HWSEL &= ~0xc0000000UL;
|
674 | PORT0->HWSEL |= config << 30;
|
675 | }
|
676 |
|
677 | __STATIC_INLINE void P0_15_set_standard_hysteresis(){
|
678 | PORT0->PHCR1 &= ~0x40000000UL;
|
679 | }
|
680 |
|
681 | __STATIC_INLINE void P0_15_set_large_hysteresis(){
|
682 | PORT0->PHCR1 |= 0x40000000UL;
|
683 | }
|
684 |
|
685 | __STATIC_INLINE void P0_15_set(void){
|
686 | PORT0->OMR = 0x00008000UL;
|
687 | }
|
688 |
|
689 | __STATIC_INLINE void P0_15_reset(void){
|
690 | PORT0->OMR = 0x80000000UL;
|
691 | }
|
692 |
|
693 | __STATIC_INLINE void P0_15_toggle(void){
|
694 | PORT0->OMR = 0x80008000UL;
|
695 | }
|
696 |
|
697 | __STATIC_INLINE uint32_t P0_15_read(void){
|
698 | return(PORT0->IN & 0x00008000UL);
|
699 | }
|
700 |
|
701 | __STATIC_INLINE void P0_15_enable_pps(void){
|
702 | PORT0->PPS |= 0x00008000UL;
|
703 | }
|
704 |
|
705 | __STATIC_INLINE void P0_15_disable_pps(void){
|
706 | PORT0->PPS &= ~0x00008000UL;
|
707 | }
|
708 |
|
709 | __STATIC_INLINE void P1_0_set_mode(uint8_t mode){
|
710 | PORT1->IOCR0 &= ~0x000000f8UL;
|
711 | PORT1->IOCR0 |= mode << 0;
|
712 | }
|
713 |
|
714 | __STATIC_INLINE void P1_0_set_hwsel(uint32_t config){
|
715 | PORT1->HWSEL &= ~0x00000003UL;
|
716 | PORT1->HWSEL |= config << 0;
|
717 | }
|
718 |
|
719 | __STATIC_INLINE void P1_0_set_standard_hysteresis(){
|
720 | PORT1->PHCR0 &= ~0x00000004UL;
|
721 | }
|
722 |
|
723 | __STATIC_INLINE void P1_0_set_large_hysteresis(){
|
724 | PORT1->PHCR0 |= 0x00000004UL;
|
725 | }
|
726 |
|
727 | __STATIC_INLINE void P1_0_set(void){
|
728 | PORT1->OMR = 0x00000001UL;
|
729 | }
|
730 |
|
731 | __STATIC_INLINE void P1_0_reset(void){
|
732 | PORT1->OMR = 0x00010000UL;
|
733 | }
|
734 |
|
735 | __STATIC_INLINE void P1_0_toggle(void){
|
736 | PORT1->OMR = 0x00010001UL;
|
737 | }
|
738 |
|
739 | __STATIC_INLINE uint32_t P1_0_read(void){
|
740 | return(PORT1->IN & 0x00000001UL);
|
741 | }
|
742 |
|
743 | __STATIC_INLINE void P1_0_enable_pps(void){
|
744 | PORT1->PPS |= 0x00000001UL;
|
745 | }
|
746 |
|
747 | __STATIC_INLINE void P1_0_disable_pps(void){
|
748 | PORT1->PPS &= ~0x00000001UL;
|
749 | }
|
750 |
|
751 | __STATIC_INLINE void P1_1_set_mode(uint8_t mode){
|
752 | PORT1->IOCR0 &= ~0x0000f800UL;
|
753 | PORT1->IOCR0 |= mode << 8;
|
754 | }
|
755 |
|
756 | __STATIC_INLINE void P1_1_set_hwsel(uint32_t config){
|
757 | PORT1->HWSEL &= ~0x0000000cUL;
|
758 | PORT1->HWSEL |= config << 2;
|
759 | }
|
760 |
|
761 | __STATIC_INLINE void P1_1_set_standard_hysteresis(){
|
762 | PORT1->PHCR0 &= ~0x00000040UL;
|
763 | }
|
764 |
|
765 | __STATIC_INLINE void P1_1_set_large_hysteresis(){
|
766 | PORT1->PHCR0 |= 0x00000040UL;
|
767 | }
|
768 |
|
769 | __STATIC_INLINE void P1_1_set(void){
|
770 | PORT1->OMR = 0x00000002UL;
|
771 | }
|
772 |
|
773 | __STATIC_INLINE void P1_1_reset(void){
|
774 | PORT1->OMR = 0x00020000UL;
|
775 | }
|
776 |
|
777 | __STATIC_INLINE void P1_1_toggle(void){
|
778 | PORT1->OMR = 0x00020002UL;
|
779 | }
|
780 |
|
781 | __STATIC_INLINE uint32_t P1_1_read(void){
|
782 | return(PORT1->IN & 0x00000002UL);
|
783 | }
|
784 |
|
785 | __STATIC_INLINE void P1_1_enable_pps(void){
|
786 | PORT1->PPS |= 0x00000002UL;
|
787 | }
|
788 |
|
789 | __STATIC_INLINE void P1_1_disable_pps(void){
|
790 | PORT1->PPS &= ~0x00000002UL;
|
791 | }
|
792 |
|
793 | __STATIC_INLINE void P1_2_set_mode(uint8_t mode){
|
794 | PORT1->IOCR0 &= ~0x00f80000UL;
|
795 | PORT1->IOCR0 |= mode << 16;
|
796 | }
|
797 |
|
798 | __STATIC_INLINE void P1_2_set_hwsel(uint32_t config){
|
799 | PORT1->HWSEL &= ~0x00000030UL;
|
800 | PORT1->HWSEL |= config << 4;
|
801 | }
|
802 |
|
803 | __STATIC_INLINE void P1_2_set_standard_hysteresis(){
|
804 | PORT1->PHCR0 &= ~0x00000400UL;
|
805 | }
|
806 |
|
807 | __STATIC_INLINE void P1_2_set_large_hysteresis(){
|
808 | PORT1->PHCR0 |= 0x00000400UL;
|
809 | }
|
810 |
|
811 | __STATIC_INLINE void P1_2_set(void){
|
812 | PORT1->OMR = 0x00000004UL;
|
813 | }
|
814 |
|
815 | __STATIC_INLINE void P1_2_reset(void){
|
816 | PORT1->OMR = 0x00040000UL;
|
817 | }
|
818 |
|
819 | __STATIC_INLINE void P1_2_toggle(void){
|
820 | PORT1->OMR = 0x00040004UL;
|
821 | }
|
822 |
|
823 | __STATIC_INLINE uint32_t P1_2_read(void){
|
824 | return(PORT1->IN & 0x00000004UL);
|
825 | }
|
826 |
|
827 | __STATIC_INLINE void P1_2_enable_pps(void){
|
828 | PORT1->PPS |= 0x00000004UL;
|
829 | }
|
830 |
|
831 | __STATIC_INLINE void P1_2_disable_pps(void){
|
832 | PORT1->PPS &= ~0x00000004UL;
|
833 | }
|
834 |
|
835 | __STATIC_INLINE void P1_3_set_mode(uint8_t mode){
|
836 | PORT1->IOCR0 &= ~0xf8000000UL;
|
837 | PORT1->IOCR0 |= mode << 24;
|
838 | }
|
839 |
|
840 | __STATIC_INLINE void P1_3_set_hwsel(uint32_t config){
|
841 | PORT1->HWSEL &= ~0x000000c0UL;
|
842 | PORT1->HWSEL |= config << 6;
|
843 | }
|
844 |
|
845 | __STATIC_INLINE void P1_3_set_standard_hysteresis(){
|
846 | PORT1->PHCR0 &= ~0x00004000UL;
|
847 | }
|
848 |
|
849 | __STATIC_INLINE void P1_3_set_large_hysteresis(){
|
850 | PORT1->PHCR0 |= 0x00004000UL;
|
851 | }
|
852 |
|
853 | __STATIC_INLINE void P1_3_set(void){
|
854 | PORT1->OMR = 0x00000008UL;
|
855 | }
|
856 |
|
857 | __STATIC_INLINE void P1_3_reset(void){
|
858 | PORT1->OMR = 0x00080000UL;
|
859 | }
|
860 |
|
861 | __STATIC_INLINE void P1_3_toggle(void){
|
862 | PORT1->OMR = 0x00080008UL;
|
863 | }
|
864 |
|
865 | __STATIC_INLINE uint32_t P1_3_read(void){
|
866 | return(PORT1->IN & 0x00000008UL);
|
867 | }
|
868 |
|
869 | __STATIC_INLINE void P1_3_enable_pps(void){
|
870 | PORT1->PPS |= 0x00000008UL;
|
871 | }
|
872 |
|
873 | __STATIC_INLINE void P1_3_disable_pps(void){
|
874 | PORT1->PPS &= ~0x00000008UL;
|
875 | }
|
876 |
|
877 | __STATIC_INLINE void P1_4_set_mode(uint8_t mode){
|
878 | PORT1->IOCR4 &= ~0x000000f8UL;
|
879 | PORT1->IOCR4 |= mode << 0;
|
880 | }
|
881 |
|
882 | __STATIC_INLINE void P1_4_set_hwsel(uint32_t config){
|
883 | PORT1->HWSEL &= ~0x00000300UL;
|
884 | PORT1->HWSEL |= config << 8;
|
885 | }
|
886 |
|
887 | __STATIC_INLINE void P1_4_set_standard_hysteresis(){
|
888 | PORT1->PHCR0 &= ~0x00040000UL;
|
889 | }
|
890 |
|
891 | __STATIC_INLINE void P1_4_set_large_hysteresis(){
|
892 | PORT1->PHCR0 |= 0x00040000UL;
|
893 | }
|
894 |
|
895 | __STATIC_INLINE void P1_4_set(void){
|
896 | PORT1->OMR = 0x00000010UL;
|
897 | }
|
898 |
|
899 | __STATIC_INLINE void P1_4_reset(void){
|
900 | PORT1->OMR = 0x00100000UL;
|
901 | }
|
902 |
|
903 | __STATIC_INLINE void P1_4_toggle(void){
|
904 | PORT1->OMR = 0x00100010UL;
|
905 | }
|
906 |
|
907 | __STATIC_INLINE uint32_t P1_4_read(void){
|
908 | return(PORT1->IN & 0x00000010UL);
|
909 | }
|
910 |
|
911 | __STATIC_INLINE void P1_4_enable_pps(void){
|
912 | PORT1->PPS |= 0x00000010UL;
|
913 | }
|
914 |
|
915 | __STATIC_INLINE void P1_4_disable_pps(void){
|
916 | PORT1->PPS &= ~0x00000010UL;
|
917 | }
|
918 |
|
919 | __STATIC_INLINE void P1_5_set_mode(uint8_t mode){
|
920 | PORT1->IOCR4 &= ~0x0000f800UL;
|
921 | PORT1->IOCR4 |= mode << 8;
|
922 | }
|
923 |
|
924 | __STATIC_INLINE void P1_5_set_hwsel(uint32_t config){
|
925 | PORT1->HWSEL &= ~0x00000c00UL;
|
926 | PORT1->HWSEL |= config << 10;
|
927 | }
|
928 |
|
929 | __STATIC_INLINE void P1_5_set_standard_hysteresis(){
|
930 | PORT1->PHCR0 &= ~0x00400000UL;
|
931 | }
|
932 |
|
933 | __STATIC_INLINE void P1_5_set_large_hysteresis(){
|
934 | PORT1->PHCR0 |= 0x00400000UL;
|
935 | }
|
936 |
|
937 | __STATIC_INLINE void P1_5_set(void){
|
938 | PORT1->OMR = 0x00000020UL;
|
939 | }
|
940 |
|
941 | __STATIC_INLINE void P1_5_reset(void){
|
942 | PORT1->OMR = 0x00200000UL;
|
943 | }
|
944 |
|
945 | __STATIC_INLINE void P1_5_toggle(void){
|
946 | PORT1->OMR = 0x00200020UL;
|
947 | }
|
948 |
|
949 | __STATIC_INLINE uint32_t P1_5_read(void){
|
950 | return(PORT1->IN & 0x00000020UL);
|
951 | }
|
952 |
|
953 | __STATIC_INLINE void P1_5_enable_pps(void){
|
954 | PORT1->PPS |= 0x00000020UL;
|
955 | }
|
956 |
|
957 | __STATIC_INLINE void P1_5_disable_pps(void){
|
958 | PORT1->PPS &= ~0x00000020UL;
|
959 | }
|
960 |
|
961 | __STATIC_INLINE void P2_0_set_mode(uint8_t mode){
|
962 | PORT2->IOCR0 &= ~0x000000f8UL;
|
963 | PORT2->IOCR0 |= mode << 0;
|
964 | }
|
965 |
|
966 | __STATIC_INLINE void P2_0_set_hwsel(uint32_t config){
|
967 | PORT2->HWSEL &= ~0x00000003UL;
|
968 | PORT2->HWSEL |= config << 0;
|
969 | }
|
970 |
|
971 | __STATIC_INLINE void P2_0_set_standard_hysteresis(){
|
972 | PORT2->PHCR0 &= ~0x00000004UL;
|
973 | }
|
974 |
|
975 | __STATIC_INLINE void P2_0_set_large_hysteresis(){
|
976 | PORT2->PHCR0 |= 0x00000004UL;
|
977 | }
|
978 |
|
979 | __STATIC_INLINE void P2_0_enable_digital(void){
|
980 | PORT2->PDISC &= ~0x00000001UL;
|
981 | }
|
982 |
|
983 | __STATIC_INLINE void P2_0_disable_digital(void){
|
984 | PORT2->PDISC |= 0x00000001UL;
|
985 | }
|
986 |
|
987 | __STATIC_INLINE void P2_0_set(void){
|
988 | PORT2->OMR = 0x00000001UL;
|
989 | }
|
990 |
|
991 | __STATIC_INLINE void P2_0_reset(void){
|
992 | PORT2->OMR = 0x00010000UL;
|
993 | }
|
994 |
|
995 | __STATIC_INLINE void P2_0_toggle(void){
|
996 | PORT2->OMR = 0x00010001UL;
|
997 | }
|
998 |
|
999 | __STATIC_INLINE uint32_t P2_0_read(void){
|
1000 | return(PORT2->IN & 0x00000001UL);
|
1001 | }
|
1002 |
|
1003 | __STATIC_INLINE void P2_0_enable_pps(void){
|
1004 | PORT2->PPS |= 0x00000001UL;
|
1005 | }
|
1006 |
|
1007 | __STATIC_INLINE void P2_0_disable_pps(void){
|
1008 | PORT2->PPS &= ~0x00000001UL;
|
1009 | }
|
1010 |
|
1011 | __STATIC_INLINE void P2_1_set_mode(uint8_t mode){
|
1012 | PORT2->IOCR0 &= ~0x0000f800UL;
|
1013 | PORT2->IOCR0 |= mode << 8;
|
1014 | }
|
1015 |
|
1016 | __STATIC_INLINE void P2_1_set_hwsel(uint32_t config){
|
1017 | PORT2->HWSEL &= ~0x0000000cUL;
|
1018 | PORT2->HWSEL |= config << 2;
|
1019 | }
|
1020 |
|
1021 | __STATIC_INLINE void P2_1_set_standard_hysteresis(){
|
1022 | PORT2->PHCR0 &= ~0x00000040UL;
|
1023 | }
|
1024 |
|
1025 | __STATIC_INLINE void P2_1_set_large_hysteresis(){
|
1026 | PORT2->PHCR0 |= 0x00000040UL;
|
1027 | }
|
1028 |
|
1029 | __STATIC_INLINE void P2_1_enable_digital(void){
|
1030 | PORT2->PDISC &= ~0x00000002UL;
|
1031 | }
|
1032 |
|
1033 | __STATIC_INLINE void P2_1_disable_digital(void){
|
1034 | PORT2->PDISC |= 0x00000002UL;
|
1035 | }
|
1036 |
|
1037 | __STATIC_INLINE void P2_1_set(void){
|
1038 | PORT2->OMR = 0x00000002UL;
|
1039 | }
|
1040 |
|
1041 | __STATIC_INLINE void P2_1_reset(void){
|
1042 | PORT2->OMR = 0x00020000UL;
|
1043 | }
|
1044 |
|
1045 | __STATIC_INLINE void P2_1_toggle(void){
|
1046 | PORT2->OMR = 0x00020002UL;
|
1047 | }
|
1048 |
|
1049 | __STATIC_INLINE uint32_t P2_1_read(void){
|
1050 | return(PORT2->IN & 0x00000002UL);
|
1051 | }
|
1052 |
|
1053 | __STATIC_INLINE void P2_1_enable_pps(void){
|
1054 | PORT2->PPS |= 0x00000002UL;
|
1055 | }
|
1056 |
|
1057 | __STATIC_INLINE void P2_1_disable_pps(void){
|
1058 | PORT2->PPS &= ~0x00000002UL;
|
1059 | }
|
1060 |
|
1061 | __STATIC_INLINE void P2_2_set_mode(uint8_t mode){
|
1062 | PORT2->IOCR0 &= ~0x00f80000UL;
|
1063 | PORT2->IOCR0 |= mode << 16;
|
1064 | }
|
1065 |
|
1066 | __STATIC_INLINE void P2_2_set_hwsel(uint32_t config){
|
1067 | PORT2->HWSEL &= ~0x00000030UL;
|
1068 | PORT2->HWSEL |= config << 4;
|
1069 | }
|
1070 |
|
1071 | __STATIC_INLINE void P2_2_set_standard_hysteresis(){
|
1072 | PORT2->PHCR0 &= ~0x00000400UL;
|
1073 | }
|
1074 |
|
1075 | __STATIC_INLINE void P2_2_set_large_hysteresis(){
|
1076 | PORT2->PHCR0 |= 0x00000400UL;
|
1077 | }
|
1078 |
|
1079 | __STATIC_INLINE void P2_2_enable_digital(void){
|
1080 | PORT2->PDISC &= ~0x00000004UL;
|
1081 | }
|
1082 |
|
1083 | __STATIC_INLINE void P2_2_disable_digital(void){
|
1084 | PORT2->PDISC |= 0x00000004UL;
|
1085 | }
|
1086 |
|
1087 | __STATIC_INLINE void P2_2_set(void){
|
1088 | PORT2->OMR = 0x00000004UL;
|
1089 | }
|
1090 |
|
1091 | __STATIC_INLINE void P2_2_reset(void){
|
1092 | PORT2->OMR = 0x00040000UL;
|
1093 | }
|
1094 |
|
1095 | __STATIC_INLINE void P2_2_toggle(void){
|
1096 | PORT2->OMR = 0x00040004UL;
|
1097 | }
|
1098 |
|
1099 | __STATIC_INLINE uint32_t P2_2_read(void){
|
1100 | return(PORT2->IN & 0x00000004UL);
|
1101 | }
|
1102 |
|
1103 | __STATIC_INLINE void P2_2_enable_pps(void){
|
1104 | PORT2->PPS |= 0x00000004UL;
|
1105 | }
|
1106 |
|
1107 | __STATIC_INLINE void P2_2_disable_pps(void){
|
1108 | PORT2->PPS &= ~0x00000004UL;
|
1109 | }
|
1110 |
|
1111 | __STATIC_INLINE void P2_3_set_mode(uint8_t mode){
|
1112 | PORT2->IOCR0 &= ~0xf8000000UL;
|
1113 | PORT2->IOCR0 |= mode << 24;
|
1114 | }
|
1115 |
|
1116 | __STATIC_INLINE void P2_3_set_hwsel(uint32_t config){
|
1117 | PORT2->HWSEL &= ~0x000000c0UL;
|
1118 | PORT2->HWSEL |= config << 6;
|
1119 | }
|
1120 |
|
1121 | __STATIC_INLINE void P2_3_set_standard_hysteresis(){
|
1122 | PORT2->PHCR0 &= ~0x00004000UL;
|
1123 | }
|
1124 |
|
1125 | __STATIC_INLINE void P2_3_set_large_hysteresis(){
|
1126 | PORT2->PHCR0 |= 0x00004000UL;
|
1127 | }
|
1128 |
|
1129 | __STATIC_INLINE void P2_3_enable_digital(void){
|
1130 | PORT2->PDISC &= ~0x00000008UL;
|
1131 | }
|
1132 |
|
1133 | __STATIC_INLINE void P2_3_disable_digital(void){
|
1134 | PORT2->PDISC |= 0x00000008UL;
|
1135 | }
|
1136 |
|
1137 | __STATIC_INLINE void P2_3_set(void){
|
1138 | PORT2->OMR = 0x00000008UL;
|
1139 | }
|
1140 |
|
1141 | __STATIC_INLINE void P2_3_reset(void){
|
1142 | PORT2->OMR = 0x00080000UL;
|
1143 | }
|
1144 |
|
1145 | __STATIC_INLINE void P2_3_toggle(void){
|
1146 | PORT2->OMR = 0x00080008UL;
|
1147 | }
|
1148 |
|
1149 | __STATIC_INLINE uint32_t P2_3_read(void){
|
1150 | return(PORT2->IN & 0x00000008UL);
|
1151 | }
|
1152 |
|
1153 | __STATIC_INLINE void P2_3_enable_pps(void){
|
1154 | PORT2->PPS |= 0x00000008UL;
|
1155 | }
|
1156 |
|
1157 | __STATIC_INLINE void P2_3_disable_pps(void){
|
1158 | PORT2->PPS &= ~0x00000008UL;
|
1159 | }
|
1160 |
|
1161 | __STATIC_INLINE void P2_4_set_mode(uint8_t mode){
|
1162 | PORT2->IOCR4 &= ~0x000000f8UL;
|
1163 | PORT2->IOCR4 |= mode << 0;
|
1164 | }
|
1165 |
|
1166 | __STATIC_INLINE void P2_4_set_hwsel(uint32_t config){
|
1167 | PORT2->HWSEL &= ~0x00000300UL;
|
1168 | PORT2->HWSEL |= config << 8;
|
1169 | }
|
1170 |
|
1171 | __STATIC_INLINE void P2_4_set_standard_hysteresis(){
|
1172 | PORT2->PHCR0 &= ~0x00040000UL;
|
1173 | }
|
1174 |
|
1175 | __STATIC_INLINE void P2_4_set_large_hysteresis(){
|
1176 | PORT2->PHCR0 |= 0x00040000UL;
|
1177 | }
|
1178 |
|
1179 | __STATIC_INLINE void P2_4_enable_digital(void){
|
1180 | PORT2->PDISC &= ~0x00000010UL;
|
1181 | }
|
1182 |
|
1183 | __STATIC_INLINE void P2_4_disable_digital(void){
|
1184 | PORT2->PDISC |= 0x00000010UL;
|
1185 | }
|
1186 |
|
1187 | __STATIC_INLINE void P2_4_set(void){
|
1188 | PORT2->OMR = 0x00000010UL;
|
1189 | }
|
1190 |
|
1191 | __STATIC_INLINE void P2_4_reset(void){
|
1192 | PORT2->OMR = 0x00100000UL;
|
1193 | }
|
1194 |
|
1195 | __STATIC_INLINE void P2_4_toggle(void){
|
1196 | PORT2->OMR = 0x00100010UL;
|
1197 | }
|
1198 |
|
1199 | __STATIC_INLINE uint32_t P2_4_read(void){
|
1200 | return(PORT2->IN & 0x00000010UL);
|
1201 | }
|
1202 |
|
1203 | __STATIC_INLINE void P2_4_enable_pps(void){
|
1204 | PORT2->PPS |= 0x00000010UL;
|
1205 | }
|
1206 |
|
1207 | __STATIC_INLINE void P2_4_disable_pps(void){
|
1208 | PORT2->PPS &= ~0x00000010UL;
|
1209 | }
|
1210 |
|
1211 | __STATIC_INLINE void P2_5_set_mode(uint8_t mode){
|
1212 | PORT2->IOCR4 &= ~0x0000f800UL;
|
1213 | PORT2->IOCR4 |= mode << 8;
|
1214 | }
|
1215 |
|
1216 | __STATIC_INLINE void P2_5_set_hwsel(uint32_t config){
|
1217 | PORT2->HWSEL &= ~0x00000c00UL;
|
1218 | PORT2->HWSEL |= config << 10;
|
1219 | }
|
1220 |
|
1221 | __STATIC_INLINE void P2_5_set_standard_hysteresis(){
|
1222 | PORT2->PHCR0 &= ~0x00400000UL;
|
1223 | }
|
1224 |
|
1225 | __STATIC_INLINE void P2_5_set_large_hysteresis(){
|
1226 | PORT2->PHCR0 |= 0x00400000UL;
|
1227 | }
|
1228 |
|
1229 | __STATIC_INLINE void P2_5_enable_digital(void){
|
1230 | PORT2->PDISC &= ~0x00000020UL;
|
1231 | }
|
1232 |
|
1233 | __STATIC_INLINE void P2_5_disable_digital(void){
|
1234 | PORT2->PDISC |= 0x00000020UL;
|
1235 | }
|
1236 |
|
1237 | __STATIC_INLINE void P2_5_set(void){
|
1238 | PORT2->OMR = 0x00000020UL;
|
1239 | }
|
1240 |
|
1241 | __STATIC_INLINE void P2_5_reset(void){
|
1242 | PORT2->OMR = 0x00200000UL;
|
1243 | }
|
1244 |
|
1245 | __STATIC_INLINE void P2_5_toggle(void){
|
1246 | PORT2->OMR = 0x00200020UL;
|
1247 | }
|
1248 |
|
1249 | __STATIC_INLINE uint32_t P2_5_read(void){
|
1250 | return(PORT2->IN & 0x00000020UL);
|
1251 | }
|
1252 |
|
1253 | __STATIC_INLINE void P2_5_enable_pps(void){
|
1254 | PORT2->PPS |= 0x00000020UL;
|
1255 | }
|
1256 |
|
1257 | __STATIC_INLINE void P2_5_disable_pps(void){
|
1258 | PORT2->PPS &= ~0x00000020UL;
|
1259 | }
|
1260 |
|
1261 | __STATIC_INLINE void P2_6_set_mode(uint8_t mode){
|
1262 | PORT2->IOCR4 &= ~0x00f80000UL;
|
1263 | PORT2->IOCR4 |= mode << 16;
|
1264 | }
|
1265 |
|
1266 | __STATIC_INLINE void P2_6_set_hwsel(uint32_t config){
|
1267 | PORT2->HWSEL &= ~0x00003000UL;
|
1268 | PORT2->HWSEL |= config << 12;
|
1269 | }
|
1270 |
|
1271 | __STATIC_INLINE void P2_6_set_standard_hysteresis(){
|
1272 | PORT2->PHCR0 &= ~0x04000000UL;
|
1273 | }
|
1274 |
|
1275 | __STATIC_INLINE void P2_6_set_large_hysteresis(){
|
1276 | PORT2->PHCR0 |= 0x04000000UL;
|
1277 | }
|
1278 |
|
1279 | __STATIC_INLINE void P2_6_enable_digital(void){
|
1280 | PORT2->PDISC &= ~0x00000040UL;
|
1281 | }
|
1282 |
|
1283 | __STATIC_INLINE void P2_6_disable_digital(void){
|
1284 | PORT2->PDISC |= 0x00000040UL;
|
1285 | }
|
1286 |
|
1287 | __STATIC_INLINE void P2_6_set(void){
|
1288 | PORT2->OMR = 0x00000040UL;
|
1289 | }
|
1290 |
|
1291 | __STATIC_INLINE void P2_6_reset(void){
|
1292 | PORT2->OMR = 0x00400000UL;
|
1293 | }
|
1294 |
|
1295 | __STATIC_INLINE void P2_6_toggle(void){
|
1296 | PORT2->OMR = 0x00400040UL;
|
1297 | }
|
1298 |
|
1299 | __STATIC_INLINE uint32_t P2_6_read(void){
|
1300 | return(PORT2->IN & 0x00000040UL);
|
1301 | }
|
1302 |
|
1303 | __STATIC_INLINE void P2_6_enable_pps(void){
|
1304 | PORT2->PPS |= 0x00000040UL;
|
1305 | }
|
1306 |
|
1307 | __STATIC_INLINE void P2_6_disable_pps(void){
|
1308 | PORT2->PPS &= ~0x00000040UL;
|
1309 | }
|
1310 |
|
1311 | __STATIC_INLINE void P2_7_set_mode(uint8_t mode){
|
1312 | PORT2->IOCR4 &= ~0xf8000000UL;
|
1313 | PORT2->IOCR4 |= mode << 24;
|
1314 | }
|
1315 |
|
1316 | __STATIC_INLINE void P2_7_set_hwsel(uint32_t config){
|
1317 | PORT2->HWSEL &= ~0x0000c000UL;
|
1318 | PORT2->HWSEL |= config << 14;
|
1319 | }
|
1320 |
|
1321 | __STATIC_INLINE void P2_7_set_standard_hysteresis(){
|
1322 | PORT2->PHCR0 &= ~0x40000000UL;
|
1323 | }
|
1324 |
|
1325 | __STATIC_INLINE void P2_7_set_large_hysteresis(){
|
1326 | PORT2->PHCR0 |= 0x40000000UL;
|
1327 | }
|
1328 |
|
1329 | __STATIC_INLINE void P2_7_enable_digital(void){
|
1330 | PORT2->PDISC &= ~0x00000080UL;
|
1331 | }
|
1332 |
|
1333 | __STATIC_INLINE void P2_7_disable_digital(void){
|
1334 | PORT2->PDISC |= 0x00000080UL;
|
1335 | }
|
1336 |
|
1337 | __STATIC_INLINE void P2_7_set(void){
|
1338 | PORT2->OMR = 0x00000080UL;
|
1339 | }
|
1340 |
|
1341 | __STATIC_INLINE void P2_7_reset(void){
|
1342 | PORT2->OMR = 0x00800000UL;
|
1343 | }
|
1344 |
|
1345 | __STATIC_INLINE void P2_7_toggle(void){
|
1346 | PORT2->OMR = 0x00800080UL;
|
1347 | }
|
1348 |
|
1349 | __STATIC_INLINE uint32_t P2_7_read(void){
|
1350 | return(PORT2->IN & 0x00000080UL);
|
1351 | }
|
1352 |
|
1353 | __STATIC_INLINE void P2_7_enable_pps(void){
|
1354 | PORT2->PPS |= 0x00000080UL;
|
1355 | }
|
1356 |
|
1357 | __STATIC_INLINE void P2_7_disable_pps(void){
|
1358 | PORT2->PPS &= ~0x00000080UL;
|
1359 | }
|
1360 |
|
1361 | __STATIC_INLINE void P2_8_set_mode(uint8_t mode){
|
1362 | PORT2->IOCR8 &= ~0x000000f8UL;
|
1363 | PORT2->IOCR8 |= mode << 0;
|
1364 | }
|
1365 |
|
1366 | __STATIC_INLINE void P2_8_set_hwsel(uint32_t config){
|
1367 | PORT2->HWSEL &= ~0x00030000UL;
|
1368 | PORT2->HWSEL |= config << 16;
|
1369 | }
|
1370 |
|
1371 | __STATIC_INLINE void P2_8_set_standard_hysteresis(){
|
1372 | PORT2->PHCR1 &= ~0x00000004UL;
|
1373 | }
|
1374 |
|
1375 | __STATIC_INLINE void P2_8_set_large_hysteresis(){
|
1376 | PORT2->PHCR1 |= 0x00000004UL;
|
1377 | }
|
1378 |
|
1379 | __STATIC_INLINE void P2_8_enable_digital(void){
|
1380 | PORT2->PDISC &= ~0x00000100UL;
|
1381 | }
|
1382 |
|
1383 | __STATIC_INLINE void P2_8_disable_digital(void){
|
1384 | PORT2->PDISC |= 0x00000100UL;
|
1385 | }
|
1386 |
|
1387 | __STATIC_INLINE void P2_8_set(void){
|
1388 | PORT2->OMR = 0x00000100UL;
|
1389 | }
|
1390 |
|
1391 | __STATIC_INLINE void P2_8_reset(void){
|
1392 | PORT2->OMR = 0x01000000UL;
|
1393 | }
|
1394 |
|
1395 | __STATIC_INLINE void P2_8_toggle(void){
|
1396 | PORT2->OMR = 0x01000100UL;
|
1397 | }
|
1398 |
|
1399 | __STATIC_INLINE uint32_t P2_8_read(void){
|
1400 | return(PORT2->IN & 0x00000100UL);
|
1401 | }
|
1402 |
|
1403 | __STATIC_INLINE void P2_8_enable_pps(void){
|
1404 | PORT2->PPS |= 0x00000100UL;
|
1405 | }
|
1406 |
|
1407 | __STATIC_INLINE void P2_8_disable_pps(void){
|
1408 | PORT2->PPS &= ~0x00000100UL;
|
1409 | }
|
1410 |
|
1411 | __STATIC_INLINE void P2_9_set_mode(uint8_t mode){
|
1412 | PORT2->IOCR8 &= ~0x0000f800UL;
|
1413 | PORT2->IOCR8 |= mode << 8;
|
1414 | }
|
1415 |
|
1416 | __STATIC_INLINE void P2_9_set_hwsel(uint32_t config){
|
1417 | PORT2->HWSEL &= ~0x000c0000UL;
|
1418 | PORT2->HWSEL |= config << 18;
|
1419 | }
|
1420 |
|
1421 | __STATIC_INLINE void P2_9_set_standard_hysteresis(){
|
1422 | PORT2->PHCR1 &= ~0x00000040UL;
|
1423 | }
|
1424 |
|
1425 | __STATIC_INLINE void P2_9_set_large_hysteresis(){
|
1426 | PORT2->PHCR1 |= 0x00000040UL;
|
1427 | }
|
1428 |
|
1429 | __STATIC_INLINE void P2_9_enable_digital(void){
|
1430 | PORT2->PDISC &= ~0x00000200UL;
|
1431 | }
|
1432 |
|
1433 | __STATIC_INLINE void P2_9_disable_digital(void){
|
1434 | PORT2->PDISC |= 0x00000200UL;
|
1435 | }
|
1436 |
|
1437 | __STATIC_INLINE void P2_9_set(void){
|
1438 | PORT2->OMR = 0x00000200UL;
|
1439 | }
|
1440 |
|
1441 | __STATIC_INLINE void P2_9_reset(void){
|
1442 | PORT2->OMR = 0x02000000UL;
|
1443 | }
|
1444 |
|
1445 | __STATIC_INLINE void P2_9_toggle(void){
|
1446 | PORT2->OMR = 0x02000200UL;
|
1447 | }
|
1448 |
|
1449 | __STATIC_INLINE uint32_t P2_9_read(void){
|
1450 | return(PORT2->IN & 0x00000200UL);
|
1451 | }
|
1452 |
|
1453 | __STATIC_INLINE void P2_9_enable_pps(void){
|
1454 | PORT2->PPS |= 0x00000200UL;
|
1455 | }
|
1456 |
|
1457 | __STATIC_INLINE void P2_9_disable_pps(void){
|
1458 | PORT2->PPS &= ~0x00000200UL;
|
1459 | }
|
1460 |
|
1461 | __STATIC_INLINE void P2_10_set_mode(uint8_t mode){
|
1462 | PORT2->IOCR8 &= ~0x00f80000UL;
|
1463 | PORT2->IOCR8 |= mode << 16;
|
1464 | }
|
1465 |
|
1466 | __STATIC_INLINE void P2_10_set_hwsel(uint32_t config){
|
1467 | PORT2->HWSEL &= ~0x00300000UL;
|
1468 | PORT2->HWSEL |= config << 20;
|
1469 | }
|
1470 |
|
1471 | __STATIC_INLINE void P2_10_set_standard_hysteresis(){
|
1472 | PORT2->PHCR1 &= ~0x00000400UL;
|
1473 | }
|
1474 |
|
1475 | __STATIC_INLINE void P2_10_set_large_hysteresis(){
|
1476 | PORT2->PHCR1 |= 0x00000400UL;
|
1477 | }
|
1478 |
|
1479 | __STATIC_INLINE void P2_10_enable_digital(void){
|
1480 | PORT2->PDISC &= ~0x00000400UL;
|
1481 | }
|
1482 |
|
1483 | __STATIC_INLINE void P2_10_disable_digital(void){
|
1484 | PORT2->PDISC |= 0x00000400UL;
|
1485 | }
|
1486 |
|
1487 | __STATIC_INLINE void P2_10_set(void){
|
1488 | PORT2->OMR = 0x00000400UL;
|
1489 | }
|
1490 |
|
1491 | __STATIC_INLINE void P2_10_reset(void){
|
1492 | PORT2->OMR = 0x04000000UL;
|
1493 | }
|
1494 |
|
1495 | __STATIC_INLINE void P2_10_toggle(void){
|
1496 | PORT2->OMR = 0x04000400UL;
|
1497 | }
|
1498 |
|
1499 | __STATIC_INLINE uint32_t P2_10_read(void){
|
1500 | return(PORT2->IN & 0x00000400UL);
|
1501 | }
|
1502 |
|
1503 | __STATIC_INLINE void P2_10_enable_pps(void){
|
1504 | PORT2->PPS |= 0x00000400UL;
|
1505 | }
|
1506 |
|
1507 | __STATIC_INLINE void P2_10_disable_pps(void){
|
1508 | PORT2->PPS &= ~0x00000400UL;
|
1509 | }
|
1510 |
|
1511 | __STATIC_INLINE void P2_11_set_mode(uint8_t mode){
|
1512 | PORT2->IOCR8 &= ~0xf8000000UL;
|
1513 | PORT2->IOCR8 |= mode << 24;
|
1514 | }
|
1515 |
|
1516 | __STATIC_INLINE void P2_11_set_hwsel(uint32_t config){
|
1517 | PORT2->HWSEL &= ~0x00c00000UL;
|
1518 | PORT2->HWSEL |= config << 22;
|
1519 | }
|
1520 |
|
1521 | __STATIC_INLINE void P2_11_set_standard_hysteresis(){
|
1522 | PORT2->PHCR1 &= ~0x00004000UL;
|
1523 | }
|
1524 |
|
1525 | __STATIC_INLINE void P2_11_set_large_hysteresis(){
|
1526 | PORT2->PHCR1 |= 0x00004000UL;
|
1527 | }
|
1528 |
|
1529 | __STATIC_INLINE void P2_11_enable_digital(void){
|
1530 | PORT2->PDISC &= ~0x00000800UL;
|
1531 | }
|
1532 |
|
1533 | __STATIC_INLINE void P2_11_disable_digital(void){
|
1534 | PORT2->PDISC |= 0x00000800UL;
|
1535 | }
|
1536 |
|
1537 | __STATIC_INLINE void P2_11_set(void){
|
1538 | PORT2->OMR = 0x00000800UL;
|
1539 | }
|
1540 |
|
1541 | __STATIC_INLINE void P2_11_reset(void){
|
1542 | PORT2->OMR = 0x08000000UL;
|
1543 | }
|
1544 |
|
1545 | __STATIC_INLINE void P2_11_toggle(void){
|
1546 | PORT2->OMR = 0x08000800UL;
|
1547 | }
|
1548 |
|
1549 | __STATIC_INLINE uint32_t P2_11_read(void){
|
1550 | return(PORT2->IN & 0x00000800UL);
|
1551 | }
|
1552 |
|
1553 | __STATIC_INLINE void P2_11_enable_pps(void){
|
1554 | PORT2->PPS |= 0x00000800UL;
|
1555 | }
|
1556 |
|
1557 | __STATIC_INLINE void P2_11_disable_pps(void){
|
1558 | PORT2->PPS &= ~0x00000800UL;
|
1559 | }
|
1560 |
|
1561 | #endif
|