main.c

/*

 *  Author: Manuel Koch

 *  Modbus Test Configuration

 *  µC: Atmega 32

 *  Read & Write Holding registers

 */

#include "avr/io.h"

#include "avr/signal.h"

#include "avr/interrupt.h"

#include "stdio.h"

#include "stdint.h"

#include "util/delay.h"

#include <avr/pgmspace.h>

//Defines

#define F_CPU 14745600UL

#define slaveadress 17

#define rxbuffersize 32

#define txbuffersize 32

//CRC16 table for crc calculation

static uint8_t table_crc_hi[] = { 0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80,

    0x41, 0x01, 0xC0, 0x80, 0x41, 0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80,

    0x41, 0x00, 0xC1, 0x81, 0x40, 0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80,

    0x41, 0x01, 0xC0, 0x80, 0x41, 0x00, 0xC1, 0x81, 0x40, 0x00, 0xC1, 0x81,

    0x40, 0x01, 0xC0, 0x80, 0x41, 0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80,

    0x41, 0x01, 0xC0, 0x80, 0x41, 0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80,

    0x41, 0x00, 0xC1, 0x81, 0x40, 0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80,

    0x41, 0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80, 0x41, 0x01, 0xC0, 0x80,

    0x41, 0x00, 0xC1, 0x81, 0x40, 0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80,

    0x41, 0x01, 0xC0, 0x80, 0x41, 0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80,

    0x41, 0x00, 0xC1, 0x81, 0x40, 0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80,

    0x41, 0x01, 0xC0, 0x80, 0x41, 0x00, 0xC1, 0x81, 0x40, 0x00, 0xC1, 0x81,

    0x40, 0x01, 0xC0, 0x80, 0x41, 0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80,

    0x41, 0x01, 0xC0, 0x80, 0x41, 0x00, 0xC1, 0x81, 0x40, 0x00, 0xC1, 0x81,

    0x40, 0x01, 0xC0, 0x80, 0x41, 0x01, 0xC0, 0x80, 0x41, 0x00, 0xC1, 0x81,

    0x40, 0x01, 0xC0, 0x80, 0x41, 0x00, 0xC1, 0x81, 0x40, 0x00, 0xC1, 0x81,

    0x40, 0x01, 0xC0, 0x80, 0x41, 0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80,

    0x41, 0x01, 0xC0, 0x80, 0x41, 0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80,

    0x41, 0x00, 0xC1, 0x81, 0x40, 0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80,

    0x41, 0x01, 0xC0, 0x80, 0x41, 0x00, 0xC1, 0x81, 0x40, 0x00, 0xC1, 0x81,

    0x40, 0x01, 0xC0, 0x80, 0x41, 0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80,

    0x41, 0x01, 0xC0, 0x80, 0x41, 0x00, 0xC1, 0x81, 0x40 };

/* Table of CRC values for low-order byte */

static uint8_t table_crc_lo[] = { 0x00, 0xC0, 0xC1, 0x01, 0xC3, 0x03, 0x02,

    0xC2, 0xC6, 0x06, 0x07, 0xC7, 0x05, 0xC5, 0xC4, 0x04, 0xCC, 0x0C, 0x0D,

    0xCD, 0x0F, 0xCF, 0xCE, 0x0E, 0x0A, 0xCA, 0xCB, 0x0B, 0xC9, 0x09, 0x08,

    0xC8, 0xD8, 0x18, 0x19, 0xD9, 0x1B, 0xDB, 0xDA, 0x1A, 0x1E, 0xDE, 0xDF,

    0x1F, 0xDD, 0x1D, 0x1C, 0xDC, 0x14, 0xD4, 0xD5, 0x15, 0xD7, 0x17, 0x16,

    0xD6, 0xD2, 0x12, 0x13, 0xD3, 0x11, 0xD1, 0xD0, 0x10, 0xF0, 0x30, 0x31,

    0xF1, 0x33, 0xF3, 0xF2, 0x32, 0x36, 0xF6, 0xF7, 0x37, 0xF5, 0x35, 0x34,

    0xF4, 0x3C, 0xFC, 0xFD, 0x3D, 0xFF, 0x3F, 0x3E, 0xFE, 0xFA, 0x3A, 0x3B,

    0xFB, 0x39, 0xF9, 0xF8, 0x38, 0x28, 0xE8, 0xE9, 0x29, 0xEB, 0x2B, 0x2A,

    0xEA, 0xEE, 0x2E, 0x2F, 0xEF, 0x2D, 0xED, 0xEC, 0x2C, 0xE4, 0x24, 0x25,

    0xE5, 0x27, 0xE7, 0xE6, 0x26, 0x22, 0xE2, 0xE3, 0x23, 0xE1, 0x21, 0x20,

    0xE0, 0xA0, 0x60, 0x61, 0xA1, 0x63, 0xA3, 0xA2, 0x62, 0x66, 0xA6, 0xA7,

    0x67, 0xA5, 0x65, 0x64, 0xA4, 0x6C, 0xAC, 0xAD, 0x6D, 0xAF, 0x6F, 0x6E,

    0xAE, 0xAA, 0x6A, 0x6B, 0xAB, 0x69, 0xA9, 0xA8, 0x68, 0x78, 0xB8, 0xB9,

    0x79, 0xBB, 0x7B, 0x7A, 0xBA, 0xBE, 0x7E, 0x7F, 0xBF, 0x7D, 0xBD, 0xBC,

    0x7C, 0xB4, 0x74, 0x75, 0xB5, 0x77, 0xB7, 0xB6, 0x76, 0x72, 0xB2, 0xB3,

    0x73, 0xB1, 0x71, 0x70, 0xB0, 0x50, 0x90, 0x91, 0x51, 0x93, 0x53, 0x52,

    0x92, 0x96, 0x56, 0x57, 0x97, 0x55, 0x95, 0x94, 0x54, 0x9C, 0x5C, 0x5D,

    0x9D, 0x5F, 0x9F, 0x9E, 0x5E, 0x5A, 0x9A, 0x9B, 0x5B, 0x99, 0x59, 0x58,

    0x98, 0x88, 0x48, 0x49, 0x89, 0x4B, 0x8B, 0x8A, 0x4A, 0x4E, 0x8E, 0x8F,

    0x4F, 0x8D, 0x4D, 0x4C, 0x8C, 0x44, 0x84, 0x85, 0x45, 0x87, 0x47, 0x46,

    0x86, 0x82, 0x42, 0x43, 0x83, 0x41, 0x81, 0x80, 0x40 };

// Prototypen

void cleanrxbuffer(void);

void cleantxbuffer(void);

void dataprocessing(void);

void buildframe(void);

// Globale Variablen

//Write Holding Register

//Write Register 40000 - 40003 = holdingregister [0-3]

//Read Register  40100 - 40105 = holdingregister [4-10]

uint16_t holdingregister[10] = {0xFFFF,0xFFFF,0xFFFF,0xFFFF, 0xABFF, 0xFFCD,0xFEFF,0x00FF,0xFF00,0x11FF} ;

volatile uint8_t resetflag = 0;

volatile uint8_t readbytes = 0;

volatile uint8_t dataprocessingstat = 0;

volatile uint8_t txposition = 0;

volatile uint8_t txstartcomplete = 0;

volatile uint8_t txstart[5];

uint8_t rxbuffer[rxbuffersize];

uint8_t txbuffer[txbuffersize];

volatile uint8_t txbuffer_length;

volatile uint8_t rxbuffer_length;

volatile uint8_t rxbyte = 0 ;

volatile uint16_t checksum;

volatile uint8_t crcokay;

volatile uint8_t prestatus = 0;

volatile uint8_t writebytes = 0;

volatile uint8_t data;

//Status UART

typedef enum {

  free, receiving, complete, sending

} receive_status_t;

typedef enum {

  FC03, FC10, Error, Reset, E01, E02, E03, E04

} function_t;

typedef struct {

volatile  receive_status_t status;

volatile  uint16_t tics;

} uart_status_t ;

volatile function_t functioncode = Reset;

volatile static uint16_t crc16(uint8_t *buffer, uint16_t buffer_length) {

  uint8_t crc_hi = 0xFF; // high CRC byte initialized

  uint8_t crc_lo = 0xFF; // low CRC byte initialized

  unsigned int i; // will index into CRC lookup

  //pass through message buffer

  while (buffer_length--) {

    i = crc_hi ^ *buffer++;

    crc_hi = crc_lo ^ table_crc_hi[i];

    crc_lo = table_crc_lo[i];

  }

  return (crc_hi << 8 | crc_lo);

}

volatile static uint8_t checkcrc(uint8_t *argrxbuffer, uint8_t argrxbyte, uint8_t argchecksumrxlow, uint8_t argchecksumrxhigh){

  uint16_t checksumrx;

  uint16_t checksumcalced;

  checksumrx = crc16(argrxbuffer, argrxbyte);

  checksumcalced = (argchecksumrxhigh << 8 | argchecksumrxlow);

  if (checksumrx == checksumcalced){ //

    return 1;

  }

  else{

    return 0;

  }

}

volatile uint8_t *bufferpoint;

uart_status_t uart_status;

int main(void){

// Locale Variablen

// Initalisierung

  sei();

//  UART

  UCSRB |= (1<<RXCIE) | (1 << RXEN) | (1 << TXEN) ;

  UCSRC |= (1<<URSEL)| (1<<UCSZ1) | (1<<UCSZ0);

  UBRRL = 95; //Baudrate 9600

  uart_status.status = free;

//  Timer

  TIMSK |= (1<<OCIE0);

  TCCR0 |= (1<<WGM01) | (1<<CS02) | (1<<CS00);

  OCR0 = 2;

//  GPIO

  DDRD |= (1<<PD2);

  DDRB |= (1<<PB0) | (1<<PB1);

  PORTB |= (1<<PB0);

  PORTD &= ~(1<<PD2);

//  main loop

  while(1){

    // data processing

    if (prestatus != uart_status.status) {

      prestatus = uart_status.status;

      if (uart_status.status == complete){

        dataprocessing();

        functioncode = Reset;

      }

    }

    // frame transmitted

    if(resetflag){

      resetflag = 0;

      txposition = 0;

      cleantxbuffer();

      PORTB &= ~(1<<PB1);

      PORTB &= ~(1<<PB0);

    }

  } //main Loop

  return 0;

}

// frame complete & timeout

ISR (TIMER0_COMP_vect) {

  if (uart_status.status == receiving) {

      uart_status.tics++;

      // frame complete

      if(uart_status.tics != free){

      if (uart_status.tics >= 21) {

        uart_status.status = complete;

        PORTD |= (1<<PD2);

      }

      // time out

      if ((uart_status.tics <= 21) && (uart_status.tics >= 10)) {

        uart_status.status = complete;

        PORTD |= (1<<PD2);

      }

    }

  }

}

// receive frame

ISR(USART_RXC_vect)

{

  data = UDR;

  // watch for time outs

  uart_status.tics = 0;

  if (uart_status.status == free) {

    uart_status.status = receiving;

    rxbyte = 0;

  }

  if (uart_status.status == receiving) {

    rxbuffer[rxbyte] = data;

    rxbyte++;

    if (rxbyte >= rxbuffersize) {

      uart_status.status = complete;

      PORTD |= (1<<PD2);

    }

  }

}

//send frame

ISR(USART_UDRE_vect ){

  if (txposition < txbuffer_length){ //

    UDR = txbuffer[txposition];

    txposition++;

  }

  else{

    UCSRB |= (1<<TXCIE);

    UCSRB &=  ~(1<<UDRIE);

  }

}

//last byte send

ISR(USART_TXC_vect){

  resetflag = 1;

  UCSRB |= (1<<RXCIE) | (1 << RXEN);

  UCSRB &=  ~(1<<TXCIE);

  PORTD &= ~(1<<PD2);

  uart_status.status = free;

  cleanrxbuffer();

}

void dataprocessing(void){

  //check crc

  crcokay = checkcrc(rxbuffer, rxbyte-2,  rxbuffer[rxbyte-1], rxbuffer[rxbyte -2 ]);

  if (crcokay){

    //check slave adress

    if (rxbuffer[0]==slaveadress){ //rxbuffer[0]==slavedadress

      //check functioncode

      if(rxbuffer[1] == 0x03){

        functioncode = FC03;

        }

      else if(rxbuffer[1] == 0x10){

        functioncode =  FC10;

        }

      else{

        functioncode = E02;

        }

      //dataprocessing

      switch (functioncode){

        case FC03:

          readbytes = rxbuffer[5]*2;

          // create frame head

          txbuffer[0] = rxbuffer[0];

          txbuffer[1] = rxbuffer[1];

          txbuffer[2] = readbytes;

          txbuffer_length = 3 + readbytes + 2;

          if(rxbuffer[3]>= 100 && rxbuffer[3]<= 106 ){

          int k = 0;

          // load holding register in txbuffer

          for (int i=3; i<readbytes+3; i += 2 ){

            txbuffer[i] = (holdingregister[rxbuffer[3]-96+k]>>8);

            txbuffer[i+1] = holdingregister[rxbuffer[3]-96+k];

            k++;

          }

          }

          // create crc

          checksum = crc16(txbuffer, txbuffer_length-2);

          txbuffer[3+readbytes+1] = checksum;

          txbuffer[3+readbytes+0] = (checksum>>8);

          PORTB |= (1<<PB1);

          PORTD |= (1<<PD2);

          // set transmit interrupt

          UCSRB |=   (1<<UDRIE) ;

          UCSRB &= ~(1<<RXCIE) | ~(1<<RXEN);

          // send dummy value to start transmit

          UDR = 0x1B;  //Dummy Value

          uart_status.status = sending;

          break;

        case FC10:

          writebytes = rxbuffer[5]*2;

          for(int i = 0; i<=5; i++){

          txbuffer[i] = rxbuffer[i];

          }

          txbuffer_length = 8;

          uint8_t j = 0;

          for(int i = 0; i<writebytes; i++){

            holdingregister[rxbuffer[5+j]] = (rxbuffer[6+i]<<8 | rxbuffer[7+1+i]);

            j++;

          }

          checksum = crc16(txbuffer, txbuffer_length-2);

          txbuffer_length++;

          txbuffer[7] = checksum;

          txbuffer[6] = (checksum>>8);

          PORTB |= (1<<PB1);

          PORTD |= (1<<PD2);

          UCSRB |=   (1<<UDRIE) ;

          UCSRB &= ~(1<<RXCIE) | ~(1<<RXEN);

          UDR = 0x00;  //Dummy Value

          uart_status.status = sending;

          break;

        case Reset:

          uart_status.status = free;

          break;

        case Error:

          uart_status.status = free;

          cleanrxbuffer();

          cleantxbuffer();

          PORTB |= (1<<PB1);

           break;

        default:

          uart_status.status = free;

          cleanrxbuffer();

          cleantxbuffer();

          functioncode = Reset;

          PORTD &= ~(1<<PD2);

          UCSRB &=  ~(1 << TXEN) | ~(1<<UDRIE);

          UCSRB |= (1<<RXCIE) | (1 << RXEN);

          break;

      }

    }

    // slave id not okay

    else{

      cleanrxbuffer();

      cleantxbuffer();

      uart_status.status = free;

      functioncode = Reset;

      PORTD &= ~(1<<PD2);

      UCSRB &=  ~(1 << TXEN) | ~(1<<UDRIE);

      UCSRB |= (1<<RXCIE) | (1 << RXEN);

    }

  }

  // checksum not okay

  else{

    cleanrxbuffer();

    cleantxbuffer();

    uart_status.status = free;

    functioncode = Reset;

    PORTD &= ~(1<<PD2);

    UCSRB &=  ~(1 << TXEN) | ~(1<<UDRIE);

    UCSRB |= (1<<RXCIE) | (1 << RXEN);

  }

}

void cleanrxbuffer(void){

  for (int i = 0; i<=rxbuffersize; i++){

    rxbuffer[i] = 0;

  }

  rxbyte = 0;

}

void cleantxbuffer(void){

  for (int i = 0; i<=txbuffersize; i++){

    txbuffer[i] = 0;

  }

}