main.c


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#include <stdint.h>

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#include "stm32f1xx.h"

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#define HSE_VALUE               8000000U

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#define SYSCLK_FREQ_72MHz      72000000U

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// ---------------- GPIOx_CRx MODE+CNF-Bits kombiniert --------------------                    

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#define  noPin      4     // floating input, reset state

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#define  ANALOG     0     /* analog input */ 

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#define  OUT_10     1     /* out, 10 MHz */ 

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#define  OUT_2      2     /* out,  2 MHz */ 

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#define  OUT_50     3     /* out, 50 MHz */ 

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#define  IN         4     /* digital input */ 

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#define  OUT_10_OD  5     /* out, 10 MHz, open drain */ 

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#define  OUT_2_OD   6     /* out,  2 MHz, open drain */ 

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#define  OUT_50_OD  7     /* out, 50 MHz, open drain */ 

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#define  IN_PUPD    8     /* digital input, pull up/down depending on GPIOx_ODR */ 

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#define  ALTF_10    9     /* alternate function, 10 MHz */ 

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#define  ALTF_2     10    /* alternate function,  2 MHz */ 

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#define  ALTF_50    11    /* alternate function, 50 MHz */ 

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#define  ALTF_10_OD 13    /* alternate function, 10 MHz, open drain */ 

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#define  ALTF_2_OD  14    /* alternate function,  2 MHz, open drain */ 

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#define  ALTF_50_OD 15    /* alternate function, 50 MHz, open drain */ 

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// ---------------- Port A --------------------

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#define wf_PA0      OUT_2_OD      

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#define wf_PA1      OUT_2_OD      

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#define wf_PA2      OUT_2_OD      

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#define wf_PA3      OUT_2_OD      

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#define wf_PA4      OUT_10        

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#define wf_PA5      ALTF_50       

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#define wf_PA6      OUT_10        

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#define wf_PA7      ALTF_50       

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#define wf_PA8      noPin         

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#define wf_PA9      noPin         

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#define wf_PA10     noPin         

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#define wf_PA11     ALTF_50       

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#define wf_PA12     ALTF_50       

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#define wf_PA13     IN            

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#define wf_PA14     IN            

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#define wf_PA15     IN_PUPD       

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// ---------------- Port B --------------------

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#define wf_PB0      noPin         

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#define wf_PB1      noPin         

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#define wf_PB2      IN            

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#define wf_PB3      IN_PUPD       

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#define wf_PB4      OUT_2_OD      

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#define wf_PB5      OUT_2_OD      

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#define wf_PB6      OUT_2_OD      

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#define wf_PB7      OUT_2_OD      

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#define wf_PB8      ALTF_50_OD    

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#define wf_PB9      ALTF_50_OD    

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#define wf_PB10     OUT_2         

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#define wf_PB11     OUT_2         

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#define wf_PB12     OUT_2         

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#define wf_PB13     ALTF_50       

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#define wf_PB14     OUT_2         

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#define wf_PB15     ALTF_50       

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// ---------------- Port C --------------------

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#define wf_PC0      noPin           

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#define wf_PC1      noPin           

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#define wf_PC2      noPin           

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#define wf_PC3      noPin           

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#define wf_PC4      noPin           

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#define wf_PC5      noPin           

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#define wf_PC6      noPin           

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#define wf_PC7      noPin           

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#define wf_PC8      noPin           

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#define wf_PC9      noPin           

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#define wf_PC10     noPin           

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#define wf_PC11     noPin           

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#define wf_PC12     noPin           

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#define wf_PC13     OUT_2           

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#define wf_PC14     IN              

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#define wf_PC15     IN              

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// ---------------- Port D --------------------

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#define wf_PD0      IN              

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#define wf_PD1      IN              

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#define wf_PD2      noPin           

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#define wf_PD3      noPin           

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#define wf_PD4      noPin           

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#define wf_PD5      noPin           

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#define wf_PD6      noPin           

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#define wf_PD7      noPin           

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#define wf_PD8      noPin           

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#define wf_PD9      noPin           

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#define wf_PD10     noPin           

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#define wf_PD11     noPin           

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#define wf_PD12     noPin           

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#define wf_PD13     noPin           

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#define wf_PD14     noPin           

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#define wf_PD15     noPin           

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// -------------------- combine to CRx values

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#define wf_GPIOA_CRL  (wf_PA0 | (wf_PA1<<4) | (wf_PA2<<8)  | (wf_PA3<<12)  | (wf_PA4<<16)  | (wf_PA5<<20)  | (wf_PA6<<24)  | ((unsigned)wf_PA7)<<28)

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#define wf_GPIOA_CRH  (wf_PA8 | (wf_PA9<<4) | (wf_PA10<<8) | (wf_PA11<<12) | (wf_PA12<<16) | (wf_PA13<<20) | (wf_PA14<<24) | ((unsigned)wf_PA15)<<28)

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#define wf_GPIOB_CRL  (wf_PB0 | (wf_PB1<<4) | (wf_PB2<<8)  | (wf_PB3<<12)  | (wf_PB4<<16)  | (wf_PB5<<20)  | (wf_PB6<<24)  | ((unsigned)wf_PB7)<<28)

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#define wf_GPIOB_CRH  (wf_PB8 | (wf_PB9<<4) | (wf_PB10<<8) | (wf_PB11<<12) | (wf_PB12<<16) | (wf_PB13<<20) | (wf_PB14<<24) | ((unsigned)wf_PB15)<<28)

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#define wf_GPIOC_CRL  (wf_PC0 | (wf_PC1<<4) | (wf_PC2<<8)  | (wf_PC3<<12)  | (wf_PC4<<16)  | (wf_PC5<<20)  | (wf_PC6<<24)  | ((unsigned)wf_PC7)<<28)

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#define wf_GPIOC_CRH  (wf_PC8 | (wf_PC9<<4) | (wf_PC10<<8) | (wf_PC11<<12) | (wf_PC12<<16) | (wf_PC13<<20) | (wf_PC14<<24) | ((unsigned)wf_PC15)<<28)

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#define wf_GPIOD_CRL  (wf_PD0 | (wf_PD1<<4) | (wf_PD2<<8)  | (wf_PD3<<12)  | (wf_PD4<<16)  | (wf_PD5<<20)  | (wf_PD6<<24)  | ((unsigned)wf_PD7)<<28)

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#define wf_GPIOD_CRH  (wf_PD8 | (wf_PD9<<4) | (wf_PD10<<8) | (wf_PD11<<12) | (wf_PD12<<16) | (wf_PD13<<20) | (wf_PD14<<24) | ((unsigned)wf_PD15)<<28)

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// -------------------- peripherial clock enable registers

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#define wf_APB1ENR ( RCC_APB1ENR_PWREN | RCC_APB1ENR_BKPEN | RCC_APB1ENR_USBEN )

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#define wf_APB2ENR ( RCC_APB2ENR_AFIOEN | RCC_APB2ENR_IOPAEN | RCC_APB2ENR_IOPBEN | RCC_APB2ENR_IOPCEN | RCC_APB2ENR_IOPDEN | RCC_APB2ENR_SPI1EN )

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// -------------------- AHB clock enabler register

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#define wf_AHBENR   ( RCC_AHBENR_SRAMEN | RCC_AHBENR_FLITFEN )

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// -------------------- alternate function remap register

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#define wf_AFIO_MAPR ( AFIO_MAPR_I2C1_REMAP )

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/* ---------- systick ----------- */

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volatile uint32_t ticks = 0;

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void SysTick_Handler (void)

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{

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  ticks++;

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}

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void systick_init (void)

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{ 

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 ticks = 0;

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 SysTick->LOAD = (SYSCLK_FREQ_72MHz / 1000)-1;

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 SysTick->VAL = 0;

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 SysTick->CTRL  = SysTick_CTRL_CLKSOURCE_Msk |

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                  SysTick_CTRL_TICKINT_Msk   |

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                  SysTick_CTRL_ENABLE_Msk;

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}

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void delay_ms (uint32_t ms)

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{

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  const uint32_t start = ticks;

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  while(ticks - start < ms)

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    __WFI();    

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}

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/* ---------- sysconfig ---------- */

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void sysconfig (void)

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{

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  long L;

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  RCC->CIR      = 0;            

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  RCC->APB1RSTR = 0;            

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  RCC->APB2RSTR = 0;

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  FLASH->ACR    = FLASH_ACR_PRFTBE | FLASH_ACR_LATENCY_2;                         

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  RCC->CFGR     = RCC_CFGR_MCO_HSI;

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  RCC->AHBENR  = wf_AHBENR;     

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  RCC->APB1ENR = wf_APB1ENR;    

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  RCC->APB2ENR = wf_APB2ENR;    

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  GPIOA->BSRR = (1U << 4);        

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  GPIOA->CRL = wf_GPIOA_CRL;

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  GPIOA->CRH = wf_GPIOA_CRH;

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  GPIOB->CRL = wf_GPIOB_CRL;

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  GPIOB->CRH = wf_GPIOB_CRH;

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  GPIOC->CRL = wf_GPIOC_CRL;

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  GPIOC->CRH = wf_GPIOC_CRH;

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  AFIO->MAPR = wf_AFIO_MAPR;

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  RCC->CR    =  (16 << RCC_CR_HSICAL_Pos) | RCC_CR_HSION; 

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  while ( ! (RCC->CR & RCC_CR_HSIRDY) ); 

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  RCC->CR |= RCC_CR_HSEON;      

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  L = 10000;

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  while (--L) {

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    if (RCC->CR & RCC_CR_HSERDY)    

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      break;

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  }        

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  if (L) {                       

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    FLASH->ACR   = FLASH_ACR_PRFTBE | FLASH_ACR_LATENCY_2;                         

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    RCC->CFGR    = RCC_CFGR_MCO_PLLCLK_DIV2 | (0*RCC_CFGR_USBPRE) |      

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                   RCC_CFGR_PLLMULL9 | RCC_CFGR_PLLSRC |

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                   RCC_CFGR_ADCPRE_DIV8 |

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                   RCC_CFGR_PPRE2_DIV2 | RCC_CFGR_PPRE1_DIV2;

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    RCC->CR     |= RCC_CR_PLLON;       

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    while ((RCC->CR & RCC_CR_PLLRDY) == 0); 

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    RCC->CFGR = ( RCC->CFGR & ~RCC_CFGR_SW_Msk ) | RCC_CFGR_SW_PLL;

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    while( (RCC->CFGR & RCC_CFGR_SWS_Msk) != RCC_CFGR_SWS_PLL ); 

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  }

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  if ( (RCC->BDCR & RCC_BDCR_LSERDY) == 0) {

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    PWR->CR |= (1 << 8);

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    RCC->BDCR = RCC_BDCR_BDRST      | RCC_BDCR_RTCEN | RCC_BDCR_LSEON;

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    RCC->BDCR = RCC_BDCR_RTCSEL_LSE | RCC_BDCR_RTCEN | RCC_BDCR_LSEON; 

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  }

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}

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/* ---------- main ---------- */

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int main(void)

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{

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  systick_init();

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  // initialisiere SPI1

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  SPI1->CR2 = 0x00;

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  SPI1->CR1 = SPI_CR1_CPHA

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    | SPI_CR1_CPOL

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    | (0x07 << SPI_CR1_BR_Pos)

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    | SPI_CR1_SSM

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    | SPI_CR1_SPE

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    | SPI_CR1_SSI

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    | SPI_CR1_MSTR;

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  // auf SPI1 senden

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  for(;;) {

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    // Test ob was kommt -> Signal da auf PA6 ist da!

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    GPIOA->BSRR = (1u<<6);

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    delay_ms(1);

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    GPIOA->BRR = (1u<<6);

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    delay_ms(10);

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    while ( ! (SPI1->SR & SPI_SR_TXE) );   // wait until TXE = 1

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    SPI1->DR = 0x33;  

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    while ( ! (SPI1->SR & SPI_SR_TXE) );   // wait until TXE = 1

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    while ( (SPI1->SR & SPI_SR_BSY) );     // wait until BSY = 0

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  }

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}