1 | library ieee;
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2 | use ieee.std_logic_1164.all;
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3 | use ieee.numeric_std.all;
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4 |
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5 | entity sekunden_takt is
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6 | generic (teiler : positive := 50000000);
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7 | -- generic (teiler : positive := 20);
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8 |
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9 | port (
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10 | clock : in std_logic; -- Systemclock Pin
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11 | takt : out std_logic
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12 | );
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13 | end sekunden_takt;
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14 |
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15 | architecture sekunden_takt_rtl of sekunden_takt is
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16 | signal zaehler : integer range 0 to teiler := 0;
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17 | type states is (one, two);
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18 | signal state : states;
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19 | begin
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20 | -- Teilt die Taktfrequenz von 50 MHz durch 50.000.000 = 1 Hz
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21 | process (clock)
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22 | begin
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23 | if rising_edge(clock)
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24 | then
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25 | case state is
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26 | when one => if zaehler < teiler/2
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27 | then
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28 | takt <= '1';
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29 | zaehler <= zaehler + 1;
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30 | else
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31 | state <= two;
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32 | end if;
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33 | when two => if zaehler > 0
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34 | then
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35 | takt <= '0';
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36 | zaehler <= zaehler - 1;
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37 | else
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38 | state <= one;
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39 | end if;
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40 | end case;
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41 | end if;
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42 | end process;
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43 | end sekunden_takt_rtl;
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44 |
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45 | library ieee;
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46 | use ieee.std_logic_1164.all;
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47 | use ieee.numeric_std.all;
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48 |
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49 | entity taktgenerator is
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50 |
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51 | port (
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52 | clock : in std_logic; -- Systemclock Pin
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53 | takt : in std_logic; -- Sekundentakt
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54 | sekunden_ziffer0 : out std_logic_vector(3 downto 0);
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55 | sekunden_ziffer1 : out std_logic_vector(3 downto 0);
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56 | minuten_ziffer0 : out std_logic_vector(3 downto 0);
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57 | minuten_ziffer1 : out std_logic_vector(3 downto 0);
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58 | stunden_ziffer0 : out std_logic_vector(3 downto 0);
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59 | stunden_ziffer1 : out std_logic_vector(3 downto 0)
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60 | );
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61 |
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62 | end taktgenerator;
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63 |
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64 | architecture taktgenerator_rtl of taktgenerator is
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65 | subtype ziffer is unsigned(3 downto 0);
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66 | type doppel_ziffer is array(1 downto 0) of ziffer;
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67 | signal sekunden_neu, minuten_neu, stunden_neu : doppel_ziffer := (others => (others => '0'));
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68 | signal takt_alt : std_logic := '0';
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69 |
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70 | begin
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71 |
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72 | -- Ziffernweises Increment der Sekunden
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73 | process (clock)
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74 | begin
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75 | if rising_edge(clock)
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76 | then
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77 | takt_alt <= takt;
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78 | -- Positive Taktflanke
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79 | if takt_alt = '0' and takt = '1'
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80 | then
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81 | if sekunden_neu(0) < 9
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82 | then
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83 | sekunden_neu(0) <= sekunden_neu(0) + 1;
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84 | else
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85 | sekunden_neu(0) <= (others => '0');
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86 | if sekunden_neu(1) < 5
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87 | then
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88 | sekunden_neu(1) <= sekunden_neu(1) + 1;
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89 | else
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90 | sekunden_neu(1) <= (others => '0');
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91 | if minuten_neu(0) < 9
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92 | then
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93 | minuten_neu(0) <= minuten_neu(0) + 1;
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94 | else
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95 | minuten_neu(0) <= (others => '0');
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96 | if minuten_neu(1) < 5
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97 | then
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98 | minuten_neu(1) <= minuten_neu(1) + 1;
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99 | else
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100 | minuten_neu(1) <= (others => '0');
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101 | if stunden_neu(0) < 3
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102 | then
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103 | stunden_neu(0) <= stunden_neu(0) + 1;
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104 | else
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105 | stunden_neu(0) <= (others => '0');
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106 | if stunden_neu(1) < 2
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107 | then
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108 | stunden_neu(1) <= stunden_neu(1) + 1;
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109 | else
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110 | stunden_neu(1) <= (others => '0');
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111 | end if; -- if stunden_neu(1)
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112 | end if; -- if stunden_neu(0)
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113 | end if; -- if minuten_neu(1)
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114 | end if; -- if minuten_neu(0)
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115 | end if; -- if sekunden_neu(1)
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116 | end if; -- if sekunden_neu(0)
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117 | end if; -- if takt_alt = '0'
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118 | end if; -- if rising_edge
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119 | end process;
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120 |
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121 |
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122 | -- Ziffernweise Ausgabe an die Anzeige
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123 | sekunden_ziffer0 <= std_logic_vector(sekunden_neu(0));
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124 | sekunden_ziffer1 <= std_logic_vector(sekunden_neu(1));
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125 | minuten_ziffer0 <= std_logic_vector(minuten_neu(0));
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126 | minuten_ziffer1 <= std_logic_vector(minuten_neu(1));
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127 | stunden_ziffer0 <= std_logic_vector(stunden_neu(0));
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128 | stunden_ziffer1 <= std_logic_vector(stunden_neu(1));
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129 | end taktgenerator_rtl;
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130 |
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131 |
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132 |
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133 | library ieee;
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134 | use ieee.std_logic_1164.all;
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135 | use ieee.numeric_std.all;
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136 |
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137 | entity anzeige is
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138 | port (
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139 | clock : in std_logic; -- Systemclock Pin
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140 | lcd_data : out std_logic_vector(7 downto 0);
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141 | lcd_enable : out std_logic;
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142 | lcd_rs : out std_logic;
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143 | lcd_rw : out std_logic;
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144 | led : out std_logic_vector(7 downto 0)
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145 | );
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146 |
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147 | end anzeige;
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148 |
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149 | architecture anzeige_rtl of anzeige is
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150 |
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151 | component sekunden_takt is
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152 | port
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153 | (
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154 | clock : in std_logic;
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155 | takt : out std_logic
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156 | );
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157 | end component sekunden_takt;
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158 |
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159 | component taktgenerator is
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160 | port
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161 | (
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162 | clock : in std_logic; -- Systemclock Pin
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163 | sekunden_ziffer0 : out std_logic_vector(3 downto 0);
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164 | sekunden_ziffer1 : out std_logic_vector(3 downto 0);
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165 | minuten_ziffer0 : out std_logic_vector(3 downto 0);
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166 | minuten_ziffer1 : out std_logic_vector(3 downto 0);
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167 | stunden_ziffer0 : out std_logic_vector(3 downto 0);
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168 | stunden_ziffer1 : out std_logic_vector(3 downto 0);
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169 | takt : in std_logic -- Sekundentakt
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170 | );
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171 | end component taktgenerator;
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172 |
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173 | subtype ziffer is std_logic_vector(3 downto 0);
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174 | type ziffern is array(5 downto 0) of ziffer;
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175 | signal lcd_anzeige : ziffern;
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176 |
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177 | type states is (power_on, configure, output);
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178 | signal state : states;
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179 | type power_on_states is (one, two, three, four, five, six, seven);
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180 | signal power_on_state : power_on_states;
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181 | type configuration_states is (ten_a, ten_b, eleven_a, eleven_b, twelf_a, twelf_b, thirteen, fourteen);
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182 | signal configuration_state : configuration_states;
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183 | type output_states is (fifteen_a, fifteen_b, sixteen_a, sixteen_b,
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184 | seventeen_a, seventeen_b, eightteen_a, eightteen_b,
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185 | nineteen_a, nineteen_b, twenty_a, twenty_b, one_a, one_b, one_c, one_d, one_e, one_f, one_g, one_h,
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186 | one_i, one_j, twenty_one_a, twenty_one_b, twenty_two_a, twenty_two_b, twenty_three, twenty_four);
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187 | signal output_state : output_states;
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188 | -- Power-On Delay
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189 | signal delay : integer range 10000000 downto 0 := 750000;
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190 | signal takt : std_logic := '0';
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191 | signal takt_alt : std_logic := '0';
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192 |
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193 | ------------------------------------------------------------------------
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194 | -- Function Declaration
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195 | ------------------------------------------------------------------------
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196 | function conv_ASCII(char:character) return STD_LOGIC_VECTOR is
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197 | -- Returns the ASCII code of the character argument
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198 | variable ASCII:std_logic_vector(7 downto 0);
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199 | begin
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200 | if char=' ' then ASCII:=X"20";
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201 | elsif char='!' then ASCII:=X"21";
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202 | -- elsif char='"' then ASCII:=X"22"; -- forbidden character
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203 | elsif char='#' then ASCII:=X"23";
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204 | elsif char='$' then ASCII:=X"24";
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205 | elsif char='%' then ASCII:=X"25";
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206 | elsif char='&' then ASCII:=X"26";
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207 | elsif char=''' then ASCII:=X"27";
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208 | elsif char='(' then ASCII:=X"28";
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209 | elsif char=')' then ASCII:=X"29";
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210 | elsif char='*' then ASCII:=X"2A";
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211 | elsif char='+' then ASCII:=X"2B";
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212 | elsif char=',' then ASCII:=X"2C";
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213 | elsif char='-' then ASCII:=X"2D";
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214 | elsif char='.' then ASCII:=X"2E";
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215 | elsif char='/' then ASCII:=X"2F";
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216 | elsif char='0' then ASCII:=X"30";
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217 | elsif char='1' then ASCII:=X"31";
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218 | elsif char='2' then ASCII:=X"32";
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219 | elsif char='3' then ASCII:=X"33";
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220 | elsif char='4' then ASCII:=X"34";
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221 | elsif char='5' then ASCII:=X"35";
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222 | elsif char='6' then ASCII:=X"36";
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223 | elsif char='7' then ASCII:=X"37";
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224 | elsif char='8' then ASCII:=X"38";
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225 | elsif char='9' then ASCII:=X"39";
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226 | elsif char=':' then ASCII:=X"3A";
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227 | elsif char=';' then ASCII:=X"3B";
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228 | elsif char='<' then ASCII:=X"3C";
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229 | elsif char='=' then ASCII:=X"3D";
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230 | elsif char='>' then ASCII:=X"3E";
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231 | elsif char='?' then ASCII:=X"3F";
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232 | elsif char='@' then ASCII:=X"40";
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233 | elsif char='A' then ASCII:=X"41";
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234 | elsif char='B' then ASCII:=X"42";
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235 | elsif char='C' then ASCII:=X"43";
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236 | elsif char='D' then ASCII:=X"44";
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237 | elsif char='E' then ASCII:=X"45";
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238 | elsif char='F' then ASCII:=X"46";
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239 | elsif char='G' then ASCII:=X"47";
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240 | elsif char='H' then ASCII:=X"48";
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241 | elsif char='I' then ASCII:=X"49";
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242 | elsif char='J' then ASCII:=X"4A";
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243 | elsif char='K' then ASCII:=X"4B";
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244 | elsif char='L' then ASCII:=X"4C";
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245 | elsif char='M' then ASCII:=X"4D";
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246 | elsif char='N' then ASCII:=X"4E";
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247 | elsif char='O' then ASCII:=X"4F";
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248 | elsif char='P' then ASCII:=X"50";
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249 | elsif char='Q' then ASCII:=X"51";
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250 | elsif char='R' then ASCII:=X"52";
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251 | elsif char='S' then ASCII:=X"53";
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252 | elsif char='T' then ASCII:=X"54";
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253 | elsif char='U' then ASCII:=X"55";
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254 | elsif char='V' then ASCII:=X"56";
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255 | elsif char='W' then ASCII:=X"57";
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256 | elsif char='X' then ASCII:=X"58";
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257 | elsif char='Y' then ASCII:=X"59";
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258 | elsif char='Z' then ASCII:=X"5A";
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259 | elsif char='[' then ASCII:=X"5B";
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260 | elsif char='\' then ASCII:=X"5C";
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261 | elsif char=']' then ASCII:=X"5D";
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262 | elsif char='^' then ASCII:=X"5E";
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263 | elsif char='_' then ASCII:=X"5F";
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264 | elsif char='`' then ASCII:=X"60";
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265 | elsif char='a' then ASCII:=X"61";
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266 | elsif char='b' then ASCII:=X"62";
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267 | elsif char='c' then ASCII:=X"63";
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268 | elsif char='d' then ASCII:=X"64";
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269 | elsif char='e' then ASCII:=X"65";
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270 | elsif char='f' then ASCII:=X"66";
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271 | elsif char='g' then ASCII:=X"67";
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272 | elsif char='h' then ASCII:=X"68";
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273 | elsif char='i' then ASCII:=X"69";
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274 | elsif char='j' then ASCII:=X"6A";
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275 | elsif char='k' then ASCII:=X"6B";
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276 | elsif char='l' then ASCII:=X"6C";
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277 | elsif char='m' then ASCII:=X"6D";
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278 | elsif char='n' then ASCII:=X"6E";
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279 | elsif char='o' then ASCII:=X"6F";
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280 | elsif char='p' then ASCII:=X"70";
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281 | elsif char='q' then ASCII:=X"71";
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282 | elsif char='r' then ASCII:=X"72";
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283 | elsif char='s' then ASCII:=X"73";
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284 | elsif char='t' then ASCII:=X"74";
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285 | elsif char='u' then ASCII:=X"75";
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286 | elsif char='v' then ASCII:=X"76";
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287 | elsif char='w' then ASCII:=X"77";
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288 | elsif char='x' then ASCII:=X"78";
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289 | elsif char='y' then ASCII:=X"79";
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290 | elsif char='z' then ASCII:=X"7A";
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291 | elsif char='{' then ASCII:=X"7B";
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292 | -- elsif char='|' then ASCII:=X"7C";
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293 | -- ASCII := x"00", this character is used as text message end mark
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294 | elsif char='}' then ASCII:=X"7D";
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295 | elsif char='~' then ASCII:=X"7E";
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296 | -- elsif char='<-' then ASCII:=X"7F"; -- non printable character
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297 | else ASCII:=X"00";
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298 | end if;
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299 | return ASCII;
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300 | end;
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301 |
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302 |
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303 | begin
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304 |
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305 | takt_in_sekunden : sekunden_takt
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306 | port map
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307 | (
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308 | clock => clock,
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309 | takt => takt
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310 | );
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311 |
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312 |
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313 |
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314 | taktung : taktgenerator
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315 | port map
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316 | (
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317 | clock => clock, -- clock Entity clock = Systemclock
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318 | takt => takt,
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319 | sekunden_ziffer0 => lcd_anzeige(0),
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320 | sekunden_ziffer1 => lcd_anzeige(1),
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321 | minuten_ziffer0 => lcd_anzeige(2),
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322 | minuten_ziffer1 => lcd_anzeige(3),
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323 | stunden_ziffer0 => lcd_anzeige(4),
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324 | stunden_ziffer1 => lcd_anzeige(5)
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325 | );
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326 |
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327 | -- Zur Kontrolle
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328 | process (clock)
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329 | begin
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330 | if rising_edge(clock)
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331 | then
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332 | -- Nutze die Sekunden zur Ansteuerung der LEDs
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333 | led(3 downto 0) <= lcd_anzeige(0);
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334 | led(7 downto 4) <= lcd_anzeige(1);
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335 | end if;
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336 | end process;
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337 |
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338 |
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339 | process (clock)
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340 | begin
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341 | if rising_edge(clock)
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342 | then
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343 | case state is
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344 | when power_on =>
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345 | case power_on_state is
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346 |
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347 | ----------------------- Power-On Initialisierung 8-Bit-Modus -----------------
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348 | -- Siehe User Guide, Seite 54, Power-On Initialisierung
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349 | ---------------------------------------------------------------------------------
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350 | when one => -- Warte mindestens 15 ms nach dem Einschalten des Boards
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351 | -- 750.000 Taktzyklen bei 50 MHz
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352 | lcd_enable <= '0';
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353 | lcd_rs <= '0';
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354 | lcd_rw <= '0';
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355 |
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356 | if delay > 0
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357 | then
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358 | delay <= delay - 1;
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359 | else
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360 | delay <= 12;
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361 | power_on_state <= two;
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362 | end if;
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363 | when two => lcd_enable <= '1';
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364 | lcd_rs <= '0';
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365 | lcd_data <= "00110000";
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366 | -- Warte mindestens 230 ns = 12 Taktzyklen bei 50 MHz
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367 | if delay > 0
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368 | then
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369 | delay <= delay - 1;
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370 | else
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371 | delay <= 205000;
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372 | power_on_state <= three;
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373 | end if;
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374 | when three => -- Warte midestens 4,1 ms = 205.000 Taktzyklen
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375 | lcd_enable <= '0';
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376 | if delay > 0
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377 | then
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378 | delay <= delay - 1;
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379 | else
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380 | delay <= 12;
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381 | power_on_state <= four;
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382 | end if;
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383 | when four => lcd_enable <= '1';
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384 | lcd_rs <= '0';
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385 | lcd_data <= "00110000";
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386 | -- Warte mindestens 230 ns = 12 Taktzyklen bei 50 MHz
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387 | if delay > 0
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388 | then
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389 | delay <= delay - 1;
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390 | else
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391 | delay <= 5000;
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392 | power_on_state <= five;
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393 | end if;
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394 | when five => -- Warte mindestens 100 us = 5000 Taktzyklen bei 50 MHz
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395 | lcd_enable <= '0';
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396 | if delay > 0
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397 | then
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398 | delay <= delay - 1;
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399 | else
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400 | delay <= 12;
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401 | power_on_state <= six;
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402 | end if;
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403 | when six => lcd_enable <= '1';
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404 | lcd_rs <= '0';
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405 | lcd_data <= "00110000";
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406 | -- Warte mindestens 230 ns = 12 Taktzyklen bei 50 MHz
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407 | if delay > 0
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408 | then
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409 | delay <= delay - 1;
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410 | else
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411 | delay <= 2000;
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412 | power_on_state <= seven;
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413 | end if;
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414 | when seven => lcd_enable <= '0';
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415 | -- Warte mindestens 40 us = 2000 Taktzyklen bei 50 MHz
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416 | if delay > 0
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417 | then
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418 | delay <= delay - 1;
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419 | else
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420 | state <= configure;
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421 | end if;
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422 |
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423 | end case;
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424 |
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425 |
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426 | when configure =>
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427 |
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428 | case configuration_state is
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429 | ----------------------- Display Configuration ------------------
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430 | -- Siehe User Guide, Seite 54, Display Configuration
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431 | ----------------------------------------------------------------
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432 | when ten_a => -- Function Set Command
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433 | lcd_enable <= '1';
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434 | lcd_rs <= '0';
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435 | lcd_rw <= '0';
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436 | lcd_data <= "00101000";
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437 | delay <= 2000;
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438 | configuration_state <= ten_b;
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439 | when ten_b => if delay > 0
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440 | then
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441 | delay <= delay - 1;
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442 | else
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443 | configuration_state <= eleven_a;
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444 | end if;
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445 | when eleven_a => -- Entry Mode Set Command (Increment the address pointer)
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446 | lcd_enable <= '1';
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447 | lcd_rs <= '0';
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448 | lcd_rw <= '0';
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449 | lcd_data <= "00000110";
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450 | delay <= 2000;
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451 | configuration_state <= eleven_b;
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452 | when eleven_b => if delay > 0
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453 | then
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454 | delay <= delay - 1;
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455 | else
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456 | configuration_state <= twelf_a;
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457 | end if;
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458 | when twelf_a => -- Display On (Disable cursor and blinking)
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459 | lcd_enable <= '1';
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460 | lcd_rs <= '0';
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461 | lcd_rw <= '0';
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462 | lcd_data <= "00001100";
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463 | delay <= 2000;
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464 | configuration_state <= twelf_b;
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465 | when twelf_b => if delay > 0
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466 | then
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467 | delay <= delay - 1;
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468 | else
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469 | configuration_state <= thirteen;
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470 | end if;
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471 | when thirteen => -- Clear Display Command
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472 | lcd_enable <= '1';
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473 | lcd_rs <= '0';
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474 | lcd_rw <= '0';
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475 | lcd_data <= "00000001";
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476 | delay <= 82000;
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477 | configuration_state <= fourteen;
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478 | when fourteen => -- Warte mindestens 1,64 ms = 82.000 Taktzyklen bei 50 MHz
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479 | lcd_enable <= '0';
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480 | if delay > 0
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481 | then
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482 | delay <= delay - 1;
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483 | else
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484 | state <= output;
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485 | end if;
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486 | end case;
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487 |
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488 |
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489 | when output =>
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490 |
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491 | case output_state is
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492 |
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493 | -------------------- Writing Data 8-Bit-Modus --------------------------
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494 | -- Siehe User Guide, Seite 54, Writing Data to the Display
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495 | ----------------- Von links nach rechts Schreiben ----------------------
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496 | when fifteen_a => -- Set DD RAM Address = 00
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497 | lcd_enable <= '1';
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498 | lcd_rs <= '0';
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499 | lcd_rw <= '0';
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500 | lcd_data(7) <= '1';
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501 | lcd_data(6 downto 0) <= "0000000";
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502 | delay <= 2000;
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503 | output_state <= fifteen_b;
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504 | when fifteen_b => -- Warte mindestens 40 us = 2.000 Taktzyklen by 50 MHz
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505 | lcd_enable <= '0';
|
506 | if delay > 0
|
507 | then
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508 | delay <= delay - 1;
|
509 | else
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510 | output_state <= one_a;
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511 | end if;
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512 | ----------------- Schreibe "Time" ---------------------------
|
513 | ------------------ T -----------------------
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514 | when one_a => lcd_enable <= '1';
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515 | lcd_rs <= '1';
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516 | lcd_rw <= '0';
|
517 | lcd_data(7 downto 4) <= "0101";
|
518 | lcd_data(3 downto 0) <= "0100";
|
519 | delay <= 2000;
|
520 | output_state <= one_b;
|
521 | when one_b => -- Warte mindestens 40 us = 2.000 Taktzyklen by 50 MHz
|
522 | lcd_enable <= '0';
|
523 | if delay > 0
|
524 | then
|
525 | delay <= delay - 1;
|
526 | else
|
527 | output_state <= one_c;
|
528 | end if;
|
529 | ------------------ I --------------------------------
|
530 | when one_c => lcd_enable <= '1';
|
531 | lcd_rs <= '1';
|
532 | lcd_rw <= '0';
|
533 | lcd_data(7 downto 4) <= "0100";
|
534 | lcd_data(3 downto 0) <= "1001";
|
535 | delay <= 2000;
|
536 | output_state <= one_d;
|
537 | when one_d => -- Warte mindestens 40 us = 2.000 Taktzyklen by 50 MHz
|
538 | lcd_enable <= '0';
|
539 | if delay > 0
|
540 | then
|
541 | delay <= delay - 1;
|
542 | else
|
543 | output_state <= one_e;
|
544 | end if;
|
545 | ----------------- M ----------------------
|
546 | when one_e => lcd_enable <= '1';
|
547 | lcd_rs <= '1';
|
548 | lcd_rw <= '0';
|
549 | lcd_data(7 downto 4) <= "0100";
|
550 | lcd_data(3 downto 0) <= "1101";
|
551 | delay <= 2000;
|
552 | output_state <= one_f;
|
553 | when one_f => -- Warte mindestens 40 us = 2.000 Taktzyklen by 50 MHz
|
554 | lcd_enable <= '0';
|
555 | if delay > 0
|
556 | then
|
557 | delay <= delay - 1;
|
558 | else
|
559 | output_state <= one_g;
|
560 | end if;
|
561 | ----------------- E ----------------------
|
562 | when one_g => lcd_enable <= '1';
|
563 | lcd_rs <= '1';
|
564 | lcd_rw <= '0';
|
565 | lcd_data(7 downto 4) <= "0100";
|
566 | lcd_data(3 downto 0) <= "0101";
|
567 | delay <= 2000;
|
568 | output_state <= one_h;
|
569 | when one_h => -- Warte mindestens 40 us = 2.000 Taktzyklen by 50 MHz
|
570 | lcd_enable <= '0';
|
571 | if delay > 0
|
572 | then
|
573 | delay <= delay - 1;
|
574 | else
|
575 | output_state <= one_i;
|
576 | end if;
|
577 | ---------- Schreibe Leerzeichen -------------------
|
578 | when one_i => lcd_enable <= '1';
|
579 | lcd_rs <= '1';
|
580 | lcd_rw <= '0';
|
581 | lcd_data(7 downto 4) <= "0010";
|
582 | lcd_data(3 downto 0) <= "0000";
|
583 | delay <= 2000;
|
584 | output_state <= one_j;
|
585 | when one_j => -- Warte mindestens 40 us = 2.000 Taktzyklen by 50 MHz
|
586 | lcd_enable <= '0';
|
587 | if delay > 0
|
588 | then
|
589 | delay <= delay - 1;
|
590 | else
|
591 | output_state <= sixteen_a;
|
592 | end if;
|
593 | ----------------- Schreibe Stunden --------------------------
|
594 | ----------------- Schreibe Zehner-Stelle --------------------
|
595 | when sixteen_a => -- Write Data to DD RAM
|
596 | lcd_enable <= '1';
|
597 | lcd_rs <= '1';
|
598 | lcd_rw <= '0';
|
599 | lcd_data(7 downto 4) <= "0011";
|
600 | lcd_data(3 downto 0) <= lcd_anzeige(5);
|
601 | delay <= 2000;
|
602 | output_state <= sixteen_b;
|
603 | when sixteen_b => -- Warte mindestens 40 us = 2.000 Taktzyklen by 50 MHz
|
604 | lcd_enable <= '0';
|
605 | if delay > 0
|
606 | then
|
607 | delay <= delay - 1;
|
608 | else
|
609 | output_state <= seventeen_a;
|
610 | end if;
|
611 | ----------------- Schreibe Einser-Stelle ----------------------------
|
612 | when seventeen_a => -- Write Data to DD RAM
|
613 | lcd_enable <= '1';
|
614 | lcd_rs <= '1';
|
615 | lcd_rw <= '0';
|
616 | lcd_data(7 downto 4) <= "0011";
|
617 | lcd_data(3 downto 0) <= lcd_anzeige(4);
|
618 | delay <= 2000;
|
619 | output_state <= seventeen_b;
|
620 | when seventeen_b => -- Warte mindestens 40 us = 2.000 Taktzyklen by 50 MHz
|
621 | lcd_enable <= '0';
|
622 | if delay > 0
|
623 | then
|
624 | delay <= delay - 1;
|
625 | else
|
626 | output_state <= eightteen_a;
|
627 | end if;
|
628 | ----------------- Schreibe Doppelpunkt ---------------------
|
629 | when eightteen_a => -- Write Data to DD RAM
|
630 | lcd_enable <= '1';
|
631 | lcd_rs <= '1';
|
632 | lcd_rw <= '0';
|
633 | lcd_data(7 downto 4) <= "0011";
|
634 | lcd_data(3 downto 0) <= "1010";
|
635 | delay <= 2000;
|
636 | output_state <= eightteen_b;
|
637 | when eightteen_b => -- Warte mindestens 40 us = 2.000 Taktzyklen by 50 MHz
|
638 | lcd_enable <= '0';
|
639 | if delay > 0
|
640 | then
|
641 | delay <= delay - 1;
|
642 | else
|
643 | output_state <= nineteen_a;
|
644 | end if;
|
645 | ----------------- Schreibe Minuten -------------------------
|
646 | when nineteen_a => -- Write Data to DD RAM
|
647 | lcd_enable <= '1';
|
648 | lcd_rs <= '1';
|
649 | lcd_rw <= '0';
|
650 | lcd_data(7 downto 4) <= "0011";
|
651 | lcd_data(3 downto 0) <= lcd_anzeige(3);
|
652 | delay <= 2000;
|
653 | output_state <= nineteen_b;
|
654 | when nineteen_b => -- Warte mindestens 40 us = 2.000 Taktzyklen by 50 MHz
|
655 | lcd_enable <= '0';
|
656 | if delay > 0
|
657 | then
|
658 | delay <= delay - 1;
|
659 | else
|
660 | output_state <= twenty_a;
|
661 | end if;
|
662 | when twenty_a => -- Write Data to DD RAM
|
663 | lcd_enable <= '1';
|
664 | lcd_rs <= '1';
|
665 | lcd_rw <= '0';
|
666 | lcd_data(7 downto 4) <= "0011";
|
667 | lcd_data(3 downto 0) <= lcd_anzeige(2);
|
668 | delay <= 2000;
|
669 | output_state <= twenty_b;
|
670 | when twenty_b => -- Warte mindestens 40 us = 2.000 Taktzyklen by 50 MHz
|
671 | lcd_enable <= '0';
|
672 | if delay > 0
|
673 | then
|
674 | delay <= delay - 1;
|
675 | else
|
676 | output_state <= twenty_one_a;
|
677 | end if;
|
678 | ----------------- Schreibe Doppelpunkt -------------------
|
679 | when twenty_one_a =>-- Write Data to DD RAM
|
680 | lcd_enable <= '1';
|
681 | lcd_rs <= '1';
|
682 | lcd_rw <= '0';
|
683 | lcd_data(7 downto 4) <= "0011";
|
684 | lcd_data(3 downto 0) <= "1010";
|
685 | delay <= 2000;
|
686 | output_state <= twenty_one_b;
|
687 | when twenty_one_b => -- Warte mindestens 40 us = 2.000 Taktzyklen by 50 MHz
|
688 | lcd_enable <= '0';
|
689 | if delay > 0
|
690 | then
|
691 | delay <= delay - 1;
|
692 | else
|
693 | output_state <= twenty_two_a;
|
694 | end if;
|
695 | ----------------- Schreibe Sekunden ----------------------
|
696 | when twenty_two_a =>-- Write Data to DD RAM
|
697 | lcd_enable <= '1';
|
698 | lcd_rs <= '1';
|
699 | lcd_rw <= '0';
|
700 | lcd_data(7 downto 4) <= "0011";
|
701 | lcd_data(3 downto 0) <= lcd_anzeige(1);
|
702 | delay <= 2000;
|
703 | output_state <= twenty_two_b;
|
704 | when twenty_two_b => -- Warte mindestens 40 us = 2.000 Taktzyklen by 50 MHz
|
705 | lcd_enable <= '0';
|
706 | if delay > 0
|
707 | then
|
708 | delay <= delay - 1;
|
709 | else
|
710 | output_state <= twenty_three;
|
711 | end if;
|
712 | when twenty_three=>-- Write Data to DD RAM
|
713 | lcd_enable <= '1';
|
714 | lcd_rs <= '1';
|
715 | lcd_rw <= '0';
|
716 | lcd_data(7 downto 4) <= "0011";
|
717 | lcd_data(3 downto 0) <= lcd_anzeige(0);
|
718 | delay <= 10000000;
|
719 | output_state <= twenty_four;
|
720 | when twenty_four => lcd_enable <= '0';
|
721 | if delay > 0
|
722 | then
|
723 | delay <= delay - 1;
|
724 | else
|
725 | output_state <= fifteen_a;
|
726 | end if;
|
727 |
|
728 | -- takt_alt <= takt;
|
729 | -- -- Positive Flanke
|
730 | -- if takt_alt = '0' and takt = '1'
|
731 | -- then
|
732 | -- output_state <= fifteen_a;
|
733 | -- end if;
|
734 |
|
735 | end case; -- output_state
|
736 | end case; -- state
|
737 | end if;
|
738 | end process;
|
739 |
|
740 | end anzeige_rtl;
|