1 | #include "stm32f10x_it.h"
|
2 |
|
3 |
|
4 | u8 TxBuffer[] = "\n\rUSART Hyperterminal Interrupts Example: USART-Hyperterminal\
|
5 | communication using Interrupt\n\r";
|
6 | u8 RxBuffer[97];
|
7 | u8 NbrOfDataToTransfer = 97;
|
8 | u8 NbrOfDataToRead = 97;
|
9 | u8 TxCounter = 0;
|
10 | u16 RxCounter = 0;
|
11 |
|
12 | void NMIException(void) //generated by Clock Security System (CSS)
|
13 | {
|
14 | }
|
15 |
|
16 | void HardFaultException(void)
|
17 | {
|
18 | //hard fault exeption -> endless loop
|
19 | while (1)
|
20 | {
|
21 | }
|
22 | }
|
23 |
|
24 | void MemManageException(void)
|
25 | {
|
26 | //memory manage exception -> endless loop
|
27 | while (1)
|
28 | {
|
29 | }
|
30 | }
|
31 |
|
32 | void BusFaultException(void)
|
33 | {
|
34 | //Bus Fault Exception -> endless loop
|
35 | while (1)
|
36 | {
|
37 | }
|
38 | }
|
39 |
|
40 | void UsageFaultException(void)
|
41 | {
|
42 | //usage fault exception -> endless loop
|
43 | while (1)
|
44 | {
|
45 | }
|
46 | }
|
47 |
|
48 | void DebugMonitor(void)
|
49 | {
|
50 | }
|
51 |
|
52 | void SVCHandler(void)
|
53 | {
|
54 | }
|
55 |
|
56 | void PendSVC(void)
|
57 | {
|
58 | }
|
59 |
|
60 | void SysTickHandler(void)
|
61 | {
|
62 | }
|
63 |
|
64 | void WWDG_IRQHandler(void)
|
65 | {
|
66 | }
|
67 |
|
68 | void PVD_IRQHandler(void)
|
69 | {
|
70 | }
|
71 |
|
72 | void TAMPER_IRQHandler(void)
|
73 | {
|
74 | }
|
75 |
|
76 | void RTC_IRQHandler(void)
|
77 | {
|
78 | }
|
79 |
|
80 | void FLASH_IRQHandler(void)
|
81 | {
|
82 | }
|
83 |
|
84 | void RCC_IRQHandler(void)
|
85 | {
|
86 | }
|
87 |
|
88 | void EXTI0_IRQHandler(void)
|
89 | {
|
90 | }
|
91 |
|
92 | void EXTI1_IRQHandler(void)
|
93 | {
|
94 | }
|
95 |
|
96 | void EXTI2_IRQHandler(void)
|
97 | {
|
98 | }
|
99 |
|
100 | void EXTI3_IRQHandler(void)
|
101 | {
|
102 | }
|
103 |
|
104 | void EXTI4_IRQHandler(void)
|
105 | {
|
106 | }
|
107 |
|
108 | void DMA1_Channel1_IRQHandler(void)
|
109 | {
|
110 | }
|
111 |
|
112 | void DMA1_Channel2_IRQHandler(void)
|
113 | {
|
114 | }
|
115 |
|
116 | void DMA1_Channel3_IRQHandler(void)
|
117 | {
|
118 | }
|
119 |
|
120 | void DMA1_Channel4_IRQHandler(void)
|
121 | {
|
122 | }
|
123 |
|
124 | void DMA1_Channel5_IRQHandler(void)
|
125 | {
|
126 | }
|
127 |
|
128 | void DMA1_Channel6_IRQHandler(void)
|
129 | {
|
130 | }
|
131 |
|
132 | void DMA1_Channel7_IRQHandler(void)
|
133 | {
|
134 | }
|
135 |
|
136 | void ADC1_2_IRQHandler(void)
|
137 | {
|
138 | }
|
139 |
|
140 | void USB_HP_CAN_TX_IRQHandler(void)
|
141 | {
|
142 | }
|
143 |
|
144 | void USB_LP_CAN_RX0_IRQHandler(void)
|
145 | {
|
146 | }
|
147 |
|
148 | void CAN_RX1_IRQHandler(void)
|
149 | {
|
150 | }
|
151 |
|
152 | void CAN_SCE_IRQHandler(void)
|
153 | {
|
154 | }
|
155 |
|
156 | void EXTI9_5_IRQHandler(void)
|
157 | {
|
158 | }
|
159 |
|
160 | void TIM1_BRK_IRQHandler(void)
|
161 | {
|
162 | }
|
163 |
|
164 | void TIM1_UP_IRQHandler(void)
|
165 | {
|
166 | }
|
167 |
|
168 | void TIM1_TRG_COM_IRQHandler(void)
|
169 | {
|
170 | }
|
171 |
|
172 | void TIM1_CC_IRQHandler(void)
|
173 | {
|
174 | }
|
175 |
|
176 | void TIM2_IRQHandler(void)
|
177 | {
|
178 | }
|
179 |
|
180 | void TIM3_IRQHandler(void)
|
181 | {
|
182 | }
|
183 |
|
184 | void TIM4_IRQHandler(void)
|
185 | {
|
186 | }
|
187 |
|
188 | void I2C1_EV_IRQHandler(void)
|
189 | {
|
190 | }
|
191 |
|
192 | void I2C1_ER_IRQHandler(void)
|
193 | {
|
194 | }
|
195 |
|
196 | void I2C2_EV_IRQHandler(void)
|
197 | {
|
198 | }
|
199 |
|
200 | void I2C2_ER_IRQHandler(void)
|
201 | {
|
202 | }
|
203 |
|
204 | void SPI1_IRQHandler(void)
|
205 | {
|
206 | }
|
207 |
|
208 | void SPI2_IRQHandler(void)
|
209 | {
|
210 | }
|
211 |
|
212 | void USART1_IRQHandler(void)
|
213 | {
|
214 | }
|
215 |
|
216 | ////////////////////////USART 2 IRQ Handler/////////////////////////////////////
|
217 | void USART2_IRQHandler(void)
|
218 | {
|
219 | USART_SendData(USART2, 10);
|
220 | if(USART_GetITStatus(USART2, USART_IT_RXNE) != RESET) //RX not empty Interrupt occured
|
221 | {
|
222 | /* Read one byte from the receive data register */
|
223 | RxBuffer[RxCounter++] = (USART_ReceiveData(USART2) & 0x7F);
|
224 |
|
225 | if(RxCounter == NbrOfDataToRead)
|
226 | {
|
227 | /* Disable the USART Receive interrupt */
|
228 | USART_ITConfig(USART2, USART_IT_RXNE, DISABLE);
|
229 | }
|
230 | }
|
231 |
|
232 | if(USART_GetITStatus(USART2, USART_IT_TXE) != RESET)
|
233 | {
|
234 | /* Write one byte to the transmit data register */
|
235 | USART_SendData(USART2, TxBuffer[TxCounter++]);
|
236 |
|
237 | if(TxCounter == NbrOfDataToTransfer)
|
238 | {
|
239 | /* Disable the USART2 Transmit interrupt */
|
240 | USART_ITConfig(USART2, USART_IT_TXE, DISABLE);
|
241 | }
|
242 | }
|
243 | }
|
244 |
|
245 | void USART3_IRQHandler(void)
|
246 | {
|
247 | }
|
248 |
|
249 | void EXTI15_10_IRQHandler(void)
|
250 | {
|
251 | }
|
252 |
|
253 | void RTCAlarm_IRQHandler(void)
|
254 | {
|
255 | }
|
256 |
|
257 | void USBWakeUp_IRQHandler(void)
|
258 | {
|
259 | }
|
260 |
|
261 | void TIM8_BRK_IRQHandler(void)
|
262 | {
|
263 | }
|
264 |
|
265 | void TIM8_UP_IRQHandler(void)
|
266 | {
|
267 | }
|
268 |
|
269 | void TIM8_TRG_COM_IRQHandler(void)
|
270 | {
|
271 | }
|
272 |
|
273 | void TIM8_CC_IRQHandler(void)
|
274 | {
|
275 | }
|
276 |
|
277 | void ADC3_IRQHandler(void)
|
278 | {
|
279 | }
|
280 |
|
281 | void FSMC_IRQHandler(void)
|
282 | {
|
283 | }
|
284 |
|
285 | void SDIO_IRQHandler(void)
|
286 | {
|
287 | }
|
288 |
|
289 | void TIM5_IRQHandler(void)
|
290 | {
|
291 | }
|
292 |
|
293 | void SPI3_IRQHandler(void)
|
294 | {
|
295 | }
|
296 |
|
297 | void UART4_IRQHandler(void)
|
298 | {
|
299 | }
|
300 |
|
301 | void UART5_IRQHandler(void)
|
302 | {
|
303 | }
|
304 |
|
305 | void TIM6_IRQHandler(void)
|
306 | {
|
307 | }
|
308 |
|
309 | void TIM7_IRQHandler(void)
|
310 | {
|
311 | }
|
312 |
|
313 | void DMA2_Channel1_IRQHandler(void)
|
314 | {
|
315 | }
|
316 |
|
317 | void DMA2_Channel2_IRQHandler(void)
|
318 | {
|
319 | }
|
320 |
|
321 | void DMA2_Channel3_IRQHandler(void)
|
322 | {
|
323 | }
|
324 |
|
325 | void DMA2_Channel4_5_IRQHandler(void)
|
326 | {
|
327 | }
|