sensorhub.asm
1 | .nolist
| 2 | .include "/home/lukas/Dokumente/AVR/includes/m48def.inc"
| 3 | .list
| 4 |
| 5 | ;**************************************************************
| 6 | ;Notizen
| 7 | ;**************************************************************
| 8 |
| 9 | ;sudo avrdude -c avrispmkII -P usb -p m48 -U lfuse:w:0xE2:m -U hfuse:w:0xDF:m ===> Internes Quarz 8MHz Divide clock by 8 internally; [CKDIV8=0] ; Ausgeschaltet!!
| 10 | ; Interne Clock 8MHz
| 11 |
| 12 | ; TWI
| 13 | ; TAKT=8.0 MHZ
| 14 | ; BITRATE = 32
| 15 | ; PRESCALER = 0
| 16 | ; TWI FRQ = 100kHz
| 17 | ; BITRATE NICHT UNTER 10 !
| 18 | ; WERTE BERECHNEN: http://amforth.sourceforge.net/TG/recipes/TWI.html
| 19 |
| 20 |
| 21 |
| 22 |
| 23 | ;**************************************************************
| 24 | ;MAKROS
| 25 | ;**************************************************************
| 26 |
| 27 | .MACRO push_stock
| 28 | push ar_1
| 29 | push ar_2
| 30 | push ar_3
| 31 | push ar_4
| 32 | in ar_1,SREG
| 33 | push ar_1
| 34 |
| 35 | .ENDMACRO
| 36 |
| 37 |
| 38 | .MACRO pop_stock
| 39 | pop ar_1
| 40 | out SREG,ar_1
| 41 | pop ar_4
| 42 | pop ar_3
| 43 | pop ar_2
| 44 | pop ar_1
| 45 | .ENDMACRO
| 46 |
| 47 | ;**************************************************************
| 48 | ;UART Berechnungen
| 49 | ;**************************************************************
| 50 |
| 51 | .equ F_CPU = 8000000 ; Systemtakt in Hz
| 52 | .equ BAUD = 9600 ; Baudrate
| 53 |
| 54 | .equ UBRR_VAL = ((F_CPU+BAUD*8)/(BAUD*16)-1) ; clever runden
| 55 | .equ BAUD_REAL = (F_CPU/(16*(UBRR_VAL+1))) ; Reale Baudrate
| 56 | .equ BAUD_ERROR = ((BAUD_REAL*1000)/BAUD-1000) ; Fehler in Promille
| 57 |
| 58 | .if ((BAUD_ERROR>10) || (BAUD_ERROR<-10)) ; max. +/-10 Promille Fehler
| 59 | .error "Systematischer Fehler der Baudrate grösser 1 Prozent und damit zu hoch!"
| 60 | .endif
| 61 |
| 62 |
| 63 | ;**************************************************************
| 64 | ;Konstanten
| 65 | ;**************************************************************
| 66 |
| 67 |
| 68 | ;One Wire
| 69 |
| 70 | .equ ow_port = PORTC
| 71 | .equ ow_pin_nr =0
| 72 | .equ ow_pin_name = PINC
| 73 |
| 74 | .equ DEVICE_ADDR = 0x68 ;SLAVE ADRESSE
| 75 | .equ TWI_PRESCALE = 0x00
| 76 | .equ TWI_BITRATE = 32 ;0x20 = Bitrate 32
| 77 |
| 78 | ; SPI
| 79 | .equ SPI_DDR_PORT = DDRD
| 80 | .equ SPI_PORT = PORTD
| 81 | .equ SPI_PIN = PIND
| 82 | .equ SS = 4 ;Output active low
| 83 | .equ SDO = 6 ;Input
| 84 | .equ SCK = 5 ;Output
| 85 | .equ SDI = 7 ;Output
| 86 |
| 87 | .equ SPI_DDR_Standart_dir =0b10110010 ;Inputs : INT0 an PD2,INT1 an PD3 SDO an PB6
| 88 |
| 89 |
| 90 | ;**************************************************************
| 91 | ;Registerdefinitionen
| 92 | ;**************************************************************
| 93 |
| 94 | ; Arbeitsregister
| 95 | .def ar_1= r16
| 96 | .def ar_2= r17
| 97 | .def ar_3= r18
| 98 | .def ar_4= r19
| 99 |
| 100 | ; byteregister one wire, spi....
| 101 |
| 102 | .def lsb= r20
| 103 | .def msb= r21
| 104 |
| 105 |
| 106 |
| 107 | ;**************************************************************
| 108 | ;SRAM -START
| 109 | ;**************************************************************
| 110 | .dseg
| 111 | ;**************************************************************
| 112 | ;SRAM -LED Farbsteuerung
| 113 | ;**************************************************************
| 114 |
| 115 | led_color: .BYTE 1
| 116 |
| 117 | ;**************************************************************
| 118 | ;SRAM -LED PWM Steuerung
| 119 | ;**************************************************************
| 120 | ;~ periode_pwm: .BYTE 2 ; 1 Byte soll, 2 byte ist
| 121 | ;~ periode_rgb: .BYTE 3 ; 1 Byte Rot, 2 Byte Grün, 3 Byte Blau => on zeit, max 250
| 122 |
| 123 | ;**************************************************************
| 124 | ;SRAM - Timer
| 125 | ;**************************************************************
| 126 | ; Timerzäher Warteschleifen ys
| 127 | ;~ ys_wait_time: .BYTE 1 ; 1 = 5ys, 4 = 15ys, 24 = 60ys => MIKROSEKUNDENTIMER
| 128 | ; Timerzäher Warteschleifen ms
| 129 | ;~ ms_wait_counter_time: .BYTE 2 ; counter byte1, time in ms byte2 => MILISEKUNDENTIMER
| 130 | ; Timerzäher Warteschleifen s
| 131 | TIM0_COMPA_counter: .BYTE 2 ; wenn zähler 40000 erreicht => 1 sec =>SEKUNDENTIMER
| 132 |
| 133 |
| 134 | ;**************************************************************
| 135 | ;SRAM - One Wire
| 136 | ;**************************************************************
| 137 |
| 138 | one_wire_data: .BYTE 2 ; für die übertragung/empfang von daten über one wire, byte1: msb byte2: lsb
| 139 |
| 140 | ;**************************************************************
| 141 | ;SRAM - TWI
| 142 | ;**************************************************************
| 143 |
| 144 | error_codes: .BYTE 1
| 145 | error_status: .BYTE 1
| 146 |
| 147 |
| 148 |
| 149 | ;**************************************************************
| 150 | ;SRAM - UART
| 151 | ;**************************************************************
| 152 |
| 153 | UART_TX: .BYTE 1
| 154 | UART_RX: .BYTE 1
| 155 | UART_MESSAGE_ADRESS: .BYTE 2
| 156 |
| 157 | ;**************************************************************
| 158 | ;SRAM - ADC
| 159 | ;**************************************************************
| 160 |
| 161 | ADC_VALUE: .BYTE 2
| 162 |
| 163 |
| 164 | ;**************************************************************
| 165 | ;TEMPERATUR
| 166 | ;**************************************************************
| 167 |
| 168 | temperatur: .BYTE 2 ; für die aktuelle Temperatur die gemessen wurde byte1: msb byte2: lsb
| 169 | .cseg
| 170 |
| 171 | ;**************************************************************
| 172 | ;SRAM ENDE
| 173 | ;**************************************************************
| 174 |
| 175 | ;**************************************************************
| 176 | ;Vektorentabelle
| 177 | ;**************************************************************
| 178 | .org 0x000
| 179 | rjmp init ; Reset Handler
| 180 | ;.org 0x001
| 181 | ;rjmp EXT_INT0 ; IRQ0 Handler
| 182 | .org 0x002
| 183 | rjmp EXT_INT1 ; IRQ1 Handler
| 184 | ;~ .org 0x003
| 185 | ;rjmp PCINT0 ; PCINT0 Handler
| 186 | ;.org 0x004
| 187 | ;rjmp PCINT1 ; PCINT1 Handler
| 188 | ;.org 0x005
| 189 | ;rjmp PCINT2 ; PCINT2 Handler
| 190 | ;.org 0x006
| 191 | ;rjmp WDT ; Watchdog Timer Handler
| 192 | ;.org 0x007
| 193 | ;rjmp TIM2_COMPA ; Timer2 Compare A Handler
| 194 | ;.org 0x008
| 195 | ;rjmp TIM2_COMPB ; Timer2 Compare B Handler
| 196 | ;.org 0x009
| 197 | ;rjmp TIM2_OVF ; Timer2 Overflow Handler
| 198 | ;.org 0x00A
| 199 | ;rjmp TIM1_CAPT ; Timer1 Capture Handler
| 200 | ;.org 0x00B
| 201 | ;rjmp TIM1_COMPA ; Timer1 Compare A Handler
| 202 | ;.org 0x00C
| 203 | ;rjmp TIM1_COMPB ; Timer1 Compare B Handler
| 204 | ;.org 0x00D
| 205 | ;rjmp TIM1_OVF ; Timer1 Overflow Handler
| 206 | ;.org 0x00E
| 207 | .org 0x00E
| 208 | rjmp TIM0_COMPA ; Timer0 Compare A Handler
| 209 | ;rjmp TIM0_COMPB ; Timer0 Compare B Handler
| 210 | ;.org 0x010
| 211 | ;~ ;rjmp TIM0_OVF ; Timer0 Overflow Handler
| 212 | ;~ ;.org 0x011
| 213 | ;rjmp SPI_STC ; SPI Transfer Complete Handler
| 214 | .org 0x012
| 215 | rjmp USART_RXC ; USART, RX Complete Handler
| 216 | ;.org 0x013
| 217 | ;rjmp USART_UDRE ; USART, UDR Empty Handler
| 218 | ;.org 0x014
| 219 | ;rjmp USART_TXC ; USART, TX Complete Handler
| 220 | ;.org 0x015
| 221 | ;rjmp ADC ; ADC Conversion Complete Handler
| 222 | ;.org 0x016
| 223 | ;rjmp EE_RDY ; EEPROM Ready Handler
| 224 | ;.org 0x017
| 225 | ;rjmp ANA_COMP ; Analog Comparator Handler
| 226 | ;.org 0x018
| 227 | ;rjmp TWI ; 2-wire Serial Interface Handler
| 228 | ;.org 0x019
| 229 | ;rjmp SPM_RDY
| 230 |
| 231 | ;**************************************************************
| 232 | ;Interrupts - reti
| 233 | ;**************************************************************
| 234 |
| 235 | EXT_INT1:
| 236 | push_stock
| 237 |
| 238 |
| 239 | rcall rfm_send
| 240 |
| 241 | pop_stock
| 242 |
| 243 | reti
| 244 |
| 245 |
| 246 | USART_RXC:
| 247 |
| 248 | push_stock
| 249 |
| 250 | lds ar_1, UDR0
| 251 |
| 252 | sts led_color,ar_1
| 253 |
| 254 | ldi ar_1,0x00
| 255 | out PORTB,ar_1
| 256 |
| 257 | cbi PORTB,2
| 258 |
| 259 |
| 260 | reti
| 261 |
| 262 |
| 263 | ;**************************************************************
| 264 | ;Interrupts -TIMER
| 265 | ;**************************************************************
| 266 |
| 267 |
| 268 | TIM0_COMPA:
| 269 |
| 270 | push_stock
| 271 |
| 272 | ldi ar_1,low(40000)
| 273 | ldi ar_2,high(40000)
| 274 |
| 275 | lds ar_3,TIM0_COMPA_counter
| 276 | lds ar_4,TIM0_COMPA_counter+1
| 277 |
| 278 | ;Zahlenstand 40'000 ?
| 279 | cp ar_1,ar_3
| 280 | cpc ar_2,ar_4
| 281 | breq TIM0_COMPA_reset ;springe wenn ja
| 282 |
| 283 | ; sonst +1 erhöhen
| 284 | ldi ar_1,1
| 285 | ldi ar_2,0
| 286 |
| 287 | add ar_3,ar_1
| 288 | adc ar_4,ar_2
| 289 |
| 290 | sts TIM0_COMPA_counter,ar_3
| 291 | sts TIM0_COMPA_counter+1,ar_4
| 292 |
| 293 | rjmp TIM0_COMPA_exit
| 294 |
| 295 | ; 1 Sekunde vergangen
| 296 | TIM0_COMPA_reset:
| 297 |
| 298 | sbic PINB,0
| 299 | cbi PORTB,0
| 300 | sbis PINB,0
| 301 | sbi PORTB,0
| 302 |
| 303 | clr ar_3
| 304 | clr ar_4
| 305 | sts TIM0_COMPA_counter,ar_3
| 306 | sts TIM0_COMPA_counter+1,ar_4
| 307 |
| 308 |
| 309 | TIM0_COMPA_exit:
| 310 |
| 311 | pop_stock
| 312 |
| 313 | reti
| 314 |
| 315 |
| 316 | ;**************************************************************
| 317 | ;Unterprogramme -ret
| 318 | ;**************************************************************
| 319 |
| 320 | ;**************************************************************
| 321 | ;Unterprogramme -ADC
| 322 | ;**************************************************************
| 323 |
| 324 | adc_messung:
| 325 |
| 326 |
| 327 |
| 328 | push_stock
| 329 |
| 330 |
| 331 |
| 332 | ;Messung starten
| 333 | lds ar_1,ADCSRA
| 334 | sbr ar_1,(1<<ADSC)
| 335 | sts ADCSRA,ar_1
| 336 |
| 337 | wait_adc:
| 338 | lds ar_1,ADCSRA
| 339 | sbrc ar_1,ADSC
| 340 | rjmp wait_adc
| 341 |
| 342 | lds ar_1,ADCL
| 343 | lds ar_2,ADCH
| 344 |
| 345 | sts UART_TX,ar_1
| 346 | rcall uart_send
| 347 | sts UART_TX,ar_2
| 348 | rcall uart_send
| 349 |
| 350 |
| 351 |
| 352 | pop_stock
| 353 |
| 354 |
| 355 | ret
| 356 |
| 357 | ;**************************************************************
| 358 | ;Unterprogramme -USART
| 359 | ;**************************************************************
| 360 |
| 361 |
| 362 | uart_send:
| 363 |
| 364 |
| 365 | push_stock
| 366 |
| 367 | USART_Transmit:
| 368 | ; Wait for empty transmit buffer
| 369 | lds ar_1,UCSR0A
| 370 | sbrs ar_1,UDRE0
| 371 | rjmp USART_Transmit
| 372 |
| 373 | lds ar_1,UART_TX
| 374 |
| 375 | ; Put data (r16) into buffer, sends the data
| 376 |
| 377 | sts UDR0,ar_1
| 378 |
| 379 | pop_stock
| 380 |
| 381 | ret
| 382 |
| 383 | uart_rom_text_output:
| 384 |
| 385 | lds ZL,UART_MESSAGE_ADRESS
| 386 | lds ZH,UART_MESSAGE_ADRESS+1
| 387 |
| 388 | uart_rom_text_output_loop:
| 389 | lpm ar_1,Z+
| 390 | cpi ar_1,0
| 391 | breq uart_rom_text_output_exit
| 392 | sts UART_TX,ar_1
| 393 | rcall uart_send
| 394 | rjmp uart_rom_text_output_loop
| 395 |
| 396 | uart_rom_text_output_exit:
| 397 |
| 398 | ret
| 399 |
| 400 |
| 401 |
| 402 | ;**************************************************************
| 403 | ;Unterprogramme -WAIT
| 404 | ;**************************************************************
| 405 |
| 406 |
| 407 | ;Warteschleifen für one wire
| 408 | ; ar_1 vorher sichern oder nicht verwenden!
| 409 | ; verzögerung durch springen/rückspringen beachten Pro takt 0.125y;
| 410 | ; interrupts auschalten, bei Zeitkritischen anwendungen
| 411 |
| 412 | wait_5ys: ;gemessen 5.1ys
| 413 |
| 414 |
| 415 | push ar_1
| 416 |
| 417 | ldi ar_1,6
| 418 | wait_5ys_loop:
| 419 | dec ar_1 ;
| 420 | tst ar_1 ;
| 421 | brne wait_5ys_loop ;
| 422 |
| 423 | pop ar_1
| 424 |
| 425 |
| 426 | ret
| 427 |
| 428 | wait_10ys: ;gemessen 10.3ys
| 429 | push ar_1
| 430 |
| 431 | ldi ar_1,17 ;1 Takt
| 432 | wait_10ys_loop:
| 433 | dec ar_1 ;1 Takt
| 434 | tst ar_1 ;1 Takt
| 435 | brne wait_10ys_loop ;2 Takte bei false, 1 bei true
| 436 |
| 437 | pop ar_1
| 438 | ret
| 439 |
| 440 |
| 441 | wait_15ys: ; gemessen 15.1ys
| 442 | push ar_1
| 443 |
| 444 | ldi ar_1,26 ;1 Takt
| 445 | wait_15ys_loop:
| 446 | dec ar_1 ;1 Takt
| 447 | tst ar_1 ;1 Takt
| 448 | brne wait_15ys_loop ;2 Takte bei false, 1 bei true
| 449 |
| 450 | pop ar_1
| 451 | ret
| 452 |
| 453 |
| 454 |
| 455 | wait_45ys: ; gemessen 44.7ys
| 456 | push ar_1
| 457 |
| 458 | ldi ar_1,86 ;1 Takt
| 459 | wait_45ys_loop:
| 460 | dec ar_1 ;1 Takt
| 461 | tst ar_1 ;1 Takt
| 462 | brne wait_45ys_loop ; 2 Takte bei false, 1 bei true
| 463 |
| 464 | pop ar_1
| 465 | ret
| 466 |
| 467 |
| 468 | wait_480ys: ;gemessen 487ys
| 469 | push ar_1
| 470 |
| 471 | ldi ar_1,11
| 472 |
| 473 | wait_480_loop:
| 474 | rcall wait_45ys
| 475 | dec ar_1
| 476 | tst ar_1
| 477 | brne wait_480_loop
| 478 |
| 479 | pop ar_1
| 480 |
| 481 | ret
| 482 |
| 483 | wait_1ms: ; gemessen 1.064ms
| 484 |
| 485 |
| 486 | push_stock
| 487 |
| 488 | ldi ar_1,24
| 489 |
| 490 | wait_1ms_loop:
| 491 | rcall wait_45ys
| 492 | dec ar_1
| 493 | tst ar_1
| 494 | brne wait_1ms_loop
| 495 |
| 496 | pop_stock
| 497 |
| 498 | ret
| 499 |
| 500 | wait_1s:
| 501 |
| 502 | push_stock
| 503 |
| 504 | ldi ar_1,0
| 505 |
| 506 | ; reset des sec zählers
| 507 |
| 508 | sts TIM0_COMPA_counter,ar_1
| 509 | sts TIM0_COMPA_counter+1,ar_1
| 510 |
| 511 | ldi ar_1,low(40000)
| 512 | ldi ar_2,high(40000)
| 513 |
| 514 |
| 515 | wait_1s_loop:
| 516 |
| 517 | lds ar_3,TIM0_COMPA_counter
| 518 | lds ar_4,TIM0_COMPA_counter+1
| 519 |
| 520 | cp ar_3,ar_1
| 521 | cpc ar_4,ar_2
| 522 | brne wait_1s_loop
| 523 |
| 524 |
| 525 |
| 526 | pop_stock
| 527 |
| 528 | ret
| 529 |
| 530 |
| 531 | ;**************************************************************
| 532 | ;Unterprogramme -TWI
| 533 | ;**************************************************************
| 534 |
| 535 |
| 536 | .include "TWI.asm"
| 537 |
| 538 | ;**************************************************************
| 539 | ;Unterprogramme -SPI
| 540 | ;**************************************************************
| 541 |
| 542 |
| 543 | .include "SPI.asm"
| 544 |
| 545 |
| 546 | ;**************************************************************
| 547 | ;Unterprogramme -ONE WIRE
| 548 | ;**************************************************************
| 549 |
| 550 | ;One wire Reset Routine
| 551 | one_wire_reset:
| 552 |
| 553 | cli ;Interrpupts aus
| 554 |
| 555 | cbi ow_port,ow_pin_nr ;auf low
| 556 | ; Warte 480µs
| 557 | rcall wait_480ys
| 558 |
| 559 | sbi ow_port,ow_pin_nr ; wieder auf high
| 560 |
| 561 | ; Presence Impuls abwarten
| 562 |
| 563 | rcall wait_15ys
| 564 |
| 565 | detect_presence:
| 566 | sbic ow_pin_name,ow_pin_nr
| 567 | rjmp detect_presence
| 568 |
| 569 | ; solange warten bis wieder high
| 570 |
| 571 | detect_presence_done:
| 572 | sbis ow_pin_name,ow_pin_nr
| 573 | rjmp detect_presence_done
| 574 |
| 575 | ; och mal 480µs warten
| 576 |
| 577 | rcall wait_480ys
| 578 | sei ; Interrupts wieder an
| 579 | ret
| 580 |
| 581 |
| 582 | ;One wire komando senden 0xCC,0x44,0xBE, ect
| 583 | one_wire_cmd: ; kommando in lsb
| 584 |
| 585 |
| 586 | push ar_1
| 587 | ldi ar_1,9
| 588 | cli ;Interrpupts aus
| 589 | one_wire_cmd_loop:
| 590 |
| 591 | rcall wait_5ys ;5µs Warten,slotpausen/start,ende
| 592 |
| 593 | dec ar_1
| 594 | tst ar_1
| 595 | breq one_wire_cmd_exit ; wenn null dann raus...
| 596 |
| 597 | lsr lsb ; Logical Shift Right in carry
| 598 | brcc write_zero
| 599 |
| 600 | ; Wenn carr nicht 0 dann 1:
| 601 | cbi ow_port,ow_pin_nr
| 602 |
| 603 | rcall wait_15ys ;low für 15µs
| 604 | sbi ow_port,ow_pin_nr ; wieder high
| 605 | rcall wait_45ys ;45ys warten , zusammen 65µs
| 606 | rjmp one_wire_cmd_loop
| 607 |
| 608 |
| 609 | ; Wenn carry nicht 1 dann 0:
| 610 | write_zero:
| 611 |
| 612 | cbi ow_port,ow_pin_nr
| 613 | rcall wait_15ys ; 15µs Warten
| 614 | rcall wait_45ys ; 45µs Warten , zusammen 65µs
| 615 | sbi ow_port,ow_pin_nr ; wieder auf high
| 616 |
| 617 | rjmp one_wire_cmd_loop
| 618 |
| 619 | one_wire_cmd_exit:
| 620 |
| 621 | pop ar_1
| 622 | sei ;Interrpupts wieder an
| 623 |
| 624 | ret
| 625 |
| 626 | ;One wire daten lesen
| 627 | one_wire_read:
| 628 |
| 629 | cli
| 630 | push ar_1
| 631 | push ar_2
| 632 |
| 633 | ldi ar_1,9
| 634 | ldi lsb,0x00 ; datenspeicher
| 635 |
| 636 | one_wire_read_loop:
| 637 |
| 638 | sbi DDRC,ow_pin_nr
| 639 |
| 640 | dec ar_1
| 641 | tst ar_1
| 642 | breq one_wire_read_loop_exit
| 643 |
| 644 | cbi ow_port,ow_pin_nr ;auf low
| 645 | rcall wait_15ys ;15µs Warte
| 646 | sbi ow_port,ow_pin_nr ; Wieder auf high
| 647 |
| 648 |
| 649 | rcall wait_5ys ;5µs Warten
| 650 |
| 651 |
| 652 | ; Testen ob high
| 653 |
| 654 |
| 655 | sbis ow_pin_name,ow_pin_nr
| 656 | rjmp read_zero
| 657 |
| 658 | ;Lese 1
| 659 | sec ;Set Carry Flag
| 660 | ror lsb ;Rotate Right through Carry (C >00000000 > 0)
| 661 | rcall wait_45ys ;Warte noch 45µs
| 662 | rjmp one_wire_read_loop
| 663 |
| 664 |
| 665 | ;Lese 0
| 666 | read_zero:
| 667 | clc ;Clear Carry Flag
| 668 | ror lsb ;Rotate Right through Carry (C >00000000 > 0)
| 669 | rcall wait_45ys ;Warte noch 45µs
| 670 | rjmp one_wire_read_loop
| 671 |
| 672 |
| 673 | one_wire_read_loop_exit:
| 674 |
| 675 |
| 676 | pop ar_2
| 677 | pop ar_1
| 678 |
| 679 | sei
| 680 | ret
| 681 |
| 682 |
| 683 |
| 684 | ;**************************************************************
| 685 | ;Unterprogramme -SENSOREN
| 686 | ;**************************************************************
| 687 |
| 688 | DS_messen:
| 689 |
| 690 | rcall one_wire_reset
| 691 |
| 692 | ldi lsb,0xCC
| 693 | rcall one_wire_cmd
| 694 |
| 695 | ldi lsb,0x44
| 696 | rcall one_wire_cmd
| 697 |
| 698 | rcall wait_1s
| 699 |
| 700 | rcall one_wire_reset
| 701 |
| 702 | ldi lsb,0xCC
| 703 | rcall one_wire_cmd
| 704 |
| 705 | ldi lsb,0xBE
| 706 | rcall one_wire_cmd
| 707 |
| 708 | rcall one_wire_read
| 709 |
| 710 | mov ar_1,lsb
| 711 |
| 712 | rcall one_wire_read
| 713 |
| 714 | mov ar_2,lsb
| 715 |
| 716 | ror ar_2
| 717 | ror ar_1
| 718 |
| 719 | sts temperatur+1,ar_1 ; temperaturwert IN lsb
| 720 |
| 721 | push ar_1 ; sichern
| 722 |
| 723 | ldi ZL,low(uart_message*2)
| 724 | ldi ZH,high(uart_message*2)
| 725 |
| 726 | DS_messen_text_output_1_loop:
| 727 | lpm ar_1,Z+
| 728 | cpi ar_1,0
| 729 | breq DS_messen_text_output_1_exit
| 730 | sts UART_TX,ar_1
| 731 | rcall uart_send
| 732 | rjmp DS_messen_text_output_1_loop
| 733 |
| 734 |
| 735 | DS_messen_text_output_1_exit:
| 736 |
| 737 | pop ar_1 ;widerherstellen
| 738 |
| 739 | ldi ar_2,0
| 740 |
| 741 | to_ascii:
| 742 | cpi ar_1,10
| 743 | brlo to_ascii_exit
| 744 | subi ar_1,10
| 745 | inc ar_2
| 746 | rjmp to_ascii
| 747 |
| 748 | to_ascii_exit:
| 749 |
| 750 | ldi ar_3,0x30
| 751 | add ar_2,ar_3
| 752 |
| 753 | push ar_1
| 754 | mov ar_1,ar_2
| 755 |
| 756 | sts UART_TX,ar_1
| 757 | rcall uart_send
| 758 |
| 759 | pop ar_1
| 760 | ldi ar_3,0x30
| 761 | add ar_1,ar_3
| 762 |
| 763 | sts UART_TX,ar_1
| 764 | rcall uart_send
| 765 |
| 766 |
| 767 | DS_messen_text_output_2_loop:
| 768 | lpm ar_1,Z+
| 769 | cpi ar_1,0
| 770 | breq DS_messen_text_output_2_exit
| 771 | sts UART_TX,ar_1
| 772 | rcall uart_send
| 773 | rjmp DS_messen_text_output_2_loop
| 774 |
| 775 | DS_messen_text_output_2_exit:
| 776 |
| 777 |
| 778 |
| 779 | ret
| 780 |
| 781 |
| 782 | ;**************************************************************
| 783 | ;Init
| 784 | ;**************************************************************
| 785 |
| 786 |
| 787 | ;**************************************************************
| 788 | ;Init -PORTS/STACKPOINTER
| 789 | ;**************************************************************
| 790 |
| 791 |
| 792 | init:
| 793 |
| 794 |
| 795 | ldi ar_1,0xFF
| 796 | out DDRB,ar_1
| 797 |
| 798 | ldi ar_1,0x00
| 799 | out PORTB,ar_1
| 800 |
| 801 | ldi ar_1,SPI_DDR_Standart_dir
| 802 | out DDRD,ar_1
| 803 |
| 804 | ldi ar_1,0b00010000
| 805 | out PORTD,ar_1
| 806 |
| 807 | ldi ar_1,0xFF ; One_wire, ADC und Ic2
| 808 | out DDRC,ar_1
| 809 |
| 810 | ldi ar_1,0xFF
| 811 | out PORTC,ar_1
| 812 |
| 813 |
| 814 | ldi ar_1,HIGH(RAMEND) ;Stackpointer HIGH
| 815 | out SPH,ar_1
| 816 |
| 817 | ldi ar_1,LOW(RAMEND) ;Stackpointer LOW
| 818 | out SPL,ar_1
| 819 |
| 820 |
| 821 |
| 822 | ;**************************************************************
| 823 | ;Init - KOMPONENTEN
| 824 | ;**************************************************************
| 825 |
| 826 | sei
| 827 | ; Uart conf
| 828 | ; Baudrate einstellen
| 829 |
| 830 | ldi ar_1,HIGH(UBRR_VAL)
| 831 | sts UBRR0H,ar_1
| 832 | ldi ar_1,LOW(UBRR_VAL)
| 833 | sts UBRR0L,ar_1
| 834 |
| 835 | ldi ar_1,(1<<TXEN0)|(1<<RXEN0)|(1<<RXCIE0) ; Interrupt bei Empfang Nein = 0.
| 836 | sts UCSR0B,ar_1
| 837 |
| 838 | ;Interrupt INT0 & INT1
| 839 |
| 840 | ldi ar_1,(1<<ISC11)|(0<<ISC10) ; low_level auf INT1
| 841 | sts EICRA,ar_1
| 842 |
| 843 | ldi ar_1,0x02; INT1 Interrupt aktiviert
| 844 | out EIMSK,ar_1
| 845 |
| 846 | ;ADC init
| 847 |
| 848 | ldi ar_1,0x46
| 849 | sts ADMUX,ar_1
| 850 |
| 851 | ldi ar_1,(1<<ADEN)|(1<<ADPS2)|(1<<ADPS1) ; ADC an,prescaler 64 (125kHz)
| 852 | sts ADCSRA,ar_1
| 853 |
| 854 |
| 855 |
| 856 | ; TIMER0
| 857 | ldi ar_1,(1<<WGM01) ;Timer0 mit CTC
| 858 | out TCCR0A,ar_1
| 859 |
| 860 | ldi ar_1,(1<<CS00) ;Timer0 mit Prescale 1
| 861 | out TCCR0B,ar_1
| 862 |
| 863 | ldi ar_1,201
| 864 | out OCR0A,ar_1
| 865 |
| 866 | ldi ar_1,(1<<OCIE0A)
| 867 | sts TIMSK0,ar_1
| 868 |
| 869 |
| 870 |
| 871 | sbi PORTB,1
| 872 | rcall rfm_init
| 873 | cbi PORTB,1
| 874 |
| 875 |
| 876 |
| 877 | main:
| 878 |
| 879 |
| 880 |
| 881 | rjmp main
| 882 |
| 883 |
| 884 |
| 885 |
| 886 | ;**************************************************************
| 887 | ;ROM
| 888 | ;**************************************************************
| 889 | uart_message:
| 890 |
| 891 | .db "Wert",0
| 892 |
| 893 | ;~ dcf_bits:
| 894 | ;~ .db 21,4,25,3,29,4,33,2,36,4,40,2,42,3,45,4,49,1,50,4,54,4
| 895 |
| 896 | ;temperatur_plus:
| 897 |
| 898 | ;.db 0,0,255,255,
| 899 | ;.db 1,0,255,255,
| 900 | ;.db 2,0,255,255,
| 901 | ;.db 3,0,255,255,
| 902 | ;.db 4,0,255,255,
| 903 | ;.db 5,0,255,191,
| 904 | ;.db 6,0,255,191,
| 905 | ;.db 7,0,255,191,
| 906 | ;.db 8,0,255,191,
| 907 | ;.db 9,0,255,191,
| 908 | ;.db 10,0,255,128,
| 909 | ;.db 11,0,255,128,
| 910 | ;.db 12,0,255,128,
| 911 | ;.db 13,0,255,128,
| 912 | ;.db 14,0,255,128,
| 913 | ;.db 15,0,255,64,
| 914 | ;.db 16,0,255,64,
| 915 | ;.db 17,0,255,64,
| 916 | ;.db 18,0,255,64,
| 917 | ;.db 19,0,255,64,
| 918 | ;.db 20,0,255,0,
| 919 | ;.db 21,128,255,0,
| 920 | ;.db 22,128,255,0,
| 921 | ;.db 23,128,255,0,
| 922 | ;.db 24,128,255,0,
| 923 | ;.db 25,128,255,0,
| 924 | ;.db 26,255,255,0,
| 925 | ;.db 27,255,255,0,
| 926 | ;.db 28,255,255,0,
| 927 | ;.db 29,255,255,0,
| 928 | ;.db 30,255,255,0,
| 929 | ;.db 31,255,128,0,
| 930 | ;.db 32,255,128,0,
| 931 | ;.db 33,255,128,0,
| 932 | ;.db 34,255,128,0,
| 933 | ;.db 35,255,128,0,
| 934 | ;.db 36,255,0,0,
| 935 | ;.db 37,255,0,0,
| 936 | ;.db 38,255,0,0,
| 937 | ;.db 39,255,0,0,
| 938 | ;.db 40,255,0,0,
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