mewtodmx.asm


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.include "m324pdef.inc"

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.def rmp =     R16

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.def templ =   R17

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.def temph =  R18

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.def status =  R25

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.equ ch0out = $0100

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.equ ch1out = $0101

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.equ ch512out=$0301

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;*********************************Bit Positionen Status*********************************

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.equ start = 0

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.equ brk   = 1

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.cseg

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.org $0000

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        rjmp init

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        reti

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        reti ;IRQ 0

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        reti

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        reti ;IRQ 1

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        reti

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        reti ;IRQ 2

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        reti 

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        reti ;PCINT 0

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        reti

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        reti ;PCINT 1

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        reti

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        reti ;PCINT 2

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        reti

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        reti ;PCINT 3

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        reti

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        reti ;Watchdog timeout

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        reti

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        reti ;TIM2 COMPA

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        reti

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        reti ;TIM2 COMPB

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        reti

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        reti ;TIM2 OVF

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        reti

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        reti ;TIM1 CAPT

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        reti

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        reti ;TIM1 COMPA

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        reti

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        reti ;TIM1 COMPB

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        reti 

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        reti ;TIM1 OVF

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        reti

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        rjmp breakend ;TIM0 COMPA

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        reti

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        reti ;TIM0 COMPB

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        reti

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        reti ;TIM0 OVF

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        reti

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        reti ;SPI Transfer Complete

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        reti

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        reti ;USART0 RX Complete

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        reti

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        reti;USART0 UDR empty

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        reti

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        rjmp breaksend;USART0 TX Complete

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        reti

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        reti ;Analog Comparator

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        reti

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        reti ;ADC Conversion complete

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        reti

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        reti ;EE_RDY

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        reti

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        reti ;TWI

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        reti

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        reti ;SPM_RDY

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        reti

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        reti ;USART1 RX Complete

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        reti

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        reti ;USART1 UDR Empty

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        reti

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        reti ;USART1 TX Complete

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init:      ldi zl, low($0100)

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        ldi zh, high($0100)

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        ldi templ,low(ramend)

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        ldi temph,high(ramend)

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        ldi rmp,128

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ramreset:    st Z+,rmp

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        cp zl,templ

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        cp zh,temph

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        brlo ramreset

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        ldi rmp,HIGH(RAMEND)   

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              out SPH,rmp

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        ldi rmp,LOW(RAMEND)

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        out SPL,rmp

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        ldi rmp,1

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        sts ubrr0l,rmp

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        clr rmp

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        sts ubrr0h,rmp

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        ldi rmp,0b01011000  ;rx compete IE, Txcomplete IE,UDR empty IE, RXE,TXE,size,not used

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        sts ucsr0b,rmp

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        ldi rmp,0b00001110  ; asynchronus,no parity, 2stoppbit,8bit,polarity

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        sts ucsr0C,rmp

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        ldi rmp,0b00000000  ; no pwm no oc

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        out TCCR0A,rmp

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        ldi rmp,0b00000010  ; no pwm no oc prescaler 8

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        out TCCR0B,rmp

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        ldi rmp,83

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        out ocr0a,rmp

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        clr status

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        clr XL

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        clr XH

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        ldi rmp,0b00000010

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        out ddrd,rmp

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        sbr status,1<<start

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        lds rmp,udr0

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        sei

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loop:      rcall dmxsend

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        rjmp loop

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dmxsend:     sbrc status,brk

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        ret

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        sbrs status,start

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        rjmp dmxsend1

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        cbr status,1<<start

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        ldi XL,low(ch0out)

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        ldi XH,high(ch0out)

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        ldi rmp,(1<<TXC0)

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        sts UCSR0A,rmp

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        lds rmp,udr0

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dmxsend1:    lds rmp,ucsr0a

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        sbrs rmp,udre0

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        ret

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        ldi templ,low(ch512out)

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        ldi temph,high(ch512out)

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        cp xl,templ

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        cpc xh,temph

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        brsh makebrake

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        ld rmp,x+

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        sts udr0,rmp

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        ret

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makebrake:     sbr status,1<<brk

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        ret

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;******************************TX Complete Intr. (Breakon)**************************************

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breaksend:    push rmp

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        in rmp,sreg

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        push rmp

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        out tcnt0,rmp    ;Timer auf null setzen

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        ldi rmp,0b00000010  ;OC0a Intr enablen

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        sts timsk0,rmp

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        ldi rmp,0b00000111

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        out tifr0,rmp

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        pop rmp

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        out sreg,rmp

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        pop rmp

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        reti

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;*****************************OC0A Intr. (Breakoff) ********************************************

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breakend:    push rmp

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        in rmp,sreg

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        push rmp

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        cbr status,1<<brk

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        sbr status,1<<start

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        ldi rmp,0b00000000

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        sts timsk0,rmp

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        pop rmp

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        out sreg,rmp

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        pop rmp

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        reti