main.asm


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  cpu  atmega8
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  include  /home/nutzer/eigene/prj/avr/asl/appnotes/tn13Adef.asm
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  include  /home/nutzer/eigene/prj/avr/inc/hilo.asm
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  segment data
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  org sram_start
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ctr_byte:
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  res  1
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  segment code
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  rjmp  isr_reset
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  rjmp  isr_ext_int0
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  rjmp  isr_pcint0
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  rjmp  isr_tim0_ovf
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  rjmp  isr_ee_rdy
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  rjmp  isr_ana_comp
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  rjmp  isr_tim0_compa
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  rjmp  isr_tim0_compb
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  rjmp  isr_watchdog
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  rjmp  isr_adc
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isr_ext_int0:
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isr_pcint0:
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isr_tim0_ovf:
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isr_ee_rdy:
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isr_ana_comp:
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isr_tim0_compa:
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isr_tim0_compb
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isr_watchdog:
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isr_adc:
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  reti
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isr_reset:
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  ldi  r16,low(ramend)
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  out  spl,r16
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  ldi  r16,63  ;alles Ausgänge
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  out  ddrb,r16
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  ; wir nutzen R16-R19 als 32 Bit SRG
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  ; R20-R23 als Polynom
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  ; R24 als NULL-Dummy
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  ; http://www.xilinx.com/support/documentation/application_notes/xapp052.pdf
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  ; n=32, Rückführungen von 32,22,2,1
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  ldi  r20,3    ;Rückführung 2,1
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  ldi  r21,0
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  ldi  r22,0x20  ;Rückführung 22
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  ldi  r23,0x80  ;Rückführung 32
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  ldi  r24,0    ;Dummy für Leerzweig
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  ldi  r16,0xaa  ;Seed
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loop:
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  ror  R19
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  ror  R18
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  ror  r17
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  ror  r16
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  brcs  one
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  ;zero
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  eor  r16,r24
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  eor  r17,r24
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  eor  r18,r24
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  eor  r19,r24
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  ldi  r25,0b00111000
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  out  portb,r25
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  rjmp  loop
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one:
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  eor  r16,r20
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  eor  r17,r21
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  eor  r18,r22
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  eor  r19,r23
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  ldi  r25,0b00000111
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  out  portb,r25
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  rjmp  loop