1 | ----------------------------------------------------------------------------------
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2 | -- Company: www.Circuit-Break.de
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3 | -- Engineer: Jens Weiss
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4 | --
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5 | -- Create Date: 13:36:13 02/21/2024
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6 | -- Design Name:
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7 | -- Module Name: Parameter_memory - Behavioral
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8 | -- Project Name:
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9 | -- Target Devices:
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10 | -- Tool versions:
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11 | -- Description:
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12 | --
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13 | -- Dependencies:
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14 | --
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15 | -- Revision:
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16 | -- Revision 0.01 - File Created
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17 | -- Additional Comments:
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18 | --
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19 | ----------------------------------------------------------------------------------
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20 | library IEEE;
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21 | use IEEE.STD_LOGIC_1164.ALL;
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22 | use IEEE.NUMERIC_STD.ALL;
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23 |
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24 |
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25 | entity Parameter_memory is
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26 | Generic(ADRESSWIDTH : natural := 5; --memory depth = 2^ADDRESSWIDTH
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27 | DATAWIDTH : natural := 16);
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28 |
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29 | Port ( clk : in std_logic;
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30 | A : in std_logic_vector(ADRESSWIDTH-1 downto 0);
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31 | Dout : out std_logic_vector(DATAWIDTH-1 downto 0)
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32 | );
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33 | end Parameter_memory;
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34 |
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35 | architecture Behavioral of Parameter_memory is
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36 |
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37 | signal RomAddr : integer range 0 to (2**ADRESSWIDTH)-1;
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38 | type Rom is array (0 to (2**ADRESSWIDTH)-1) of signed (DATAWIDTH-1 downto 0);
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39 | constant Parameter_Rom : Rom := (
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40 | x"C0F8", -- Parameter: a1 | Adress: 00000
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41 | x"0000", -- Parameter: a2 | Adress: 00001
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42 | x"0000", -- Parameter: a3 | Adress: 00010
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43 | x"0000", -- Parameter: a4 | Adress: 00011
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44 | x"F6CE", -- Parameter: a5 | Adress: 00100
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45 | x"3F08", -- Parameter: b1 | Adress: 00101
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46 | x"0000", -- Parameter: b2 | Adress: 00110
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47 | x"0000", -- Parameter: b3 | Adress: 00111
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48 | x"0000", -- Parameter: b4 | Adress: 01000
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49 | x"2999", -- Parameter: b5 | Adress: 01001
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50 | x"0000", -- Parameter: c1 | Adress: 01010
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51 | x"0000", -- Parameter: c2 | Adress: 01011
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52 | x"0000", -- Parameter: c3 | Adress: 01100
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53 | x"0000", -- Parameter: c4 | Adress: 01101
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54 | x"0000", -- Parameter: d13 | Adress: 01110
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55 | x"0000", -- Parameter: d14 | Adress: 01111
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56 | x"20A8", -- Parameter: d15 | Adress: 10000
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57 | x"0000", -- Parameter: d24 | Adress: 10001
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58 | x"0000", -- Parameter: d25 | Adress: 10010
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59 | x"0000", -- Parameter: d35 | Adress: 10011
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60 | x"0000", -- Parameter: e21 | Adress: 10100
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61 | x"0000", -- Parameter: e31 | Adress: 10101
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62 | x"0000", -- Parameter: e32 | Adress: 10110
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63 | x"0000", -- Parameter: e41 | Adress: 10111
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64 | x"0000", -- Parameter: e42 | Adress: 11000
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65 | x"0000", -- Parameter: e43 | Adress: 11001
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66 | x"0000", -- Parameter: dummy | Adress: 11010
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67 | x"0000", -- Parameter: dummy | Adress: 11011
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68 | x"0000", -- Parameter: dummy | Adress: 11100
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69 | x"0000", -- Parameter: dummy | Adress: 11101
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70 | x"0000", -- Parameter: dummy | Adress: 11110
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71 | x"0000" -- Parameter: dummy | Adress: 11111
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72 | );
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73 |
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74 | begin
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75 | --BROM
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76 | process begin
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77 | wait until rising_edge(clk);
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78 | RomAddr <= to_integer(unsigned(A)); -- clocked address --> BRAM
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79 | end process;
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80 | Dout <= std_logic_vector(Parameter_Rom(RomAddr));
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81 |
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82 | end Behavioral;
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