LoRA am Vormarsch, PIC16/PIC18 mit FPGA, MOSFETs und Google

Einfache Installation: Im Vergleich zu komplexen optischen Datenübertragungssystemen wie Freistrahlsystem, die aufwendig ausgerichtet werden müssen oder teure optische Systeme benötigen (z.B. Beamsteering oder adaptive Optiken), lässt sich Grathus® flexibel und ohne Justierung installieren und betreiben. 

    • Neuartige, patentierte Mehrwegelinse: Sie erlaubt höhere Sendeleistungen und eine einfache Ausrichtung per Hand. 

    • Augensicherer Betrieb: Laserklasse 1 gewährleistet einen sicheren Einsatz.

. Die Technologie lässt sich ohne größere Umstellungen nahtlos in bestehende Anlagen und Netzwerke integrieren und unterstützt gängige Industriestandards wie Profinet, EtherCAT, EtherCAT G und SERCOS III aber auch neuartiges Time Sensitive Networking (TSN). Neben Ethernet/Gigabit‑Ethernet stehen USB 3.0/3.1 sowie kundenspezifische Interfaces zur Verfügung. Ein zusätzlicher Seitenkanal mit 1 Mbit/s unterstützt Management‑, Diagnose‑ und Sicherheitssignale.

. . .

Der Li-Fi Grathus® ist als Evaluierungskit erhältlich. Dieses »Ready-to-Use« Set ermöglicht es, eine kabelgebundene 1Gbps-Ethernet-Verbindung unkompliziert mittels Plug-and-Play durch eine optische Verbindung zu ersetzen und die Grundfunktionen der Technologie in der Praxis zu testen. Ein Kit beinhaltet zwei Grathus® Module, zwei Ethernet Kabel, Stromversorgung sowie ein Benutzerhandbuch und kann direkt über das Fraunhofer IPMS bezogen werden.

The OPC Foundation is pleased to announce a new joint working group effort with the LoRa Alliance to develop a mapping from LoRaWAN to OPC UA, bringing together two highly complementary technologies that play important roles in the future of industrial and IoT connectivity. This collaboration aims to define how data and information models originating from LoRaWAN-based devices and systems can be represented in OPC UA, enabling improved interoperability between low-power wide-area network (LPWAN) deployments and industrial automation, enterprise, and cloud-based systems.

LR2021 | PCN-001100 | Datasheet, Patch RAM & USP Update 

    A Product Change Notification (PCN-001100) has been issued, and the customers have been notified of refined sensitivity specifications across select LR2021 configurations. The updated datasheet v2.1 is now live on the LR2021 product page, featuring adjusted figures and forward-looking specifications for the upcoming LR2022 and LR2012.

    USP Feature v1.1.2  and USP Zephyr Feature v1.1.2 are now available on their dedicated GitHub branches, featuring an upgraded driver and expanded support for the LR2022 and LR2012.  Refer to the Changelog for full details.

    A new LR2021 driver with Patch RAM is now available on GitHub, delivering optimally tuned operational settings. We strongly recommend integrating the latest driver with PRAM across all applications. 

Refreshed LR2021 Reference Design 

    A refreshed LR2021 Reference Design is now available under the Documents tab on the LR2021 product page. Thoroughly tested and optimized, it ensures full regulatory compliance and strong receiver performance even with metal shielding installed over the RF section.  

v1.4.1 of LoRa® studio is now available on GitHub 

    Updated LR2021 drivers to latest integrating the Patch RAM

    Output power is now shown in dBm (supports 0.5 increment)

    Increase of maximum payload length for FLRC modulation

    Demo application improvements

Mit 105,2 Millionen Knoten hat EtherCAT die 100 Millionen Marke deutlich überschritten und seine marktführende Stellung im Bereich industrielle Echtzeit Ethernet Systeme weiter gefestigt. Im Jahr 2025 kamen 16,9 Millionen neue Knoten hinzu – ein klares Signal dafür, dass sich das Wachstum wieder beschleunigt.

Das Gutachten und die Zertifikate von UL Solutions bestätigen nach Prüfung gemäß IEC 62443 die Aussagen der ETG: Die EtherCAT-Technologie erfüllt bereits ohne Änderungen die Anforderungen an Systeme, die Angriffsstärken nach Security Level 2 ausgesetzt sind. IEC 62443, der internationale Standard für Cybersicherheit von industriellen Steuerungssystemen, wird in der europäischen Ausprägung auch die Grundlage für den European Cyber Resilience Act. Darüber hinaus zeigen die Untersuchungen, dass für höhere Sicherheitsanforderungen keine Hardwareänderungen notwendig sind – mit gezielten Softwareerweiterungen lassen sich auch höhere Security Levels auf Basis des EtherCAT Systems erreichen.

The new device families offer the option to automatically load the CLB at power‑up or reset, allowing the logic to initialize independent of the CPU, supporting predictable startup behavior that may be required in functional safety, industrial and automotive systems.

The PIC16F13276 family has 32 logic elements and the PIC18‑Q35 family has 128 logic elements, enabling engineers to implement parallel, deterministic logic alongside embedded control on a single chip. This integrated approach can replace separate CPLD and MCU designs, reducing bill of materials (BOM), board space and overall system cost and complexity.

PIC16F13276 MCUs are available starting at $0.32 at volume and the PIC18‑Q35 devices are available starting at $0.62 at volume.

DRAM market conditions continue to fluctuate, creating sourcing challenges for embedded system designers. Dependencies on discrete DRAM, including DDR2, DDR3, and DDR4, can introduce pricing swings, allocation risks and procurement complexity.

Our MPU System-in-Package (SiP) portfolio integrates DRAM directly alongside the processor, offering a streamlined hardware architecture that helps reduce exposure to discrete memory market variability.

--- via https://www.microchip.com/en-us/products/microprocessors/32-bit-mpus/sip-and-som/system-in-package

Highlights of this release

    • New audiotools.SpeedChanger. 

    • New qspibus support for displayio. 

    • Stability improvements to USB SD card handling. 

    • Merge of MicroPython v1.27. 

    • Update to ESP-IDF v5.5.3. 

    • Many additions to the Zephyr port. 

    • Simulated hardware testing is now being done in the Zephyr port. 

--- via https://github.com/adafruit/circuitpython/releases/tag/10.2.0-rc.0

New policies

    We're introducing the Contacts Permissions policy to govern broad access of users' contacts. Apps that don't need broad access must use the Android Contact Picker, a more secure, easy-to-integrate alternative that minimizes data collection and improves user safety.

    To ensure a safe and trusted ecosystem, we're introducing the Account Transfer policy to require developers to use the official "Transfer ownership" workflow within the Play Console. If eligible, use this process to transfer your developer account. 

Updated policies

    To better protect user privacy, we're updating our Location Permissions policy. We're introducing the location button as the recommended minimum scope for precise location in line with our user data and sensitive permissions requirements.

    We're removing geofencing as an approved foreground services use case. Developers can instead use the Geofence API for this use case.

 ROHM began supporting the bare dies business with 5th Generation SiC MOSFETs in 2025 and completed development in March 2026. Furthermore, starting from July 2026, ROHM will provide samples of discrete devices and modules incorporating 5th Generation SiC MOSFETs.

This release is the most feature packed yet with over 150 commits to our main repo alone. We added Go 1.26 support to keep you up to date with the latest work from the mothership. We also have many improvements to our developer tooling and compatibility. And some big additions when it comes to hardware support, with ESP32 wireless, and the new Arduino UNO Q board too.

A interesting feature/use case is that you would like to simulate the dynamic temperature dependence of a MOSFET™ in your new DC-DC converter design, just to make sure your Mosfet is still operating in SOA (safe operating area). Now with InfineonSpice and with the support of our device spice models (e.g. our application optimized OptiMOS™ 7) you can evaluate before the start your hardware design.

. This update focuses on a major overhaul of the road-type system, the introduction of experimental traffic data support, and substantial performance optimizations for both the makemap tool and the routing engines.

A vulnerable scenario arises when an application executes an AVX or SSE division instruction, e.g., the AVX instruction vdivss xmm3, xmm1, xmm2, and its operands (xmm1 and xmm2) contain confidential information. Now assume an attacker can execute code on the same system, for example, by running their own application or by executing JavaScript code in a browser. The attacker then issues another AVX division instruction, e.g., another vdivss xmm3, xmm1, xmm2. To trigger the leakage reliably, the attacker picks denormal numbers as operands, e.g., picking xmm1 and xmm2 as 0x1 (raw value), which represents the floating point value 1.40129846432481707092e-45. Executing the division with such operands triggers a microcode assist, which opens a transient window in which the attacker can transiently encode and thus leak the result of the division instruction, for example, using a cache covert channel.