1 | /*
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2 | * Copyright (c) 2009 Andrew Smallbone <andrew@rocketnumbernine.com>
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3 | *
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4 | * Permission is hereby granted, free of charge, to any person obtaining a copy
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5 | * of this software and associated documentation files (the "Software"), to deal
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6 | * in the Software without restriction, including without limitation the rights
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7 | * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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8 | * copies of the Software, and to permit persons to whom the Software is
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9 | * furnished to do so, subject to the following conditions:
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10 | *
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11 | * The above copyright notice and this permission notice shall be included in
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12 | * all copies or substantial portions of the Software.
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13 | *
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14 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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15 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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16 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
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17 | * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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18 | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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19 | * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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20 | * THE SOFTWARE.
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21 | */
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22 | #ifndef _spi_h__
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23 | #define _spi_h__
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24 |
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25 | #include <avr/io.h>
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26 |
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27 | #ifdef __cplusplus
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28 | extern "C"{
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29 | #endif
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30 |
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31 | // create alias for the different SPI chip pins - code assumes all on port B
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32 | #if (defined(__AVR_AT90USB82__) || defined(__AVR_AT90USB162__))
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33 | #define SPI_SS_PIN PORTB0
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34 | #define SPI_SCK_PIN PORTB1
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35 | #define SPI_MOSI_PIN PORTB2
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36 | #define SPI_MISO_PIN PORTB3
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37 | #elif (defined(__AVR_ATmega48__) || defined(__AVR_ATmega88__) || defined(__AVR_ATmega168__) || defined(__AVR_ATmega328__) || defined(__AVR_ATmega328P__) || defined(__AVR_ATmega8__))
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38 | #define SPI_SS_PIN PORTB2
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39 | #define SPI_SCK_PIN PORTB5
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40 | #define SPI_MOSI_PIN PORTB3
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41 | #define SPI_MISO_PIN PORTB4
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42 | #else
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43 | #error unknown processor - add to spi.h
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44 | #endif
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45 |
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46 | // SPI clock modes
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47 | #define SPI_MODE_0 0x00 /* Sample (Rising) Setup (Falling) CPOL=0, CPHA=0 */
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48 | #define SPI_MODE_1 0x01 /* Setup (Rising) Sample (Falling) CPOL=0, CPHA=1 */
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49 | #define SPI_MODE_2 0x02 /* Sample (Falling) Setup (Rising) CPOL=1, CPHA=0 */
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50 | #define SPI_MODE_3 0x03 /* Setup (Falling) Sample (Rising) CPOL=1, CPHA=1 */
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51 |
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52 | // data direction
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53 | #define SPI_LSB 1 /* send least significant bit (bit 0) first */
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54 | #define SPI_MSB 0 /* send most significant bit (bit 7) first */
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55 |
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56 | // whether to raise interrupt when data received (SPIF bit received)
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57 | #define SPI_NO_INTERRUPT 0
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58 | #define SPI_INTERRUPT 1
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59 |
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60 | // slave or master with clock diviser
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61 | #define SPI_SLAVE 0xF0
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62 | #define SPI_MSTR_CLK4 0x00 /* chip clock/4 */
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63 | #define SPI_MSTR_CLK16 0x01 /* chip clock/16 */
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64 | #define SPI_MSTR_CLK64 0x02 /* chip clock/64 */
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65 | #define SPI_MSTR_CLK128 0x03 /* chip clock/128 */
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66 | #define SPI_MSTR_CLK2 0x04 /* chip clock/2 */
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67 | #define SPI_MSTR_CLK8 0x05 /* chip clock/8 */
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68 | #define SPI_MSTR_CLK32 0x06 /* chip clock/32 */
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69 |
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70 |
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71 |
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72 | // setup spi
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73 | void setup_spi(uint8_t mode, // timing mode SPI_MODE[0-4]
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74 | int dord, // data direction SPI_LSB|SPI_MSB
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75 | int interrupt, // whether to raise interrupt on recieve
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76 | uint8_t clock); // clock diviser
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77 |
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78 | // disable spi
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79 | void disable_spi(void);
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80 |
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81 | // send and receive a byte of data (master mode)
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82 | uint8_t send_spi(uint8_t out);
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83 |
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84 | // receive the byte of data waiting on the SPI buffer and
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85 | // set the next byte to transfer - for use in slave mode
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86 | // when interrupts are enabled.
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87 | uint8_t received_from_spi(uint8_t out);
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88 |
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89 | #ifdef __cplusplus
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90 | } // extern "C"
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91 | #endif
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92 |
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93 | #endif
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