support circuitry is required for microprocessor interfacing. 1 of 9 NOT RECOMMENDED FOR NEW DESIGNS DS1220Y READ MODE The DS1220Y executes a read cycle whenever WE (Write Enable) is inactive (high) and CE (Chip Enable) and OE (Output Enable) are active (low). The unique address specified by the 11 address
ZEROPOWER® RAM is a 2 K x 8 non-volatile static RAM which is pin and function compatible with the DS1220. A special 24-pin, 600 mil DIP CAPHAT™ package 24 houses the M48Z02/12 silicon with a long-life lithium button cell to form a highly integrated 1 battery-backed memory solution. PDIP 24.7 The M48Z02
