-
Datei
main.c
if defined (NUCLEO_BOARD) # if defined (STM32F401RE) // STM32F401 Nucleo Board @84MHz # define TIM_CLK 84000000L // 84 MHz # define TIM_PERIOD 7 # elif defined (STM32F411RE) // STM32F411 Nucleo Board @100MHz # define TIM_CLK 100000000L // 100
-
Bild
Software-Menü für WordClock Projekt
Overlays Ambilight Timers DFPlayer Files Update Local Update Main Name Value RTC online Processor STM32F401CC EEPROM online Oscillator 25 MHz 84MHz Hardware WS2812 GRB Display 3.1.2 Version ESP8266 version 3.1.2 YYYY MM DD hh mm Action 2025 11 03 11 49 Save Ticker Power On Ambilight Power On Learn IR remote control Power Off Ambilight Power Off EEPROM dump Reset STM32 Reset EEPROM
in „WordClock mit WS2812“ · Projekte & Code · · Screenshots
-
Bild
Elektronikkomponenten und Module auf weißem Untergrund
ESP32+Wroom-32 Bluetooth + WLAN Pinleiste MCU STM32 F401 CNL-Shield Arduino Clone LDR SS28
in „Wanderkiste Widlar VIII“ · Markt · · Fotos
-
Bild
Drei STM32 Nucleo Development Boards
NUCLEO-F446RE, NUCLEO-F767ZI, NUCLEO-F401RE, ST, www.st.com/stm32nucleo
in „[V] Diverse STM32 Nucleo Boards“ · Markt · · Platinenfotos
-
PDF
Lattice_Timing_Closure.pdf
ROUTE 3 4.914 R89C27C.Q0 to R91C45D.D1 U_core/rx_tu_mode_2 CTOF_DEL --- 0.180 R91C45D.D1 to R91C45D.F1 U_core/ddwr_stm8/SLICE_36645 ROUTE 1 0.312 R91C45D.F1 to R91C45D.D0 U_core/payload_we17_tz_tz CTOF_DEL --- 0.180 R91C45D.D0 to R91C45D.F0 U_core/SLICE_36645 ROUTE 5 0.741 R91C45D.F0 to R89C48D.B0 U_core
in „IO constraints für asynchrone Inputs in Lattice Diamond“ · FPGA, VHDL & Co. ·