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PDF
pic18f2320.pdf
Up to 2 Capture/Compare/PWM (CCP) modules: - Sleep: CPU off, peripherals off - Capture is 16-bit, max. resolution is 6.25CY/16) Power Consumption modes: - Compare is 16-bit, max. resolution is 100 CY )T - PRI_RUN: 150 µA, 1 MHz, 2V - PWM output: PWM resolution is 1 to 10-bit - PRI_IDLE: 37 µA, 1 MHz
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Datei
Noname.map.txt
Middlewares/MotorControl/speed_torq_ctrl.o 0x00000000080054ce STC_GetMecSpeedRefUnitDefault .text.STC_GetMaxAppPositiveMecSpeedUnit 0x00000000080054d4 0x4 Middlewares/MotorControl/speed_torq_ctrl.o 0x00000000080054d4 STC_GetMaxAppPositiveMecSpeedUnit .text.STC_GetMinAppNegativeMecSpeedUnit 0x00000000080054d8
in „Problem mit STM32F103 und RAM-Größe“ · Mikrocontroller und Digitale Elektronik ·
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PDF
MC9S08MM128RM.pdf
Divider Settings Bus PRDIV8 DIV fFCLK Program/Erase Timing Pulse (Binary) (Decimal) (5 s Min, 6.7s Max) 20 MHz 1 12 192.3 kHz 5.2 s 10 MHz 0 49 200 kHz 5 s 8 MHz 0 39 200 kHz 5 s 4 MHz 0 19 200 kHz 5 s 2 MHz 0 9 200 kHz 5 s 1 MHz 0 4 200 kHz 5 s 200 kHz 0 0 200 kHz 5 s 150 kHz 0 0 150 kHz 6.7
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PDF
RCDN9.pdf
) Alarm： Once alarm/Everyday alarm：One system each FM S/N ratio： Monaura：l 70dB Sleep： Sleep timer：Max. 90 minutes Stereo：70dB n nGeneral FM THD+N （1kHz） ：Monaura： l 0.4% Stereo：0.4% Power supply： (for E2)： AC 230 V, 50 Hz / 60Hz (for E1C)： AC 220V, 50Hz (for JP)： AC 100V, 50/60Hz Power consumption：
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PDF
PIC16F1939.pdf
Period Register, Prescaler and Postscaler • Two Capture, Compare, PWM Modules (CCP): - 16-bit Capture, max. resolution 125 ns - 16-bit Compare, max. resolution 125 ns - 10-bit PWM, max. frequency 31.25 kHz • Three Enhanced Capture, Compare, PWM modules (ECCP): - 3 PWM time-base options - Auto-shutdown and
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PDF
stm32l431_reference_manual.pdf
key[191:160]) . . . . . . . . . . . . . . . . 615 24.14.15 AES key register 6 (AES_KEYR6) (key[223:192]) . . . . . . . . . . . . . . . . 615 24.14.16 AES key register 7 (AES_KEYR7) (MSB: key[255:224]) . . . . . . . . . . . 615 24.14.17 AES Suspend registers (AES_SUSPxR) (x = 0..7) . . . . . . . . . .
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PDF
stm32l431_reference_manual.pdf
key[191:160]) . . . . . . . . . . . . . . . . 615 24.14.15 AES key register 6 (AES_KEYR6) (key[223:192]) . . . . . . . . . . . . . . . . 615 24.14.16 AES key register 7 (AES_KEYR7) (MSB: key[255:224]) . . . . . . . . . . . 615 24.14.17 AES Suspend registers (AES_SUSPxR) (x = 0..7) . . . . . . . . . .
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PDF
stm32l431_reference_manual.pdf
key[191:160]) . . . . . . . . . . . . . . . . 615 24.14.15 AES key register 6 (AES_KEYR6) (key[223:192]) . . . . . . . . . . . . . . . . 615 24.14.16 AES key register 7 (AES_KEYR7) (MSB: key[255:224]) . . . . . . . . . . . 615 24.14.17 AES Suspend registers (AES_SUSPxR) (x = 0..7) . . . . . . . . . .
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Reference_Manual.pdf
5.2 Power supply supervisor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 192 5.2.1 Power-on reset (POR) / power-down reset (PDR) / brown-out reset (BOR) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 192 5.2.2 Programmable
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PDF
STM8_Programming_Manual.pdf
190 17.7.5 Interrupt enable register (TIM1_IER) . . . . . . . . . . . . . . . . . . . . . . . . . . 192 17.7.6 Status register 1 (TIM1_SR1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 193 17.7.7 Status register 2 (TIM1_SR2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
in „STLINK V2 und China Boards“ · Mikrocontroller und Digitale Elektronik ·
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PDF
64F3048F16-Hitachi.pdf
Exit from Software Standby Mode. Bit 6 Bit 5 Bit 4 STS2 STS1 STS0 Description 0 0 0 Waiting time = 8,192 states (Initial value) 0 0 1 Waiting time = 16,384 states 0 1 0 Waiting time = 32,768 states 0 1 1 Waiting time = 65,536 states 1 0 0 Waiting time = 131,072 states 1 0 1 Waiting time = 1,024 states
in „CPU Melkanlage auslesbar? 64F3059F16“ · Mikrocontroller und Digitale Elektronik ·
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PDF
siplace-s27hm.pdf
. . . . 189 6.13.2 Replacing the stepping motor of the width adjustment system (00367174-02). . . 192 6.13.3 Replacing a toothed belt for the drive of the width adjustment system (00356841-01) 194 6.13.4 Replacing the limit switches for the end position of the width adjustment system (00365108-02) 197
in „Siplace 80 Potentialverteiler“ · Mikrocontroller und Digitale Elektronik ·
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Datei
EMS_Adapter.xml
gp10dK1Roo7CrAKqIEAHozptoOBhKiXT2hZCbsT2Z/5+KJwq0cn5np38cOTo0+7h/59ICYBipi5gs/k7MLmUXGYKf4nhfrevw9gnP5oecQMSDlLAGE97a192PgAsZyp89qTYfCSuqK2ktklPhjTcfO+7HUS7nyuQMyQjw8p7/cnMpJPDm5wY9/SymTjrY7o2zp8NqTiPX06KMHEb3RoFlk8NWQFXYVVIkMleVonxgkKx5PLl5EARphQptD3iMt3Sc3M/bTIht/mn9O9oZpCO/1K+QqopzeGeXwaYJgoEVtPZ2hQcyiDvLAiRbmL5Q/wGFJuIpHf
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Datei
EMS_Adapter.xml
gp10dK1Roo7CrAKqIEAHozptoOBhKiXT2hZCbsT2Z/5+KJwq0cn5np38cOTo0+7h/59ICYBipi5gs/k7MLmUXGYKf4nhfrevw9gnP5oecQMSDlLAGE97a192PgAsZyp89qTYfCSuqK2ktklPhjTcfO+7HUS7nyuQMyQjw8p7/cnMpJPDm5wY9/SymTjrY7o2zp8NqTiPX06KMHEb3RoFlk8NWQFXYVVIkMleVonxgkKx5PLl5EARphQptD3iMt3Sc3M/bTIht/mn9O9oZpCO/1K+QqopzeGeXwaYJgoEVtPZ2hQcyiDvLAiRbmL5Q/wGFJuIpHf
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tFXKSKyORc24h2V2.pdf
J156,J162,J165,J194,J 195,J234,J265,J300,J311,J313,J 074,J082,J092,J093,J097,J158,J 170,J171,J177,J192,J205,J213,J 214,J219,J263,J264,J272,J278,J 279,J282,J315,J317,J319,J321,J0 L502,L503,L504,L505,L506, L507,L508,L509,L510, BEAD CORE(K5B RH 3.5*7.5*0.8-T52-01,80Ω/100MHz) 415-HV3500K-090V 9 IC501, MIX
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PDF
8020rev26.pdf
drive, such as the control field and MSF addresses. The data rate of each sub-channel (P, Q, etc.) is 1/192nd of that of the main channel. 3.3.47 TOC The table of contents has information on the type of disc and the starting address of the tracks. This information is encod- ed in the Q sub-channel. 3.3.48
in „CD-ROM Laufwerk“ · Mikrocontroller und Digitale Elektronik ·
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PDF
INF-8020.pdf
drive, such as the control field and MSF addresses. The data rate of each sub-channel (P, Q, etc.) is 1/192nd of that of the main channel. 3.3.47 TOC The table of contents has information on the type of disc and the starting address of the tracks. This information is encod- ed in the Q sub-channel. 3.3.48
in „ATAPI Packet Commands“ · Mikrocontroller und Digitale Elektronik ·
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Teileliste-04-18-2233.html
3.948cm; " class="ce7"><p>SO-16</p></td><td style="text-align:left;width:3.731cm; " class="ce7"><p>MAX 232 ECSE</p></td><td style="text-align:left;width:2.776cm; " class="ce7"> </td><td style="text-align:left;width:3.157cm; " class="ce7"> </td><td style="text-align:right; width:1.879cm; " class="ce7"
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PDF
PIC18f6622.pdf
17-3: (T4CON). FOSC logFPWM- 5. Configure the CCPx module for PWM operation. PWM Resolution (max) = ---------bits log(2) Note: If the PWM duty cycle value is longer than the PWM period, the CCPx pin will not be cleared. TABLE 17-3: EXAMPLE PWM FREQUENCIES AND RESOLUTIONS AT 40 MHz PWM Frequency
in „PIC 18F6622 Zeit um EEPROM zu schreiben“ · Mikrocontroller und Digitale Elektronik ·
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PDF
PIC_18F8722_Data_Sheet.pdf
17-3: (T4CON). ⎛FOSC ⎞ log⎝FPWM-⎠ 5. Configure the CCPx module for PWM operation. PWM Resolution (max) = ---------bits log(2) Note: If the PWM duty cycle value is longer than the PWM period, the CCPx pin will not be cleared. TABLE 17-3: EXAMPLE PWM FREQUENCIES AND RESOLUTIONS AT 40 MHz PWM Frequency
in „PIC 18F6527 mit 32MHz Takten“ · Mikrocontroller und Digitale Elektronik ·
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panasonic_tx-50dx800e_tx-50dxw804_chassis_la67.pdf
HDAVI Control 5” function. DIGITAL AUDIO OUT PCM / Dolby digital, Fibre optic USB 1/2/3 USB1 :DC 5V, Max 900mA [SuperSpeed USB (USB 3.0)] USB2/3 :DC 5V, Max 500mA [Hi-Speed USB (USB 2.0)] ETHERNET RJ45, IEEE802.3 10BASE-T / 100BASE-TX CARD SLOT Common interface slot (Complies with CI+) x 2 Wireless LAN
in „Schaltregler SMD Marking“ · Analoge Elektronik und Schaltungstechnik ·
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PDF
rm0444-stm32g0x1-advanced-armbased-32bit-mcus-stmicroelectronics.pdf
. . . . . . . . . . . 966 Table 173. Examples of TIMEOUTA settings for various I2CCLK frequencies (max t TIMEOUT = 25 ms) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 967 Table 174. Examples of TIMEOUTB settings for various I2CCLK frequencies . .
in „Problem mit Clock Configuration beim STM32G031“ · Mikrocontroller und Digitale Elektronik ·
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PDF
R8C22-23_Group_Hardware_Manual.pdf
clock Period of CPU clock Following total (flash memory time is the time operates) × 12 cycles + 30µs (max.) × 6 cycles × 20 cycles from wait mode until an interrupt 1 Period of system clock (flash memory × 12 cycles Same as above Same as above routine is stops) executed. T1 T2 T3 Flash memory activation
in „Fragen zu Renesas µC (R5F2122CKFP)“ · Mikrocontroller und Digitale Elektronik ·
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PDF
H83003H.PDF
Features (cont) Feature Description Operating modes Four MCU operating modes Address Address Initial Bus Max. Bus Mode Space Pins Width Width Mode 1 1 Mbyte A to A 8 bits 16 bits 0 19 Mode 2 1 Mbyte A 0to A19 16 bits 16 bits Mode 3 16 Mbyte A 0to A23 8 bits 16 bits Mode 4 16 Mbyte A 0to A23 16 bits 16 bits
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PDF
R32C-152_Users_Manual.pdf
bytes 16 bytes SADRi IADR CADR IADR CADR 20 bytes 20 bytes 20 bytes DADRi IADR i = 1 to 7 24 bytes max. 60 bytes (when i = 7) R01UH0220EJ0120 Rev.1.20 Page 191 of 642 Sep 10, 2013 R32C/152 Group 13. DMAC II (1) Transfer Mode (MOD) When multiple transfer is not selected (MULT = 0) b15 b8 b7 b0 00000000
in „Keine UART Programmierung bei R32C möglich“ · Mikrocontroller und Digitale Elektronik ·
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Datei
avrdude_out.txt
Size #Pages MinW MaxW ReadBack ----------- ---- ----- ----- ---- ------ ------ ---- ------ ----- ----- --------- hfuse 0 0 0 0 no 1 0 0 9000 9000 0x00 0x00 Block Poll Page Polled Memory Type Mode Delay Size Indx Paged Size
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PDF
rej09b0101_16c29hm_2_.pdf
2007 page 36 of 458 REJ09B0101-0112 M16C/29 Group 5. Resets VCC ROC td(P-R) More than td(ROC) RESET Max. 2 ms CPU clock: 28 cycles CPU clock FFFFC16 Content of reset vector Address FFFFE16 Figure 5.2 Reset Sequence ____________ Table 5.1 Pin Status When RESET Pin Level is “L” Pin name Status P0 to P3,
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WaMa_Lavamat_L5412_ewm1000.pdf
of the programme selector (right or left of the buttons) ª Number and configuration of the buttons (max. 8) ª ON/OFF switch: incorporated in the programme selector or with separated button Version with left selector and incorporated ON/OFF button Alpha-Rim Sigma Club Display Delta Version with left selector
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PDF
slau144i.pdf
ADDA #1,R7 ; Increment R7 JZ Label4 ; Zero reached: Go to Label4 ... ; R7 not equal 0. Continue here. 192 CPUX SLAU144I–December 2004–Revised January 2012 Submit Documentation Feedback Copyright © 2004–2012, Texas Instruments Incorporated www.ti.com Instruction Set Description 4.6.2.26 JGE JGE Jump if greater
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Datei
report_all.txt
N23 has no load. INFO:LIT:395 - The above info message is repeated 669 more times for the following (max. 5 shown): N24, N25, N26, N27, N28 To see the details of these info messages, please use the -detail switch. INFO:MapLib:562 - No environment variables are currently set. INFO:LIT:244 - All of the single
in „Place and Route partially locked IO bus“ · FPGA, VHDL & Co. ·
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PDF
PIC32MX3XX_Data_Sheet.pdf
prefetch cache is aborted due to a non-sequential instruction fetch, load or store. DS61143E-page 192 Preliminary © 2008 Microchip Technology Inc. PIC32MX3XX/4XX 9.3 Prefetch Configuration The CHECON register controls the configurations TABLE 9-2: PROGRAM DATA CACHE available for instruction and data
in „PIC32 und Assembler“ · Mikrocontroller und Digitale Elektronik ·
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Datei
report_map.txt
N23 has no load. INFO:LIT:395 - The above info message is repeated 669 more times for the following (max. 5 shown): N24, N25, N26, N27, N28 To see the details of these info messages, please use the -detail switch. INFO:MapLib:562 - No environment variables are currently set. INFO:LIT:244 - All of the single
in „Place and Route partially locked IO bus“ · FPGA, VHDL & Co. ·
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PDF
slau144j.pdf
memory range. SUBA #1,R7 ; Decrement R7 JN Label4 ; R7 < 0: Go to Label4 ... ; R7 >= 0. Continue here. 192 CPUX SLAU144J–December 2004–Revised July 2013 Submit Documentation Feedback Copyright © 2004–2013, Texas Instruments Incorporated www.ti.com Instruction Set Description 4.6.2.30 JNC, JLO JNC Jump if
in „MSP430 Gleitkommazahl in Flash speichern“ · Mikrocontroller und Digitale Elektronik ·
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PDF
family_guide.pdf
memory range. SUBA #1,R7 ; Decrement R7 JN Label4 ; R7 < 0: Go to Label4 ... ; R7 >= 0. Continue here. 192 CPUX SLAU144J–December 2004–Revised July 2013 Submit Documentation Feedback Copyright © 2004–2013, Texas Instruments Incorporated www.ti.com Instruction Set Description 4.6.2.30 JNC, JLO JNC Jump if
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