. DDC functions only require a modest amount of FPGA sili- M1 20 20 20 I 16 x(n) M2 Q f = 52 MHz s DDS f1= 1.0833 MHz f1= 541.666 kHz f = 271.833 kHz Figure 29: Digital down converter for GSM applications. A CIC decimator is employed to adjust the system sample rate to match the GSM channel bandwidth
;Programm passend zu der Hardware:DDS7 ;DDS- arbeitet nur mit MSB des 24-Bit Phasenakku, ohne AD-Wandler mit lookup. dadurch nur 6 Takte loop-Dauer ;PD7 liefert Rechteckspannung als Oszillatorsignal ;zwei Ausgänge des Oszillators, zur Entkopplung
;Programm DCF-DDS1, passend zu der Hardware atiny13 ;DDS- arbeitet nur mit MSB des 24-Bit Phasenakku, ohne AD-Wandler mit bittransfer dadurch nur 8 Takte loop-Dauer ;PB4 liefert Rechteckspannung als Oszillatorsignal
at 50.255+MHz (FE-5680A Option 01). Another version uses a factory-set direct digital synthesizer (DDS) in the output interface allowing virtually any user specified output frequency from 1 Hz to 20 MHz for square wave and sine wave. The standard sinusoidal frequency generated by the RFS is 10 MHz. The
V TC 200 ppm/∞C OUT DC Accuracy Integral Nonlinearity ±1.0 LSB Differential Nonlinearity ±0.5 LSB DDS SPECIFICATIONS Dynamic Specifications Signal-to-Noise Ratio 55 60 dB f = 25 MHz, f = f /4096 MCLK OUT MCLK Total Harmonic Distortion –66 –56 dBc fMCLK = 25 MHz, fOUT= fMCLK/4096 Spurious-Free Dynamic
DDS Signal Generator/Counter
KMOON
FY6800
14Bit
VCO
MOD
CH1:SINE ON
FREQ:00.0010.000'000KHz
AMPL:05.0000V
OFFS:00.0000V
DUTY:50.00%
PHAS:000.000°
AMPL
OFFS
DUTY
PHAS
WAVE MOD SWEEP
COUNTER VCO SYSTEM
FUNCTION
20 mW Power, 2.3 V to 5.5 V, 75 MHz Complete DDS AD9834 FEATURES Capability for phase modulation and frequency modulation is provided. The frequency registers are 28 bits; with a 75 MHz Narrow-bandSFDR>72dB 2.3Vto 5.5Vpowersupply clock rate, resolution
ANZEIGE Saegezahn 01000,0 Hz AUSGANG R-2R-Leiter, ungefiltert - nach Bessel-Filter 4.00 ms Fenster BEDIENUNG GROB AB FEIN AB FEIN AUF GROB AUF FORM Power off FREQUENZ 1000.0 Hz Signalform 3.5x MCU-Takte 158.5 M Tasten: Z --- X --- C + V ++ Leertaste Signalform. Gedrückt halten wiederholt, wie am echten Gerät.
Setup min ns To DBCLK Rising DLH DLRCLK Hold min ns From DBCLK Rising DDS DSDATA Setup min ns To DBCLK Rising DDH DSDATA Hold min ns From DBCLK Rising REV. PrC –3– PRELIMINARY TECHNICAL DATA AD1836–SPECIFICATIONS TIMING(continued) Parameter Min Max Unit Comments ADC Serial
Setup min ns To DBCLK Rising DLH DLRCLK Hold min ns From DBCLK Rising DDS DSDATA Setup min ns To DBCLK Rising DDH DSDATA Hold min ns From DBCLK Rising REV. PrC –3– PRELIMINARY TECHNICAL DATA AD1836–SPECIFICATIONS TIMING(continued) Parameter Min Max Unit Comments ADC Serial
0 C102 C103 C112 C113 C122 C123 R R R R 1 1 Transfer 3 4 3 4 5 6 C100 C101 C110 C111 C120 C121 RF DDS Switch In R R R L L L 1 1 1 0 1 2 0 0 0 J120 P100 1 0 1 1 2 2 2 2 0 2 0 R111 2 0 R121 a b R123 4 R101 Relay leads MUST be strain relieved while being bent!!! T O Both jumpers are on the other side over
0 C102 C103 C112 C113 C122 C123 R R R R 1 1 Transfer 3 4 3 4 5 6 C100 C101 C110 C111 C120 C121 RF DDS Switch In R R R L L L 1 1 1 0 1 2 0 0 0 J120 P100 1 0 1 1 2 2 2 2 0 2 0 R111 2 0 R121 a b R123 4 R101 Relay leads MUST be strain relieved while being bent!!! T O Both jumpers are on the other side over
DDS Signal Generator/Counter JDS6600 CH1= Sine ON 00'010'000.00 Hz 05.000 V OFFS: 0.00V DUTY: 50.0% FREQ AMPL OFF DUTY PHAS CH2= Sine ON FREQ:00'010'000.00 Hz AMPL:05.000V DUTY:50.0% OFFS: 0.00V PHAS:000.0
Tuning Word
Precision Sinus DDS with 2 Point Interpolation for Audio Applications
www.96khz.org
Phase Accumulator
Frequency based Phase Compensation
set granularity
Phase Slice
add offset
Phase Adder
separate values
phase, upper slice
$baud = 38400 ' ********************** hier noch deinen crystal rein $crystal = 8000000 $regfile = "m88def.dat" $hwstack = 50 $swstack = 50 $framesize = 50 Dim Table(257) As Byte At $200 Dim Sintable(256) As Eram Byte At $00 Dim Tritable(256) As Eram Byte At $100 Const Gradschritt = 0.02453125 ' 0.02464 Dim Sinwert As Single Dim Tempsingle As Single Dim J As Word Dim Wert As Byte Dim V As Byte ' ************************** serial port ********************** Config Serialin = Buffered , Size = 10 , Bytematch = 13 'Config Serialout = Buffered , Size = 10 Const Ident = "Phasegen" Const Command1 = "setsin
b = linspace(0, (pi/2), 1024); a = sin(b); a = round((a*2^31)); i = [0 : 1023]; fileID = fopen('sine_values.txt','w'); out_vec = linspace(0, 0, length(a)*2); out_vec(1 : 2 : length(a)*2) = i; out_vec(2 : 2 : length(a)*2) = a; fprintf(fileID, '%d => x"%08x",\n',out_vec); % fprintf made it hard for me to just output two single vectors in a row --> index "i" + "a" so out_vec has been built up as a workaround fclose(fileID);
7kHz
0,3kHz
Analysefilter-
auswahl
Alternativeingang
135...148 MHz
Hauptoszillator
86,3...160,3 MHz
DDS-Signal vom NWT
zum Detektoreingang NWT
Bild 2: Blockschaltbild und Zusammenwirken des SAV mit dem NWT
20 ns 160 Other Input IHV IL cycle t = 25 ns 140 cycle I CE = V , Other Input =or V 50 DDS1 Standby Current IH IH IL mA IDDS2 CE = VDD− 0.2 V, Other InpuDD=− 0.2 V or 0.2 V 4 CAPACITANCE (Ta = 25°C, f = 1 .0 MHz) SYMBOL PARAMETER TEST CONDITION MAX UNIT CIN Input Capacitance VIN= GND
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