-Red-LED-Display-Digital-Tube-/290972087487?pt=UK_BOI_Electrical_Components_Supplies_ET&hash=item43bf49b4bf Gruß Michael
Sendeleistung habe ich nicht gemessen, laut Aussage von Funkamateuren jedoch ca. 2-3W http://www.miklor.com/BF888/ http://hamgear.wordpress.com/2012/08/11/review-baofeng-bf-666s-bf-777s-bf-888s-and-look-alikes/ Mike schrieb im Beitrag #3559605: > Oliver Stellebaum schrieb: > Wenn die Leistungsangabe "<5W
dual diode cc 50V 0.1A JA BAV74 Mot B SOT23 dual sw diodes JBs BAR74 Sie C SOT23 fast sw diode 50V 0.25A JCs BAL74 Sie V SOT23 fast sw diode 50V 0.25A JFs BAL99 Sie V SOT23 fast sw diode 70V 0.25A JG BAR99 Sie E - fast sw diode 70V 0.25A JKs BF1009 Sie W SOT143 biased n-ch dg mosfet 1GHz 9V JLs BF1009S
Als JFET könnte ich dir den BF862 von NXP empfehlen. Den hab ich bei meinen Transimpedanzverstärkern auch verwendet. Welches Rauschen soll den niedrig sein, Strom oder Spannung?
Vielen Dank für die Infos von allen! Der BF862 scheint auch wenig Streuung zu haben. Jetzt müßte man ihn nur noch zur Hand haben. Mist. Ich wollte bei ca. 25KHz Vergleiche zu einem CMOS-Inverter machen. Die Source-Impedanz ist ca. 5pF. Bandbreite
SSPBUF = 0b00010001; // was auch immer du senden möchtest ins sspbuf register schreiben while(BF == 0); // warten bis er fertig damit ist spi_dummy = SSPBUF; // SSPBUF REGISTER AUSLESEN !!! BF = 0; // bf wieder auf 0 setzen SSPBUF = data; //das 2te byte ins sspbuf register schreiben while(BF == 0); // warten bis er fertig damit ist spi_dummy = SSPBUF; // SSPBUF REGISTER AUSLESEN !!! BF = 0; // bf wieder auf 0 setzen cs = 1; // chipselect wieder auf 1 (kommunikation beendet GIE
r24 } } } 89c: ff 91 pop r31 89e: ef 91 pop r30 8a0: bf 91 pop r27 8a2: af 91 pop r26 8a4: 9f 91 pop r25 8a6: 8f 91 pop r24 8a8: 6f 91 pop r22 8aa: 5f 91 pop r21 8ac: 4f 91 pop
wieder Angebote für Fräsmaschinen. In dem Fall hätte man aber Gestern noch bestellen müssen um die 25% Rabatt zu bekommen. Siehe Anhang.
mit weit mehr als 60W. http://www.pe1rki.com/watercooling.html http://www.pe1rki.com/MRFE6VP61K25HR5.html Du könntest das Design wahrscheinlich extrem vereinfachen.
dem LM13700 von TI. Im DB dazu sieht man z.B. in Fig. 23 wie ein VCA damit aufgebaut wird. In Fig. 25 das ganze dann auch in Stereo. Oder in Fig. 28 gar als AGC beschaltet, was für Dich evtl. ganz praktisch sein könnte.
Forum gefunden: Ein Schaltplan mit einer Sperrschicht-FET AGC, FET ist ein, leicht zu bekommender, BF244B oder BF545B: http://www.mikrocontroller.net/topic/358535#4012298 Mit freundlichen Grüßen - Martin
alternativ: Standbohrmaschine mit Kreuztisch, wenn sie nicht zu ausgenudelt ist (Rundlauf!). Optimum BF16 und BF20, oder alternative China-Fräsen, wenn Platz und Geld passen. Da gibt man aber schnell 800 Euro bzw. mehr aus, und braucht noch das Werkzeug - ohne Werkzeug nützt die beste Fräse nicht....Aber
. Auflösung 0,003mm!!! Eilgänge auf 25mm/sec. begrenzt, da Schrittverluste vorkamen..... Dann gings ans testen. Erst mit Messing, dann Alu und schließlich Stahl. Ich kann nur noch folgendes sagen: GEIL!!!! DANKE!!! Genauigkeit
93 13 01 sts 0x0113, r24 29c: ff 91 pop r31 29e: ef 91 pop r30 2a0: bf 91 pop r27 2a2: af 91 pop r26 2a4: 9f 91 pop r25 2a6: 8f 91 pop r24 2a8: 7f 91 pop r23 2aa: 6f 91 pop r22 2ac: 5f 91 pop
L H DD RAM address 42µs DD RAM Data is sent and ADDRESS received after this setting READ BUSY L H BF Address Counter used for 0µs H Busy FLAG & both DD & CG RAM address BF ADDRESS L Ready − Reads BF indication internal operating is being performed − Reads addresscounter contents WRITE DATA H L Write
wohl dem Grafikdisplay geschuldet. Chris H. schrieb im Beitrag #7761774: > IMG_2301.jpeg Ein IS25LP032 SPI 32Megabit EEPROM. An dem müsste Spannung dran sein und bei startenden/laufendem Mikrocontroller auch rege Kommunikation. Pinout siehe Datenblatt https://www.issi.com/WW/pdf/IS25LP032-064-128
Super, vielen Dank. Achim M. schrieb im Beitrag #7761782: > Ein IS25LP032 SPI 32Megabit EEPROM. > An dem müsste Spannung dran sein und bei startenden/laufendem > Mikrocontroller auch rege Kommunikation. Pinout siehe Datenblatt > https://www.issi.com/WW/pdf/IS25LP032
L H DD RAM address 42µs DD RAM Data is sent and ADDRESS received after this setting READ BUSY L H BF Address Counter used for 0µs H Busy FLAG & both DD & CG RAM address ADDRESS BF L Ready − Reads BF indication internal operating is being performed − Reads address counter contents WRITE DATA H L Write
L H DD RAM address 42µs DD RAM Data is sent and ADDRESS received after this setting READ BUSY L H BF Address Counter used for 0µs FLAG & both DD & CG RAM address H Busy ADDRESS BF L Ready − Reads BF indication internal operating is being performed − Reads address counter contents WRITE DATA H L Write
L H DD RAM address 42µs DD RAM Data is sent and ADDRESS received after this setting READ BUSY L H BF Address Counter used for 0µs H Busy FLAG & both DD & CG RAM address ADDRESS BF L Ready − Reads BF indication internal operating is being performed − Reads address counter contents WRITE DATA H L Write
L H DD RAM address 42µs DD RAM Data is sent and ADDRESS received after this setting READ BUSY L H BF Address Counter used for 0µs H Busy FLAG & both DD & CG RAM address ADDRESS BF L Ready − Reads BF indication internal operating is being performed − Reads address counter contents WRITE DATA H L Write
L H DD RAM address 42µs DD RAM Data is sent and ADDRESS received after this setting READ BUSY L H BF Address Counter used for 0µs H Busy FLAG & both DD & CG RAM address ADDRESS BF L Ready − Reads BF indication internal operating is being performed − Reads address counter contents WRITE DATA H L Write
L H DD RAM address 42µs DD RAM Data is sent and ADDRESS received after this setting READ BUSY L H BF Address Counter used for 0µs H Busy FLAG & both DD & CG RAM address ADDRESS BF L Ready − Reads BF indication internal operating is being performed − Reads address counter contents WRITE DATA H L Write
L H DD RAM address 42µs DD RAM Data is sent and ADDRESS received after this setting READ BUSY L H BF Address Counter used for 0µs H Busy FLAG & both DD & CG RAM address ADDRESS BF L Ready − Reads BF indication internal operating is being performed − Reads address counter contents WRITE DATA H L Write
L H DD RAM address 42µs DD RAM Data is sent and ADDRESS received after this setting READ BUSY L H BF Address Counter used for 0µs H Busy FLAG & both DD & CG RAM address ADDRESS BF L Ready − Reads BF indication internal operating is being performed − Reads address counter contents WRITE DATA H L Write
L H DD RAM address 42µs DD RAM Data is sent and ADDRESS received after this setting READ BUSY L H BF Address Counter used for 0µs H Busy FLAG & both DD & CG RAM address ADDRESS BF L Ready − Reads BF indication internal operating is being performed − Reads address counter contents WRITE DATA H L Write
L H DD RAM address 42µs DD RAM Data is sent and ADDRESS received after this setting READ BUSY L H BF Address Counter used for 0µs H Busy FLAG & both DD & CG RAM address ADDRESS BF L Ready − Reads BF indication internal operating is being performed − Reads address counter contents WRITE DATA H L Write
L H DD RAM address 42µs DD RAM Data is sent and ADDRESS received after this setting READ BUSY L H BF Address Counter used for 0µs H Busy FLAG & both DD & CG RAM address ADDRESS BF L Ready − Reads BF indication internal operating is being performed − Reads address counter contents WRITE DATA H L Write
L H DD RAM address 42µs DD RAM Data is sent and ADDRESS received after this setting READ BUSY L H BF Address Counter used for 0µs H Busy FLAG & both DD & CG RAM address BF ADDRESS L Ready − Reads BF indication internal operating is being performed − Reads address counter contents WRITE DATA H L Write
L H DD RAM address 42µs DD RAM Data is sent and ADDRESS received after this setting READ BUSY L H BF Address Counter used for 0µs H Busy FLAG & both DD & CG RAM address ADDRESS BF L Ready − Reads BF indication internal operating is being performed − Reads address counter contents WRITE DATA H L Write
L H DD RAM address 42µs DD RAM Data is sent and ADDRESS received after this setting READ BUSY L H BF Address Counter used for 0µs H Busy FLAG & both DD & CG RAM address ADDRESS BF L Ready − Reads BF indication internal operating is being performed − Reads address counter contents WRITE DATA H L Write
L H DD RAM address 42µs DD RAM Data is sent and ADDRESS received after this setting READ BUSY L H BF Address Counter used for 0µs H Busy FLAG & both DD & CG RAM address BF ADDRESS L Ready − Reads BF indication internal operating is being performed − Reads address counter contents WRITE DATA H L Write
L H DD RAM address 42µs DD RAM Data is sent and ADDRESS received after this setting READ BUSY L H BF Address Counter used for 0µs H Busy FLAG & both DD & CG RAM address ADDRESS BF L Ready − Reads BF indication internal operating is being performed − Reads address counter contents WRITE DATA H L Write
L H DD RAM address 42µs DD RAM Data is sent and ADDRESS received after this setting READ BUSY L H BF Address Counter used for 0µs H Busy FLAG & both DD & CG RAM address ADDRESS BF L Ready − Reads BF indication internal operating is being performed − Reads address counter contents WRITE DATA H L Write
L H DD RAM address 42µs DD RAM Data is sent and ADDRESS received after this setting READ BUSY L H BF Address Counter used for 0µs H Busy FLAG & both DD & CG RAM address ADDRESS BF L Ready − Reads BF indication internal operating is being performed − Reads address counter contents WRITE DATA H L Write
L H DD RAM address 42µs DD RAM Data is sent and ADDRESS received after this setting READ BUSY L H BF Address Counter used for 0µs H Busy FLAG & both DD & CG RAM address ADDRESS BF L Ready − Reads BF indication internal operating is being performed − Reads address counter contents WRITE DATA H L Write
L H DD RAM address 42µs DD RAM Data is sent and ADDRESS received after this setting READ BUSY L H BF Address Counter used for 0µs H Busy FLAG & both DD & CG RAM address ADDRESS BF L Ready − Reads BF indication internal operating is being performed − Reads address counter contents WRITE DATA H L Write
L H DD RAM address 42µs DD RAM Data is sent and ADDRESS received after this setting READ BUSY L H BF Address Counter used for 0µs H Busy FLAG & both DD & CG RAM address ADDRESS BF L Ready − Reads BF indication internal operating is being performed − Reads address counter contents WRITE DATA H L Write
L H DD RAM address 42µs DD RAM Data is sent and ADDRESS received after this setting READ BUSY L H BF Address Counter used for 0µs H Busy FLAG & both DD & CG RAM address ADDRESS BF L Ready − Reads BF indication internal operating is being performed − Reads address counter contents WRITE DATA H L Write
L H DD RAM address 42µs DD RAM Data is sent and ADDRESS received after this setting READ BUSY L H BF Address Counter used for 0µs H Busy FLAG & both DD & CG RAM address ADDRESS BF L Ready − Reads BF indication internal operating is being performed − Reads address counter contents WRITE DATA H L Write
L H DD RAM address 42µs DD RAM Data is sent and ADDRESS received after this setting READ BUSY L H BF Address Counter used for 0µs H Busy FLAG & both DD & CG RAM address ADDRESS BF L Ready − Reads BF indication internal operating is being performed − Reads address counter contents WRITE DATA H L Write
L H DD RAM address 42µs DD RAM Data is sent and ADDRESS received after this setting READ BUSY L H BF Address Counter used for 0µs H Busy FLAG & both DD & CG RAM address ADDRESS BF L Ready − Reads BF indication internal operating is being performed − Reads address counter contents WRITE DATA H L Write
* Model generated on Dec 26, 2003 * Model format: PSpice .MODEL Qmjd50t4 npn +IS=7.25559e-11 BF=26.7185 NF=1.5 VAF=25.4206 +IKF=6.11331 ISE=4.74986e-12 NE=3.46876 BR=2.67185 +NR=1.44677 VAR=3.40787 IKR=3.07918 ISC=4.75e-13 +NC=3.96875 RB=0.911238 IRB=0.1 RBM=0.1 +RE=0.000647444 RC=0.138596
kleinen Transistoren dann auch schnellere Hochspannungsfeste Alternativen. Ein Beispiel wären etwa ein BF421/BF420 - nicht SMD, aber da sollte es ähnliche auch als SMD geben. Ggf. bräuchte man auch eine Kompensation schon im Transistorteil - etwa als Millerkondensator an Q3. Direkt auf eine Kapazitive
START=0;SORT=preis;OFFSET=500;SID=11Tsfbh38AAAIAAHphNVU3c1b1073228f5c7ad095c1090a4ac9e7) RAD 220/25 (http://www.reichelt.at/Elkos-radial/RAD-220-25/index.html?;ACTION=3;LA=444;GROUP=B312;GROUPID=3143;ARTICLE=15119;START=0;SORT=preis;OFFSET=500;SID=11Tsfbh38AAAIAAHphNVU3c1b1073228f5c7ad095c1090a4ac9e7
Daniel S. schrieb im Beitrag #2426428: > RAD 22/63 > RAD 220/25 Nicht wirklich geeignet. Sollten Low-ESR Typen sein: http://www.reichelt.at/Elkos-radial-105-C-1000-5000h/RAD-FC-330-25/index.html?;ACTION=3;LA=2;ARTICLE=84652;GROUPID=4000;artnr=RAD+FC+330%2F25;
mit der gemessenen Frequenz verrechnen. Bei mir kommen die Vorteiler und Anpassverstärker (FET BF245/ J310, HF-Transistor BF199) alle in ein Weisblechgehäuse, so HF-gerecht 'verpackt' werden sie über den Eingangsumschalter (74HC132) per Software ausgewählt.
Hallo Uwe, > Da hast Du etwas falsch gelesen, das ist ein J310 oder BF245 o. ä. alles > ganz harmlos ! Stimmt, J310 steht da, aber SF245 steht trotzdem auf dem Plan! Also ist damit der "BF245" gemeint? ...dann wäre das ja gar kein Problem! > Der Vorschlag mit dem 74HC132
Vielleicht setzt du IVSEL nicht innerhalb von 4 CPU-Zyklen? [code] MCUCR = temp | (1<<IVCE); 000071BF LDI R24,0x55 Load immediate 000071C0 LDI R25,0x00 Load immediate 000071C1 LDD R18,Y+8 Load indirect with displacement 000071C2 ORI R18,0x01 Logical OR with immediate 000071C3
Vielleicht setzt du IVSEL nicht innerhalb von 4 CPU-Zyklen? > MCUCR = temp | (1<<IVCE); > 000071BF LDI R24,0x55 Load immediate > 000071C0 LDI R25,0x00 Load immediate > 000071C1 LDD R18,Y+8 Load indirect with displacement > 000071C2 ORI R18,0x01 Logical OR with immediate > 000071C3
200mA IC) musst du dem CMOS-Baustein auch > erst mal entlocken die waren im DB aber genannt sogar 25mA als source und sink https://assets.nexperia.com/documents/data-sheet/74HC_HCT86.pdf output current 0.5 V < VO < VCC +0.5V +-25mA
