Gast
#4206879
hallo Zusammen,
kann jemand mir sagen was ich hier falsch mache.
der ADC bleibt in testIFG hängen.
#include "msp430x26x.h"
;-----------------------------------------------------------------------
--------
RSEG CSTACK ; Define stack segment
;-----------------------------------------------------------------------
--------
RSEG CODE ; Assemble to Flash memory
;-----------------------------------------------------------------------
--------
RESET mov.w #SFE(CSTACK),SP ; Initialize stackpointer
StopWDT mov.w #WDTPW+WDTHOLD,&WDTCTL ; Stop watchdog
bis.b #40h,&P6SEL ; Enable A/D channel A6
;
SetupADC12 mov.w #REFON+REF2_5V+ADC12ON+SHT0_2,&ADC12CTL0
; turn on 2.5V ref, set samp
time
mov.w #SHP,&ADC12CTL1 ; Use sampling timer
mov.b #SREF_1,&ADC12MCTL6 ; Vr+=Vref+
;
mov.w #03600h,R15 ; Delay for needed ref
start-up.
L$1 dec.w R15 ; See datasheet for details.
jnz L$1 ;
;
bis.w #ENC,&ADC12CTL0 ; Enable conversions
;
Mainloop bis.w #ADC12SC,&ADC12CTL0 ; Start conversions
testIFG bit.w #40h,&ADC12IFG ; Conversion done?
jz testIFG ; No, test again
mov.w &ADC12MEM6, R5 ; Move result
jmp Mainloop ; SET BREAKPOINT HERE
;
;-----------------------------------------------------------------------
--------
COMMON INTVEC ; Interrupt Vectors
;-----------------------------------------------------------------------
--------
ORG RESET_VECTOR ; POR, ext. Reset
DW RESET
END