Wavegenerator sonderbar

CLK->CKDIVR = 0x00;

CLK->PCKENR1 |= CLK_PCKENR1_DAC | CLK_PCKENR1_TIM4;

CLK->PCKENR2 |= CLK_PCKENR2_DMA1;

DMA1_Channel3->CCR &= (uint8_t)~(DMA_CCR_CE); //Disable the selected DMA Ch.

DMA1_Channel3->CCR  = DMA_CCR_RESET_VALUE;//Reset DMA Channelx

DMA1_Channel3->CCR |= ((uint8_t)DMA_DIR_MemoryToPeripheral |

  (uint8_t)DMA_Mode_Circular |(uint8_t) DMA_MemoryIncMode_Inc);

DMA1_Channel3->CSPR &= (uint8_t)~(DMA_CSPR_PL | DMA_CSPR_16BM);

  //Clear old priority and memory data size  option

DMA1_Channel3->CSPR |= ((uint8_t)DMA_Priority_VeryHigh |

  (uint8_t)DMA_MemoryDataSize_HalfWord);

DMA1_Channel3->CNBTR = (uint8_t)sample_size;// Write to DMA Channelx CNBTR

//--------------------------- DMA Channel3 CPAR Configuration

DMA1_Channel3->CPARH = (uint8_t)(DAC_CH1RDHRH_ADDRESS >> (uint8_t)8);

DMA1_Channel3->CPARL = (uint8_t)(DAC_CH1RDHRH_ADDRESS);

//--------------------------- DMA Channel3 CMAR Configuration

DMA1_Channel3->CM0ARH = (uint8_t)(WavesTab[tab_index] >> (uint8_t)8);

DMA1_Channel3->CM0ARL = (uint8_t)(WavesTab[tab_index]);  

DMA1_Channel3->CCR |= DMA_CCR_CE;// DMA1 Channel 3 enable

DMA1->GCSR |= (uint8_t)DMA_GCSR_GE; // Enable the DMA

// DAC Channel1 Config: 12bit 

// Fill DAC Init param DAC_Trigger_T4_TRGO* and  DAC Channel1 Init

  // DAC CR1 Config

tmpreg1 = DAC->CH1CR1;

tmpreg1 &= (uint8_t)~(DAC_CR1_TEN | DAC_CR1_TSEL );

  // Configure for the selected DAC channel: buffer output, trigger

  // Set BOFFx bit Output Buffer disable

tmpreg1 |= (uint8_t)(DAC_CR1_BOFF );

  // Set TSELx and TEN  bits according to DAC_Trigger value

tmpreg1 |= (uint8_t)(DAC_CR1_TEN | DAC_Trigger_T4_TRGO) ;

DAC->CH1CR1 = tmpreg1;

DAC->CH1CR1 |= DAC_CR1_EN;

DAC->CH1CR2 |= DAC_CR2_DMAEN;

//********* TIM4 Config ********

TIM4->ARR = (uint8_t)(0x4C);// output signal frequency ca 100Hz Range 1

TIM4->PSCR = (uint8_t)(TIM4_Prescaler_16);

tmpreg1 = TIM4->CR2;

tmpreg1 &= (uint8_t)(~TIM4_CR2_MMS);

tmpreg1 |=  (uint8_t)TIM4_TRGOSource_Update;

TIM4->CR2 = tmpreg1;

TIM4->CR1 |= TIM4_CR1_CEN;