[STM32] und mehrere Interrupts

#define PUTCHAR_PROTOTYPE int fputc(int ch, FILE *f)

struct __FILE { int handle; };

FILE __stdout;

FILE __stdin;

void usart1_init (unsigned long baudrate) {

  NVIC->ISER[1] |= 0x00000020;  //enable USART1 Interrupt (Nested Vector Interrupt Controller)

  RCC->APB2ENR |= RCC_APB2ENR_IOPAEN; //enable GPIOA clock

  GPIOA->CRH &= ~(0x00F0); //clear PA.9 configuration-bit 

  GPIOA->CRH   |= (0x0BUL  << 4); //Tx (PA9) - alt. out push-pull

  GPIOA->CRH &= ~(0x0F00); //clear PA.10 configuration-bit 

  GPIOA->CRH   |= (0x04UL  << 8); //Rx (PA10) - floating

  RCC->APB2ENR |= RCC_APB2ENR_USART1EN; //enable USART1 clock

  USART1->BRR  = 8000000L/baudrate; //set baudrate 

  USART1->CR1 |= (USART_CR1_RE | USART_CR1_TE);  //set RX, TX

  USART1->CR1 |= USART_CR1_RXNEIE; //enable USART IRQ

  USART1->CR1 |= USART_CR1_UE;    //enable USART

} 

void usart2_init (unsigned long baudrate) {

  RCC->APB2ENR |= RCC_APB2ENR_IOPAEN; //enable GPIOA clock

  AFIO->MAPR &= ~(AFIO_MAPR_USART2_REMAP); //no remap of RX & TX

  GPIOA->CRL &= ~(0x0F00); //clear PA.2 configuration-bits 

  GPIOA->CRL   |= (0x0BUL  << 8); //Tx (PA.2) - alt. out push-pull

  GPIOA->CRL &= ~(0xF000); //clear PA.3 configuration-bits 

  GPIOA->CRL   |= (0x04UL  << 12); //Rx (PA.3) - floating

  RCC->APB1ENR |= RCC_APB1ENR_USART2EN; //enable USART2 clock

  USART2->BRR  = 8000000L/baudrate; //set baudrate 

  USART2->CR1 |= (USART_CR1_RE | USART_CR1_TE);  //enable RX, TX

  USART2->CR1 |= USART_CR1_UE;                    //enable USART

} 

void usart3_init (unsigned long baudrate) {

  NVIC->ISER[1] |= 0x00000080;  //enable USART1 Interrupt (Nested Vector Interrupt Controller)

  RCC->APB2ENR |= RCC_APB2ENR_IOPBEN; //enable GPIOB clock

  AFIO->MAPR &= ~(AFIO_MAPR_USART3_REMAP); //no remap of RX & TX

  GPIOB->CRH = GPIOB->CRH & ~(0x00000F00) | (0x00000B00); //PB10 = Tx 

  //GPIOA->CRL   |= (0x0BUL  << 8); //Tx (PA.2) - alt. out push-pull

    GPIOB->CRH = GPIOB->CRH & ~(0x0000F000) | (0x00004000); //PB11 = Rx 

  //GPIOA->CRL &= ~(0xF000); //PB11 = Rx 

  //GPIOA->CRL   |= (0x04UL  << 12); //Rx (PA.3) - floating

  RCC->APB1ENR |= RCC_APB1ENR_USART3EN; //enable USART3 clock

  USART3->BRR  = 8000000L/baudrate; //set baudrate 

  USART3->CR1 |= (USART_CR1_RE | USART_CR1_TE);  //enable RX, TX

  USART3->CR1 |= USART_CR1_RXNEIE; //enable USART IRQ

  USART3->CR1 |= USART_CR1_UE;                    //enable USART

} 

int send_char (char ch)  {

  while (!(USART2->SR & USART_SR_TXE));  //data transmit register empty?

  USART2->DR = (ch & 0xFF);  //write bytewise

  return (ch);

} 

/*let send_char point to printf*/

PUTCHAR_PROTOTYPE

{

  send_char((char) ch);

  return ch;

} 

/*Put the received characters in a ringbuffer*/

void USART1_IRQHandler (void){

  if((USART1->SR & USART_SR_RXNE)){ 

    fifo_write(&fifo[0], USART1->DR);   

   }

}

/*Put the received characters in a ringbuffer*/

void USART3_IRQHandler (void){

  if((USART3->SR & USART_SR_RXNE)){ 

    fifo_write(&fifo[1], USART3->DR);   

   }

}

int main(void)

{ 

   uint8_t data[2] = {0,0}; 

   uint8_t ret[2] = {0,0};  

   //initialize ringbuffer

   fifo_init(&fifo[0]);

   fifo_init(&fifo[1]);

   usart1_init(9600); //USART1 used for sending data

   usart2_init(9600); //USART2 used for receiving data

   usart3_init(9600); //USART3 used for receiving data

   for(;;){

      __disable_irq(); //translate to CPSID i

      //try to read from ringbuffer and put read char in 'data' 

      ret[0] = fifo_read(&fifo[0], &data[0]);

      ret[1] = fifo_read(&fifo[1], &data[1]);

      __enable_irq(); //translate to CPSIE i

     if(ret[0] == SUCCESS){ //if there was new char in ringbuffer

        printf("%d", manipulate_data(data[0]));  //manipulate data and write it out  

     }

     if(ret[1] == SUCCESS){ //new character in buffer?

        printf("%d", manipulate_data(data[0]));  //manipulate data and write it out   

     }  

   }

}