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3D-gedruckter Deckel für Fettdose
TRIAX 600 SYNTHETIC GREASE VERSATILITY LIKE NO OTHER HEAVY DUTY TEMPERATURE RANGE PREVENTS RUST AND CORROSION BEARINGS, PINIONS, WHEELS, AXLES MARINE APPLICATIONS WATERPROOF HIGH TEMP DROP POINT
in „3D-Druck Fett-Kartuschen Verschluss“ · Projekte & Code · · Fotos
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Display eines Rohde & Schwarz SMU 200A Signalgenerators
VECTOR SIGNAL GENERATOR Frequency 1.000 000 00 GHz PEP -30.00 dBm Level -30.00 dBm History Err -300 Synthesis fractional loop PLL unlocked Sys -1 ADDITIONAL INFO: Load Software Maintenance Patch Info Data not implemented, false, File: ...\Src\COptionKeyMana... 0: May-23-2025/ 18:43:22-056ms, Error code -
in „[V] R&S SMU 200A Vektor Signal Generator“ · Markt · · Fotos
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Display eines Rohde & Schwarz SMU 200A Signalgenerators mit Fehlermeldung
VECTOR SIGNAL GENERATOR Frequency 1.000 000 00 GHz PEP -30.00 dBm Level -30.00 dBm History Err -300 Synthesis fractional-loop PLL unlocked - please execute adjustment (menu setup/internal adjustments/adjust synthesis) Sys -1 ADDITIONAL INFO: Load Software Maintenance Patch Info Data not implemented, false, File:\...\Src\OptionKeyMana... 1: May-23-2025/ 18:44:26-208ms. Error code 50013. Synthesis fractional-loop PLL unlocked - please execute adjustment (menu setup/internal adjustments/adjust synthesis) at path A SCPI: Device specific error Run internal adjustment. If message does not disappear
in „[V] R&S SMU 200A Vektor Signal Generator“ · Markt · · Fotos
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Schaltplan eines Synthesizers mit Vibrato- und H.F.-Oszillator
VIBRATO OSCILLATOR, H.F. OSCILLATOR, TOP OCTAVE SYNTHESIZER, -6V, 120 22k, 118 22uF, 115 10k, 122 10k, 123 0.3uF, 125 BC213, 127 270k, 128 10k, 130 10k, 131 22k, 134 47uF, 135 22uF, 136 10k, 137 10k, 138 10k, 139 10k, 140 10k, 141 22uF, 142 22uF, 143 47uF
in „Farfisa Caroline“ · Analoge Elektronik und Schaltungstechnik · · Schaltpläne
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Bibliografische Daten eines Handbuchs
Library of Congress Cataloging-in-Publication Data Crawford, James A. Frequency synthesizer design handbook/James A. Crawford. Includes bibliographical references and index. ISBN 0-89006-440-7 1. Frequency synthesizers. I. Title TK7872.F73C73 1994 94-7655 621.3815'486--dc20 CIP
in „Genauer und schneller Sinus im FPGA“ · FPGA, VHDL & Co. · · Fotos
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Foto einer Buchseite über D/A-Wandler und DDS
important aspect of DDS design can be found in [14- 17]. 7.3.7 Spurious Suppression in Direct Digital Synthesizers Using Numerical Techniques Additional digital techniques may be incorporated into the generic DDS in order to largely eliminate the presence of discrete spurious signals at the DDS output. Nor-
in „Genauer und schneller Sinus im FPGA“ · FPGA, VHDL & Co. · · Fotos
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Bücher über Elektronik, C++ Programmierung und USB 2.0
Signalgeneratoren praktisch aufbauen und anwenden FRANZIS Das Verfahren der Direkten Digitalen Synthese (Direct Digital Synthesis - DDS) in der Praxis C++ Programmierung 470 praxisnahe Übungen mit Lösungen Typen, Funktionen, Klassen, Strings und Klassen Templates und Iteratoren Rekursion, Logik, Polymorphismus
in „[V]Fachbücher“ · Markt · · Fotos
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Blockschaltbild eines GPS VNA Systems
User Interface, GPS, VNA, RF Stages, Frequency Synthesis, DAC, ADC, STM32F4 FPU/DSP, TX Preamp, Mixers, RX Amplifier, Power, Audio, GPS Antenna, Parallel Interface, LEDs, Encoder Knob, MicroSD Card Slot, USB, External RAM, Battery, Voltage regulators,
in „Platine aus PADS konvertieren?“ · Platinen · · Diagramme
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Frequenzsynthesizer Messgerät mit Digitalanzeige
SYNTHESIZER 2-6.2 GHz IEEE488 FM FREQUENCY MHz 3000.000 OVEN STATUS OUTPUT OFF ON FM DEVIATION MHz OFF 1 10 FM INPUT 2V RESOLUTION HOLD TUNING PRESET (3 GHz) LINE ON STANDBY
in „[V] HP 8671A SYNTHESIZER Frequenzgenerator 2-6.2GHz Oven OCXO“ · Markt · · Fotos
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HP 8671A Synthesizer Frontplatte
hp 8671A SYNTHESIZER HEWLETT PACKARD RF OFF FM OVERMOD RF OUTPUT OFF ON REVERSE POWER 0.5W MAX ±5V DC keine Kalibrierung K FM DEVIATION MHZ OFF .1 10 FM INPUT 2V PEAK = FM DEV
in „[V] HP 8671A SYNTHESIZER Frequenzgenerator 2-6.2GHz Oven OCXO“ · Markt · · Fotos
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Inhaltsverzeichnis einer Webseite über NanoVNA und Elektronik
in die Arduino-Programmierung für Amateurfunker • Bedienungsanleitung für das chinesische Synthesizer-Board mit ADF4351 und Touchscreen (Bereich von 35 MHz bis 4 GHz. Zu finden auf Ebay ab 60 Euro) • Frischer Wind für DVB-T-Sticks und SDR durch die neue stabile HDSDr-Programmversion (im Moment: 2.76
in „GVA-62+ Stabilität“ · HF, Funk und Felder · · Screenshots
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Schaltplan Triangle Synthesis
Circuit and layout diagrams TRIANGLE SYNTHESYS HAMEG HB030-6 Date: 16/06/04 Sheet 4 of 6 +5VA, +12V, -12V, -5VA, AGND, GND IC3 TL082CD, IC4 TL082CD, IC10-B LF412, IC10A-B LF412, IC11-B LF412, IC12-B LF412, IC13-B LF412, IC14-B LF412, IC15-B LF412
in „Hameg HM 8030-6.1 extern wobbeln“ · Analoge Elektronik und Schaltungstechnik · · Schaltpläne
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Textbeschreibung einer Phase-Locked-Loop-Schaltung
VCO im n-fachen Frequenz der Eingangsfrequenz. Anwendung: FM-Demodulator und Modulator, Frequenz-Synthese und Multiplikation, Frequenz-Synchronisation, Span
in „Frequenzanzeige aus Eingangssignal generieren.“ · Mikrocontroller und Digitale Elektronik · · Screenshots
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Elektronische Musikgeräte und Synthesizer auf einem Tisch
Polyend Tracker, Waldorf
in „[V] Bridgetek FT812 5" TFT mit Embedded Video Engine (ME812A-WH50R)“ · Markt · · Fotos
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Tabellarische Auflistung von elektronischen Messgeräten und Komponenten
Samsung Video Camera Encoder HM1720 Hitachi CB Radio Circuits Channel Selector/Display LY781 Samsung Synthesizer Set 40 kHz CB Channel LY731 Samsung Clock/Watch Circuits Alarm Clock KS206 Samsung Analog Clock HM3202A/1 Huon Micro Alarm Clock Circuit HM34214 Samsung Alarm Clock Driver KS207 Samsung Analog LCD
in „Alternative zu diesem IC“ · Mikrocontroller und Digitale Elektronik · · Screenshots
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Philips PM 5193 programmierbarer Synthesizer / Funktionsgenerator
PHILIPS PM 5193 programmable synthesizer / function generator 0.1mHz-50 MHz 123456 kHz 50 NOT 2 ENTERED STO 1-9 7 8 9 REMOTE 4 5 6 TTL OUT WAVE FORM START AC OFF FREQUENCY MODULATION DATE FREQ BURST ON/OFF LEVEL AC/DC AM FM DEV CONT TIME
in „[V] Funktionsgenerator Philips PM5193“ · Markt · · Fotos
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Bedienungsanleitung Philips Synthesizer / function generator PM 5193
ARCHIEF PHILIPS Synthesizer / function generator 50 MHz PM 5193 Operating manual TEST & MEASUREMENT CUSTOMER SUPPORT
in „[V] Funktionsgenerator Philips PM5193“ · Markt · · Fotos
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Service manual Philips PM 5193
Programmable synthesizer / function generator 0.1 mHz - 50 MHz PM 5193 9445 091 23001 Service manual 9429 405 000/11 67 30 01 I&E Industrial & Electro-acoustic Systems Division PHILIPS Industrial & Electro-acoustic Systems
in „[V] Funktionsgenerator Philips PM5193“ · Markt · · Fotos
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Quartus Prime Lite Edition Schaltplan und Kompilierbericht
Project Assignments Processing Tools Window Help MAX-II_EPM240T100ISN Task Compile Design Analysis & Synthesis Fitter (Place & Route) Assembler (Generate Programming Files) Timing Analysis EDA Netlist Writer Edit Settings Program Device (Open Programmer) MAX-II_EPM240T100ISN_Board1.bdf Compilation Report
in „Altera Quartus - Schemaeditor, Macro Library“ · FPGA, VHDL & Co. · · Screenshots
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Blockschaltbild und Formel der FM-Synthese
1.3 Summary of the Principles of FM-type Sound Generation FM-type sound can be expressed via a basic configuration like that depicted in Figure 1.1. If this were to be expressed formally, it would look like this: Fig. 1.1 (Nc + Dc)wt Modulator Carrier (Nm + Dm)wt SIN TABLE SIN TABLE E(t) B(t) A(t) E(t) = A(t)*sin[(Nc + Dc)*wt + B(t)*sin(Nm + Dm)*wt] A(t) : Volume envelope B(t) : Timbre envelope Nx : 1/2 of the basic pitch or multiple value Dx : 1/2 of the basic pitch (1.6 cents) harmonic value
in „YM2151 Sound Chip“ · Digitale Signalverarbeitung / DSP / Machine Learning · · Screenshots
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Blockschaltbild eines Eight Operator Frequency Modulation Synthesizers
"Eight Operator Frequency Modulation Synthesizer" IN_SEL INPUT MUX OUTS 1 ... 8 ADSR ENV ADDER A + B NCA A x B LFO MOD FREQ PITCH DEPTH WAVE SEL ADDER A + B NCA A x B ADDER A + B NCO WAV(X) OUT MIXER www.96khz.org OP n EOFMS2 (C) 2006 Dipl.-Ing
in „YM2151 Sound Chip“ · Digitale Signalverarbeitung / DSP / Machine Learning · · Diagramme
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Software Release Notes Incompatibility Warnings
tilepalettemapper.TilePaletteMapper now supports displayio.ColorConverter. Incompatibility warnings synthio.BlockBiquad has been renamed to synthio.Biquad. The old deprecated synthio.Biquad has been removed, as well as synthio.Synthesizer.low_pass_filter, synthio.Synthesizer.high_pass_filter, and synthio.Synthesizer.band_pass_filter. Coefficients from biquad_filter_state have been moved into synthio.biquad (biquad_filter_state is still used for input and output state). The displayio bindings deprecated in 9.x have been removed: busdisplay.BusDisplay replaces displayio.Display. fourwire.FourWire
in „Raspberry Pi-Netzteil mit 45W, ESP32-P4-Boards, offizielles Ubuntu für OrangePI RV2 uvam“ · Mikrocontroller und Digitale Elektronik · · Screenshots
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Datei
mc9s12ne64.h
#define DDRK_BIT5_MASK 32 #define DDRK_BIT6_MASK 64 #define DDRK_BIT7_MASK 128 /*** SYNR - CRG Synthesizer Register; 0x00000034 ***/ typedef union { byte Byte; struct { byte SYN0 :1; /* CRG Synthesizer Bit 0 */ byte SYN1 :1; /* CRG Synthesizer Bit 1 */ byte SYN2 :1; /* CRG Synthesizer Bit 2 */ byte SYN3 :1; /* CRG Synthesizer Bit 3 */ byte SYN4 :1; /* CRG Synthesizer Bit 4 */ byte SYN5 :1; /* CRG Synthesizer Bit 5 */ byte :1; byte :1; } Bits; struct { byte grpSYN :6; byte :1; byte :1; } MergedBits; } SYNRSTR; extern
in „Hilfe MC9S12NE64 interrupt programmierung“ · Mikrocontroller und Digitale Elektronik ·
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Datei
Sensors.shtml.htm
Kit $695 <br> <a href="http://www.ngdc.noaa.gov/cgi-bin/seg/gmag/fldsnth1.pl">Geomagnetic Field Synthesis Program (Version 3.0) Input Form </a>- on line determination of all 3 components of field <br> <a href="http://www.irf.se/">Swedish Institute of Space Physics (IRF)</a> - <a href="http://www.irf.se
in „CO Gehalt Messen“ · Mikrocontroller und Digitale Elektronik ·
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PDF
dmf50081.pdf
protect work tables against the hazards of electrical shock. ② Avoid the use of work clothing made of synthetic fibers. We recommend cotton clothing or other conductivity-treated fibers. ③ Slowly and carefully remove the protective film from the LCD module, since this operation can generate static electricity
in „LCD Driving Voltage“ · Offtopic ·
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The_Terawatt_Challenge_for_Thin-Film_PV__NREL.pdf
that biomass resources would become inadequate about mid-century. Thus development of in-situ PV synthesis of carbon fuels could take until then and still play a major role. However, there may be simpler and shorter-term ways to harness PV to remove some CO f2om the atmosphere and make hydrocarbons. Just
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203493453ADF7020_0.pdf
Register 2—Transmit Modulation Register (ASK/OOK Frequency Synthesizer...................................................................14 Mode)........................................................................................... 31 Reference Input.............................................
in „LFCP_VQ löten/belichten?“ · Mikrocontroller und Digitale Elektronik ·
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PDF
CSTCW-Series.pdf
Application to M34550M4 (MITSUBISHI) (Remote Control Unit) Application to TC88402F (TOSHIBA) (Speech Synthesizer) V CC(+3.0V) VDD=+5V 33,36 H IC:M34550M4 IC:TC88402F 30 31 L 1 2 GND CERALOCK ® CERALOCK L:13Y27, 29, 32, 37Y40 C1 C2 C1 C2 V 1 V2 Recommendable Value V1 V2 Recommendable Value CERALOCK : CSB455E
in „AVR+interner RC Oszillator extrem ungenau“ · Mikrocontroller und Digitale Elektronik ·
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PDF
SAA1057.pdf
INTEGRATED CIRCUITS DATA SHEET SAA1057 Radio tuning PLL frequency synthesizer Product specification November 1983 File under Integrated Circuits, IC01 Philips Semiconductors Product specification Radio tuning PLL frequency synthesizer SAA1057 GENERAL DESCRIPTION • On-chip programmable
in „PLL SAA1057 + FM Modul 1890“ · Mikrocontroller und Digitale Elektronik ·
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PDF
dmf50081n.pdf
protect work tables against the hazards of electrical shock. ② Avoid the use of work clothing made of synthetic fibers. We recommend cotton clothing or other conductivity-treated fibers. ③ Slowly and carefully remove the protective film from the LCD module, since this operation can generate static electricity
in „Controllerless LCD“ · Mikrocontroller und Digitale Elektronik ·
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PDF
AD9833.pdf
CIRCUIT DESCRIPTION Signal-to-Noise Ratio (SNR) The AD9833 is a fully integrated direct digital synthesis (DDS) SNR is the ratio of the rms value of the measured output signal chip. The chip requires one reference clock, one low precision to the rms sumof all other spectral components belowtheNyquist
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Datei
minidds.asm
************************************************************* ; ;Description ; ; Poor-mans DDS Synthesizer ; ; Author = Jesper Hansen ; Target = AT90S2313 ; Date = 2001-02-15 ; ; Code is written for use with AVR-GCC in assembler mode ; flag: -x assembler-with-cpp ; ; ; PB0..7 = D/A Data out ; ; PD0 RXD
in „assembler kompilieren“ · Mikrocontroller und Digitale Elektronik ·
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Datei
polymcv_c.htm
HTML PUBLIC "-//W3C//DTD HTML 4.0 Transitional//EN"> <!-- saved from url=(0047)http://www.modulus.synth.net/projects/polymcv.c --> <HTML><HEAD> <META http-equiv=Content-Type content="text/html; charset=windows-1252"> <META content="MSHTML 5.50.4134.100" name=GENERATOR></HEAD> <BODY><XMP>/************
in „kompilieren von C-Quellcode“ · Mikrocontroller und Digitale Elektronik ·
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Datei
SECU.vhd
of fixed phase shift from -255 to 255 SIM_MODE => "SAFE", -- Simulation: "SAFE" vs "FAST", see "Synthesis and Simulation -- Design Guide" for details STARTUP_WAIT => FALSE) -- Delay configuration DONE until DCM LOCK, TRUE/FALSE port map(CLK0 => CLK, -- 0 degree DCM CLK ouptput CLK180 => open, -- 180
in „Problem mit dem Laden eines Counters“ · FPGA, VHDL & Co. ·
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Datei
BarrelShifter.vhd
-1)-i downto 0); --Hier ist Letztendlich das Shiften end loop; --das als Multiplexer strucktur Synthesiert wird --Left ShiftLeft(0) := Din; for i in 1 to Width-1 loop ShiftLeft(i) := Din(Width-1 downto i) & (i-1 downto 0 => '0'); end loop; if Sel(ShiftWidth) = '1' then --Bei einer 1 im höchsten Bit von
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Datei
Frequency_Generator.vhd
begin if rising_edge (CLK) then phase_accumulator <= phase_accumulator + dds_control_word; end if; synth_clk <=phase_accumulator(31); end process phase_acc; freq_divide: process(synth_clk, RESET) begin if rising_edge (synth_clk) then frequency_divider <= frequency_divider + 1; end if; end process freq_divide; freq_scaling: process(frequency_divider, dds_scaling_word, synth_clk) begin case dds_scaling_word is when "00000" =>frequency_out <= synth_clk; when "00001" =>frequency_out <= frequency_divider(0); when "00010" =>frequency_out <= frequency_divider(1); when "00011"
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Datei
LVDS_CLOCK_IN.vhd
degree DCM CLK output CLKDV => open, -- Divided DCM CLK out (CLKDV_DIVIDE) CLKFX => open, -- DCM CLK synthesis out (M/D) CLKFX180 => open, -- 180 degree CLK synthesis out LOCKED => open, -- DCM LOCK status output PSDONE => open, -- Dynamic phase adjust done output STATUS => open, -- 8-bit DCM status bits
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Datei
PCK_CRC7_D32.vhd
IMPLIED -- WARRANTIES OF MERCHANTIBILITY AND FITNESS FOR A PARTICULAR PURPOSE. -- -- Purpose : synthesizable CRC function -- * polynomial: (0 1 2 3 4 5 6 7) -- * data width: 32 -- -- Info : tools@easics.be -- http://www.easics.com -----------------------------------------------------------------------
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Datei
pwm_sc.vhd
Device: spartan3 --Purpose: -- This vhdl netlist is translated from an ECS schematic. It can be -- synthesis and simulted, but it should not be modified. -- library ieee; use ieee.std_logic_1164.ALL; use ieee.numeric_std.ALL; library UNISIM; use UNISIM.Vcomponents.ALL; entity pwm_sc is port ( Button : in
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Datei
pwm_sc.vhd
Device: spartan3 --Purpose: -- This vhdl netlist is translated from an ECS schematic. It can be -- synthesis and simulted, but it should not be modified. -- library ieee; use ieee.std_logic_1164.ALL; use ieee.numeric_std.ALL; library UNISIM; use UNISIM.Vcomponents.ALL; entity pwm_sc is port ( clk : in std_logic
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Datei
RFM22_Config.h
Trimming // von .. geändert wegen Errata 0x00, // 0x5B - VCO Calibration/Override 0x0E, // 0x5C - Synthesizer Test 0x00, // 0x5D - Block Enable Override 1 0x40, // 0x5E - Block Enable Override 2 //90 0x00, // 0x5F - Block Enable Override 3 0x00, // 0x60 - Channel Filter Coefficient Address 0x00, // 0x61
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Datei
main.c
RF_SetRX() { disable_interrupts(); RF_Init_SPI(); RF_CMD(0x82,0xC8); //Receiver Chain einschalten, Synth aus. RF_GetStatus(); // !!! Status holen, sonst klappt es nicht !!! INTCONbits.INT0IF=0; //INT0 Anzeigeflag löschen RF_CMD(0xCA,0x81); // Fifo Reset RF_CMD(0xCA,0x83); enable_interrupts(); } /* unsigned
in „RFM12 - Funkmodul“ · Mikrocontroller und Digitale Elektronik ·
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Datei
main.c
RF_SetRX() { disable_interrupts(); RF_Init_SPI(); RF_CMD(0x82,0xC8); //Receiver Chain einschalten, Synth aus. RF_GetStatus(); // !!! Status holen, sonst klappt es nicht !!! INTCONbits.INT0IF=0; //INT0 Anzeigeflag löschen RF_CMD(0xCA,0x81); // Fifo Reset RF_CMD(0xCA,0x83); enable_interrupts(); } /* unsigned
in „PIC18: Getesteter CCS C-Code für RFM12 Modul“ · Projekte & Code ·
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Datei
main.c
RF_SetRX() { disable_interrupts(); RF_Init_SPI(); RF_CMD(0x82,0xC8); //Receiver Chain einschalten, Synth aus. RF_GetStatus(); // !!! Status holen, sonst klappt es nicht !!! INTCONbits.INT0IF=0; //INT0 Anzeigeflag löschen RF_CMD(0xCA,0x81); // Fifo Reset RF_CMD(0xCA,0x83); enable_interrupts(); } /* unsigned
in „Beispielprogramm für RFM12 433MHz Funk-Module“ · Projekte & Code ·
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Datei
detailed_synthesis_report.txt
Total CPU time to Xst completion: 0.11 secs --> Reading design: Modulator.prj TABLE OF CONTENTS 1) Synthesis Options Summary 2) HDL Compilation 3) Design Hierarchy Analysis 4) HDL Analysis 5) HDL Synthesis 5.1) HDL Synthesis Report 6) Advanced HDL Synthesis 6.1) Advanced HDL Synthesis Report 7) Low Level
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Datei
Report_Samsung_X20.htm
nbsp;<TD>Nicht unterstützt <TR><TD> <TR><TD><TD CLASS=dt COLSPAN=5>[ Microsoft GS Wavetable SW Synth [Emuliert] ] <TR><TD> <TR><TD><TD><TD COLSPAN=3><B>DirectMusic Geräteeigenschaften:</B> <TR><TD><TD><TD><TD>Gerätebeschreibung <TD>Microsoft GS Wavetable SW Synth [Emuliert] <TR><TD
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Datei
sdram_tb.vhd
03:39:40 02/13/2010 -- Design Name: sdram_access -- Module Name: D:/krams/syn-hardware/platformen/synth_board_2/vhdl/testing/sdram_tb.vhd -- Project Name: testing -- Target Device: -- Tool versions: -- Description: -- -- VHDL Test Bench Created by ISE for module: sdram_access -- -- Dependencies: -- -
in „Frage zu SDRAM“ · FPGA, VHDL & Co. ·
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Datei
RFM_22.h
byte; struct{ unsigned char RX_state:1; // bit 0 unsigned char TX_state:1; unsigned char Synthesizer_Lock_Detect:1; unsigned char Frequency_Error:1; unsigned char Header_Error:1; unsigned char FIFO_empty:1; unsigned char FIFO_underflow:1; unsigned char FIFO_overflow:1; // bit 7 }; } _Device_Status; //
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Datei
A90S8535.vhd
Wallner (jesus@opencores.org) -- -- All rights reserved -- -- Redistribution and use in source and synthezised forms, with or without -- modification, are permitted provided that the following conditions are met: -- -- Redistributions of source code must retain the above copyright notice, -- this list of conditions and the following disclaimer. -- -- Redistributions in synthesized form must reproduce the above copyright -- notice, this list of conditions and the following disclaimer in the -- documentation and/or other materials provided with the distribution. -- -- Neither
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Datei
dap_mod_cfg.h
PT_INPUT 1 #define PT_OUTPUT 2 #define PT_CTRL 3 #define PT_VALPIN 4 #define MOD_STARTUP_SETUP SIMPLE_SYNTH extern U16 uiPVConvert (U8 ucVal, U16 uiOpts); #endif #ifdef DAP_MOD_VALUE_CONVERT DAP_MOD_VALUE_CONVERT (PVC_7BIT_UNS, uiPVConvert, 0x00) DAP_MOD_VALUE_CONVERT (PVC_7BIT_SIG, uiPVConvert, 0x01) DAP_MOD_VALUE_CONVERT
in „Konzeptphase für Hobbyprojekt“ · Mikrocontroller und Digitale Elektronik ·