oVINange: 6V to 42V (LM3409/LM3409Q/LM3409N3 SOP-10 package. These features combine to make the: 6V to 75V (LM3409HV/LM3409QHV) 4 LM3409 family of devices ideal for use as constant currentigh-side Current Sense 9 sources for driving LEDs where forward cu■rCycle-by-Cycle Current Limit H easily achievable.
Peak) × 1ms current happens Clock frequency ｆcp － 2.02 2.16 5.88 MHz Frame frequency *2 ｆ ＦＲＭ － 70 75 － Hz Current consumption IDD *3 － 40 60 mA for logic Power consumption Pdisp － 132 198 mW *1 Maximum contrast is obtained by adjusting the LCD driving voltage (Vop=Vcont) while at the viewing angle of
resistance while provide rugged, reliable, and fast switching • High density cell design for extremely lDS(ON) performance.These products are particularly suited for • Rugged and Reliable low voltage, low current applications such as small • Compact industry standard SOT-23 surface mount servo motor control
resistance while provide rugged, reliable, and fast switching • High density cell design for extremely lDS(ON) performance.These products are particularly suited for • Rugged and Reliable low voltage, low current applications such as small • Compact industry standard SOT-23 surface mount servo motor control
resistance while provide rugged, reliable, and fast switching • High density cell design for extremely lDS(ON) performance.These products are particularly suited for • Rugged and Reliable low voltage, low current applications such as small • Compact industry standard SOT-23 surface mount servo motor control
resistance while provide rugged, reliable, and fast switching • High density cell design for extremely lDS(ON) performance.These products are particularly suited for • Rugged and Reliable low voltage, low current applications such as small • Compact industry standard SOT-23 surface mount servo motor control
125 135 145 °C Temperature Thermal Shutdown 70 °C Hysteresis OUTPUT TJ= 25 °C 15.6 18.0 ON-State R DS(ON) D = 50 mA Ω Resistance T J 100 °C 25.7 30.0 OFF-State I V BP= 6.2 V, EN/UV 0 V, DSS V = 560 V, T = 125 °C 50 µA Leakage DS J Breakdown BV VBP= 6.2 V, EN/UV 0 V, Voltage DSS I = 100 µA, T = 25 °C
N G R E G U L A T O R S 7803SR Efficiency 7803SR Input Current 90 0.25 85 ) 0.20 80 100% LOAD S M 75 ( 100% LOAD C 50% LOAD T 0.15 N 70 N I 25% LOAD R I R 0.10 F 65 U 50% LOAD E T 60 U P 0.05 55 I 25% LOAD 50 0.00 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36
discharge and greater than EIAJ IC121 Machine Model 0kΩ 200pF 400V 15kV for air discharge. US ESD DS 5.3 Charged Device Model 0kΩ NA 3kV The “Modified” MIL-STD-3015.7 condition is defined as an “in-circuit” method of ESD testing, the V+ and V- pins have a return path to †Upper limit of laboratory test
provided power supply from the demo board or target application, powers the MPLAB ICD module. 9V, 0.75A power supply (PICSTART® Plus or equivalent) Development Tools from Microchip MPLAB®IDE Integrated Development Environment Customer Support: MPASM™ Assembler Universal PICmicro macro-assembler MPLINK
100mA 74 DTA114WKA Rho N SC59 pnp dtr 10k + 4k7 50V 100mA 74 2SC5005 Nec N - npn RF 5.5GHz @5V 5mA 75s BAS70-05 Sie B SOT23 dual cc BAS70 75s BAS70-05W Sie B SOT323 dual cc BAS70 75p BAS70-05 Phi B SOT23 dual cc BAS70 75t BAS70-05W Phi B SOT323 dual cc BAS70 75t BAS70-05 Phi B SOT23 dual cc BAS70 75- BAS70-05W Phi B SOT323 dual cc BAS70 75 BFQ75 Sie CX SOT173 pnp fT 5GHz 12V 50mA 75Y BZV49-C75 Phi O SOT89 75V 1W zener 76s BAS70-06 Sie A SOT23 dual ca BAS70 BAS70-06 Phi A SOT23 dual ca BAS70 76p 76t BAS70-06 Phi A SOT23 dual ca BAS70 76t
Table 2 1: Volume Control The analog volume control covers a range from Volume/dB AVOL +18 dB to −75 dB. The lowest step is the mute posi- tion. 18.0 111000 Step size is split into a 3-dB and a 1.5-dB range: 16.5 110111 −75 dB...−54 dB: 3 dB step size 15.0 110110 −54 dB...+18 dB:1.5 dB step size 13.5
product is the BTS 734L1). For minimized R the two low-side switches are produced in S-FET logic level DS ON technology (the comparable standard product is the BUZ 100SL). Each drain of these three chips is mounted on separated leadframes (see Figure 1). The sources of all four power transistors are connected
EEVblog #675 - How To Reverse Engineer A Rigol DS1054Z
WWW.EEVBLOG.COM BY DAVE JONES Dave CAL
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ATTENUATOR
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OUT TO DIFF AMP
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means port 8 and 0 are in this VLAN. VLAN Entry [E] VLAN ID [E] 74.7~ This register along with byte 75.3~75.0 defines the IEEE 802.1Q 12-bit 0000 [7:0] 74.0 VLAN identifier of VLAN E. 0100 Reserved 75.7~ 1111 75.4 VLAN ID [E] 75.3~ This register along with byte 74.7~74.0 defines the IEEE 802.1Q 12-bit
12V Versions ISTBY StandbyQuiescent ON/OFF Pin = 0V 50 100/150 μA Current ICL Current Limit 7 6.1/5.75 8.3/8.75 A I Output Leakage V = 40V, ON/OFF Pin = 0V L IN μA Current VSWITCH = 0V 200 V = −1V 16 15 mA SWITCH R DS(ON) Switch On- SWITCH = 5A 0.12 0.14/0.225 Ω Resistance fO Oscillator Measured at Switch
Regulator General Description Features The SY8105 is a high efficiency 500 kHz synchronous • low R DS(ON) for internal switches (top/bottom): step-down DC-DC converter capable of delivering 5.0A 40mΩ/26mΩ current. The SY8105 operates over a wide input voltage • 4.5-18V input voltage range range from
D PD7 2 N 2,2k +5V GND5 +5V 7 k 2 N D 1 3 2 1 , 1 G S R 4 8 R3 220 I 4 1 Luefter2 0 0 0 M J1 1 1 1 DS18B20 R11 X X X DS1820 OK2 V GND + C C Brake und Getriebetemp Eingänge Wahlhebel GND GND X3A Thermistor X4A PSWITCH-N 2,7k J5 +5V +5V Gehäuselüfter kommt vom thermistor X3B 1 4 X4B PSWITCH-R R5 2 0 Brake
2 π frequency vds 'frequency' -> PSPICE variable VDS Cout C out Upper trace: C outas a function of DS Lower trace: C outas a function of frequency for various DS values. • About 1 nF at 50V • For significant improvement added snubber capacitance > 1nF 103 Simulating Snubbing Effects 'turn-off' • Transient
the typical frequency deviation during a half 30 line cycle as a percentage of designed power, 50%, 75% and 100%. 20 350 350 10 85 130 175 220 265 300 300 RMS Line voltage (V) 250 P=50% 250 Fig. 5. Minimum switching frequency vs. RMS line voltage. L=390 H, P=75% resonant frequency=360kHz, OUT=200W. P=
hold time 0 - - ns tDS8 Data setup time 80 - - ns tDH8 Data hold time 30 - - ns tCH8 Output disable time 20 - 140 ns C L = 100pF tACC8 RD access time - - 280 ns C L = 100pF tCCLW Control L pulse width (WR) 200 - - ns tCCLR
hold time 0 - - ns tDS8 Data setup time 80 - - ns tDH8 Data hold time 30 - - ns tCH8 Output disable time 20 - 140 ns C L = 100pF tACC8 RD access time - - 280 ns C L = 100pF tCCLW Control L pulse width (WR) 200 - - ns tCCLR
Voltage VCC 3.0 3.3 3.6 VDC Power Supply Input Current I 195 225 600 mA 1 CC Power Consumption Pc - 0.75 1.98 Watt 1 LED : LED current IL 75.0 80.0 mA 2 LED voltage VL 17.3 25.0 V LED power PL 3.89 6.00 W LED chain 3 3 Life Time continuous 20,000 - - Hrs 4 Life Time intermittent 54,000 - - Cycles 5 Note
undervolts) LED is also on in the standby state. GreenLEDnormalvoltageindicators RedLEDerrorindication DS7 DS4 DS3 DS8 DS5 DS2 DS6 DS13 DS9 DS10 DS11 DS12 +22 +16.5 +15 +14.4 +5 -14.4 -15 -22 OT OV UV OI Figure 6–2: Power supply status indicators for the CRT display power supply GreenLEDnormalvoltageindicators RedLEDerrorindication DS4 DS3 DS8 DS5 DS2 DS6 DS9 DS10 DS11 DS12 +16.5 +15 +14.4 +5 -14.4 -15 OT OV UV OI Figure 6–3: Power supply status indicators for the flat panel display power supply AM700 Audio Measurement Set Service
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