MSP430 Baudrate Setting ändern

case MHz_1:

        CLEARPORTPIN(P9DIR, BIT4+BIT5);    // set port pin to INPUT

        SETPORTPIN(P9OUT, BIT4+BIT5);

        CLEARPORTPIN(P8OUT,ENABLE_TX);

       // SETPORTPIN(P9DIR,TXD_R_PULLUP+RXD_R_PULLUP);        // --> output

       // SETPORTPIN(P9OUT,TXD_R_PULLUP+RXD_R_PULLUP);        // pullup enable

        SETPORTPIN(P9SEL,RXD+TXD);                    //9.4+9.5

        // portpins are controlled by usci module

        UCA2IE &=~(1<< UCRXIE);

        UCA2CTL1 |= UCSWRST+UCRXEIE+UCBRKIE;                // put USCI state machine in reset

        // asynch. uart mode,1 stop bit,8databit,lsb first,no parity

        //        UCA1CTL1 |= UCSSEL_1;               // ACLK

        if (baud== bd_4800)

            UCA2CTL1 |= UCSSEL_1;               // ACLK --> REFO 32,768

        else

            UCA2CTL1 |= UCSSEL_2;        //SMCLK --> 1 MHZ

        // SMCLK Frequency = 1 MHz

        if (parity==even)

        {

            UCA2CTL0 |= UCPEN;

            UCA2CTL0 |=UCPAR;     //Even Parity

        }

        else if (parity==odd)

        {

            UCA2CTL0 |= UCPEN;

            UCA2CTL0 &=~UCPAR;

        }

        switch (baud)

        {

        case bd_4800:                  //not allowed

            UCA2BR0=6;

            UCA2BR1=0;

            UCA2MCTL = UCBRS_7;

            break;

        case bd_9600:

            UCA2BR0=104;

            UCA2BR1=0;

            UCA2MCTL = UCBRS_1;

            break;

        case bd_19200:

            UCA2BR0=52;

            UCA2BR1=0;

            UCA2MCTL = UCBRS_0;

            break;

        case bd_38400:

            UCA2BR0=26;

            UCA2BR1=0;

            UCA2MCTL = UCBRS_0;

            break;

        default:

            //9600

            UCA2BR0=104;

            UCA2BR1=0;

            UCA2MCTL = UCBRS_1;

            break;

        }

        break;

    case MHz_4:

        break;

    default:

        return false;

    }

    UCSCTL7 |= 0x0010;

    UCA2CTL1 &= ~UCSWRST;               // **Initialize USCI state machine**

    UCA2IE |= UCRXIE;