Gast
#203697
versuche gerade mich mit quartus zu beschäftigen habe ein verilog file eingegeben die sytax ist ok aber wenn ich den compilieren will bekomme die diese meldung weiss jemand abhife Info: ******************************************************************* Info: Running Quartus II Analysis & Synthesis Info: Version 5.0 Build 148 04/26/2005 SJ Web Edition Info: Processing started: Mon Jun 27 21:32:22 2005 Info: Command: quartus_map --read_settings_files=on --write_settings_files=off count -c count Info: Found 1 design units, including 1 entities, in source file count.v Info: Found entity 1: counter10 Error: Top-level design entity "count" is undefined Error: Quartus II Analysis & Synthesis was unsuccessful. 1 error, 0 warnings Error: Processing ended: Mon Jun 27 21:32:22 2005 Error: Elapsed time: 00:00:00