Linux MPLABX XC8 usart.h nicht gefunden/vorhanden

// CONFIG1H

#pragma config FOSC = XT   // Oscillator Selection bits (Internal oscillator block)

#pragma config PLLCFG = OFF     // 4X PLL Enable (Oscillator used directly)

#pragma config PRICLKEN = ON    // Primary clock enable bit (Primary clock is always enabled)

#pragma config FCMEN = OFF      // Fail-Safe Clock Monitor Enable bit (Fail-Safe Clock Monitor disabled)

#pragma config IESO = OFF       // Internal/External Oscillator Switchover bit (Oscillator Switchover mode disabled)

// CONFIG2L

#pragma config PWRTEN = OFF     // Power-up Timer Enable bit (Power up timer disabled)

#pragma config BOREN = SBORDIS  // Brown-out Reset Enable bits (Brown-out Reset enabled in hardware only (SBOREN is disabled))

#pragma config BORV = 190       // Brown Out Reset Voltage bits (VBOR set to 1.90 V nominal)

// CONFIG2H

#pragma config WDTEN = OFF      // Watchdog Timer Enable bits (Watch dog timer is always disabled. SWDTEN has no effect.)

#pragma config WDTPS = 32768    // Watchdog Timer Postscale Select bits (1:32768)

// CONFIG3H

#pragma config CCP2MX = PORTC1  // CCP2 MUX bit (CCP2 input/output is multiplexed with RC1)

#pragma config PBADEN = ON      // PORTB A/D Enable bit (PORTB<5:0> pins are configured as analog input channels on Reset)

#pragma config CCP3MX = PORTB5  // P3A/CCP3 Mux bit (P3A/CCP3 input/output is multiplexed with RB5)

#pragma config HFOFST = OFF     // HFINTOSC Fast Start-up (HFINTOSC output and ready status are delayed by the oscillator stable status)

#pragma config T3CMX = PORTC0   // Timer3 Clock input mux bit (T3CKI is on RC0)

#pragma config P2BMX = PORTD2   // ECCP2 B output mux bit (P2B is on RD2)

#pragma config MCLRE = EXTMCLR  // MCLR Pin Enable bit (MCLR pin enabled, RE3 input pin disabled)

// CONFIG4L

#pragma config STVREN = ON      // Stack Full/Underflow Reset Enable bit (Stack full/underflow will cause Reset)

#pragma config LVP = OFF         // Single-Supply ICSP Enable bit (Single-Supply ICSP enabled if MCLRE is also 1)

#pragma config XINST = OFF      // Extended Instruction Set Enable bit (Instruction set extension and Indexed Addressing mode disabled (Legacy mode))

// CONFIG5L

#pragma config CP0 = OFF        // Code Protection Block 0 (Block 0 (000800-001FFFh) not code-protected)

#pragma config CP1 = OFF        // Code Protection Block 1 (Block 1 (002000-003FFFh) not code-protected)

#pragma config CP2 = OFF        // Code Protection Block 2 (Block 2 (004000-005FFFh) not code-protected)

#pragma config CP3 = OFF        // Code Protection Block 3 (Block 3 (006000-007FFFh) not code-protected)

// CONFIG5H

#pragma config CPB = OFF        // Boot Block Code Protection bit (Boot block (000000-0007FFh) not code-protected)

#pragma config CPD = OFF        // Data EEPROM Code Protection bit (Data EEPROM not code-protected)

// CONFIG6L

#pragma config WRT0 = OFF       // Write Protection Block 0 (Block 0 (000800-001FFFh) not write-protected)

#pragma config WRT1 = OFF       // Write Protection Block 1 (Block 1 (002000-003FFFh) not write-protected)

#pragma config WRT2 = OFF       // Write Protection Block 2 (Block 2 (004000-005FFFh) not write-protected)

#pragma config WRT3 = OFF       // Write Protection Block 3 (Block 3 (006000-007FFFh) not write-protected)

// CONFIG6H

#pragma config WRTC = OFF       // Configuration Register Write Protection bit (Configuration registers (300000-3000FFh) not write-protected)

#pragma config WRTB = OFF       // Boot Block Write Protection bit (Boot Block (000000-0007FFh) not write-protected)

#pragma config WRTD = OFF       // Data EEPROM Write Protection bit (Data EEPROM not write-protected)

// CONFIG7L

#pragma config EBTR0 = OFF      // Table Read Protection Block 0 (Block 0 (000800-001FFFh) not protected from table reads executed in other blocks)

#pragma config EBTR1 = OFF      // Table Read Protection Block 1 (Block 1 (002000-003FFFh) not protected from table reads executed in other blocks)

#pragma config EBTR2 = OFF      // Table Read Protection Block 2 (Block 2 (004000-005FFFh) not protected from table reads executed in other blocks)

#pragma config EBTR3 = OFF      // Table Read Protection Block 3 (Block 3 (006000-007FFFh) not protected from table reads executed in other blocks)

// CONFIG7H

#pragma config EBTRB = OFF      // Boot Block Table Read Protection bit (Boot Block (000000-0007FFh) not protected from table reads executed in other blocks)

#include <p18f45k22.h>

#define USE_OR_MASKS

#include <plib/usart.h>

unsigned char Rxdata[25];

unsigned char Txdata[] = "MICROCHIP_USART";

void main(void)

{

    unsigned char config=0,spbrg=0,baudconfig=0,i=0;

    Close1USART(); //turn off usart if was previously on

//-----configure USART -----

    config = USART_TX_INT_OFF | USART_RX_INT_OFF | USART_ASYNCH_MODE | USART_EIGHT_BIT | USART_CONT_RX | USART_BRGH_HIGH;

//-----SPBRG needs to be changed depending upon oscillator frequency-------

    spbrg = 25; //At 4Mhz of oscillator frequency & baud rate of 9600.

    Open1USART(config, spbrg); //API configures USART for desired parameters

    baudconfig = BAUD_8_BIT_RATE | BAUD_AUTO_OFF;

    baud1USART (baudconfig);

//------USART Transmission ----

    while(Busy1USART()); //Check if Usart is busy or not

    puts1USART((char *)Txdata); //transmit the string

    //---USART Reception ---

    gets1USART((char *)Rxdata,24); //Recieve data upto 24 bytes

    while(Busy1USART()); //Check if Usart is busy or not

    puts1USART((char *)Rxdata); //echo back the data recieved back to host

    Close1USART();

    while(1); //end of program

}

#include <p18f45k22.h>

// CONFIG1H

#pragma config FOSC = XT

#pragma config PLLCFG = OFF

#pragma config PRICLKEN = OFF

#pragma config FCMEN = OFF

#pragma config IESO = OFF

// CONFIG2L

#pragma config PWRTEN = OFF

#pragma config BOREN = SBORDIS

#pragma config BORV = 190 

// CONFIG2H

#pragma config WDTEN = OFF

#pragma config WDTPS = 32768

// CONFIG3H

#pragma config CCP2MX = PORTC1

#pragma config PBADEN = ON

#pragma config CCP3MX = PORTB5

#pragma config HFOFST = OFF

#pragma config T3CMX = PORTC0

#pragma config P2BMX = PORTD2

#pragma config MCLRE = EXTMCLR

// CONFIG4L

#pragma config STVREN = ON  

#pragma config LVP = OFF    

#pragma config XINST = OFF  

// CONFIG5L

#pragma config CP0 = OFF

#pragma config CP1 = OFF

#pragma config CP2 = OFF

#pragma config CP3 = OFF

// CONFIG5H

#pragma config CPB = OFF

#pragma config CPD = OFF

// CONFIG6L

#pragma config WRT0 = OFF

#pragma config WRT1 = OFF

#pragma config WRT2 = OFF

#pragma config WRT3 = OFF

// CONFIG6H

#pragma config WRTC = OFF

#pragma config WRTB = OFF

#pragma config WRTD = OFF

// CONFIG7L

#pragma config EBTR0 = OFF

#pragma config EBTR1 = OFF

#pragma config EBTR2 = OFF

#pragma config EBTR3 = OFF

// CONFIG7H

#pragma config EBTRB = OFF

void USART_Setup();

void USART_Rein();

void USART_Raus();

unsigned char Daten;

void main(void)

{

    USART_Setup();

    while(1)

    {

    USART_Rein();

    USART_Raus();

    }

}

void USART_Setup(void)

    {

    // PORT's initialisieren

    TRISCbits.TRISC6=1;

    TRISCbits.TRISC7=1;

    ANSELCbits.ANSC6=0;

    ANSELCbits.ANSC7=0;

    // USART initialisieren

    TXSTA1=0b00100100;

    RCSTA1=0b10010000;

    BAUDCON1bits.BRG16=0;

    // USART Baudrate einstellen

    SPBRGH1=0;

    SPBRG1=25;

    }

void USART_Rein(void)

    {

    while(PIR1bits.RC1IF==0)

    {

    }

    Daten=RCREG1;

    }

void USART_Raus(void)

    {

    while(PIR1bits.TX1IF==0)

    {

    }

    TXREG1=Daten;

    }