SDRAM Timing mit Cortex-M3

Ich möchte eine Baugruppe in Betrieb nehmen. Während fast alles klappt, 
ist der SDRAM etwas nervig. Es ist ein IS42S16800F. Wenn ich folgende 
Registerwerte benutze, funtkioniert im RamTest nur dei Hälfte.

Der Mikrocontroller läuft mit 120 MHz Taktfrequenz.

// EMC runs at half CPU clock
LPC_SC->EMCCLKSEL = 1;

SCS = 0x61;         // avoid SDRAM reset on watchdog reset
PCONP = 0x4288fde;  // enable EMC
LPC_SC->EMCDLYCTL = 0x1010; // setup with slow delays
// reset and enable EMC
EMCControl = 1;
EMCControl = 0;
// map all pins with LPC_IOCON
LPC_IOCON->P3_0 = 0xb1;
...
LPC_IOCON->P3_15 = 0xb1;
LPC_IOCON->P4_0 = 0xb1;
...
LPC_IOCON->P4_14 = 0xb1;
// control pins
LPC_IOCON->P4_24 = 0xb1; // OEN
LPC_IOCON->P4_25 = 0xb1; // WEN
LPC_IOCON->P4_30 = 0xb1; // CSN[0]
LPC_IOCON->P2_20 = 0xb1; // DYCSN[0]
LPC_IOCON->P2_24 = 0xb1; // CKE[0]
//  128 Mbit (8Mx16), 4 banks, row length = 12, column length = 9
LPC_EMC->DynamicConfig0 = 0x1480;
LPC_IOCON->P2_16 = 0xb1; // CASN
LPC_IOCON->P2_17 = 0xb1; // RASN
LPC_IOCON->P2_18 = 0xb1; // CLK[0]
LPC_IOCON->P2_28 = 0xb1; // DQM[0]
LPC_IOCON->P2_29 = 0xb1; // DQM[1]
LPC_EMC->DynamicRasCas0 = 0x0202; // RAS=2, CAS=2
LPC_EMC->DynamicReadConfig = 1; // use EMCCLKDELAY as command strategy
// timing
LPC_EMC->DynamicRP = 1;
LPC_EMC->DynamicRAS = 2;
LPC_EMC->DynamicSREX = 4;
LPC_EMC->DynamicAPR = 1;
LPC_EMC->DynamicDAL = 4;
LPC_EMC->DynamicWR = 1;
LPC_EMC->DynamicRC = 3;
LPC_EMC->DynamicRFC = 3;
LPC_EMC->DynamicXSR = 4;
LPC_EMC->DynamicRRD = 0;
LPC_EMC->DynamicMRD = 1;
// send command NOP
LPC_EMC->DynamicControl = 0x183;
DelayMiliseconds(200);
// send command PRECHARGE ALL, shortest possible refresh period
LPC_EMC->DynamicControl = 0x100;
LPC_EMC->DynamicRefresh = 1;
WaitAHBCycles(128);
// set correct refresh period
LPC_EMC->DynamicRefresh = 59;
WaitAHBCycles(32);
// send command MODE
LPC_EMC->DynamicControl = 0x80;
uint32_t *p = 0xA0023000;
uint32_t dummy = *p;
WaitAHBCycles(128);
// send command NORMAL
LPC_EMC->DynamicControl = 0;
// enable buffer
LPC_EMC->DynamicConfig0 = 0x81480; // |= 0x80000
DelayMilliseconds(1);

LPC_SC->EMCDLYCTL = 0x1111;

Hat schon mal jedmand diesen SDRAM an einen NXP LPC178x erfolgreich 
betrieben. Wo mag das Problem mit der Initialisierung liegen?