Hallo!
Ich moechte mehrere samples vom ADCA eines ATxmega32A4U mit DMA
auslesen, aber ich bekomme immer nur 0x0000 in den buffer geschrieben.
Das Vorgehen ist so:
1. ADCA, differenziell zu PADGND, in FREERUNning mode setzen
1. In einer Timer ISR alle 100ms:
- Mittelwert der 16 samples von zuvor bilden
- DMA Transaktion starten, 2B je burst, 16 bursts gesamt
ADCA setup:
1 | #include <string.h> /* memset() */
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2 | #include <stdint.h>
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3 |
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4 | #define NUM_SAMPLES ((sizeof(samples) / sizeof(samples[0])))
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5 | static uint16_t samples[16];
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6 |
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7 | void
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8 | init(void)
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9 | {
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10 | memset(samples, 0, sizeof(samples));
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11 |
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12 | /* configure ADCA */
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13 | ADCA.CTRLA = ADC_DMASEL_OFF_gc | ADC_ENABLE_bm;
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14 | ADCA.CTRLB = ADC_CURRLIMIT_NO_gc | ADC_CONMODE_bm
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15 | | ADC_RESOLUTION_12BIT_gc;
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16 | ADCA.REFCTRL = ADC_REFSEL_AREFB_gc;
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17 | ADCA.PRESCALER = ADC_PRESCALER_DIV512_gc;
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18 | ADCA.EVCTRL = 0;
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19 |
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20 | ADCA.CH0.CTRL = ADC_CH_GAIN_1X_gc | ADC_CH_INPUTMODE_DIFF_gc;
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21 | /* "ADC_CH_MUXNEG_PADGND" undefined, corresponds to 0x05 */
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22 | ADCA.CH0.MUXCTRL = ADC_CH_MUXPOS_PIN1_gc | 0x05;
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23 | ADCA.CH0.INTCTRL = 0;
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24 | ADCA.CH0.SCAN = 0;
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25 |
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26 | ADCA.CTRLA |= ADC_FLUSH_bm;
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27 | ADCA.CTRLB |= ADC_FREERUN_bm;
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28 | ADCA.CH0.CTRL |= ADC_CH_START_bm;
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29 | }
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ISR & helper functions:
1 | static void
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2 | start_dma(void)
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3 | {
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4 | /* configure DMA.CH1 */
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5 | DMA.CH1.CTRLA &= ~DMA_CH_ENABLE_bm;
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6 | while (DMA.CH1.CTRLA & DMA_CH_ENABLE_bm)
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7 | nop(1);
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8 | DMA.CH1.CTRLA |= DMA_CH_RESET_bm;
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9 | while (DMA.CH1.CTRLA & DMA_CH_RESET_bm)
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10 | nop(1);
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11 | DMA.CH1.ADDRCTRL =
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12 | DMA_CH_SRCRELOAD_BURST_gc | DMA_CH_SRCDIR_INC_gc |
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13 | DMA_CH_DESTRELOAD_NONE_gc | DMA_CH_DESTDIR_INC_gc;
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14 | uint16_t adc_addr = (uint16_t) &ADCA.CH1.RESL;
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15 | DMA.CH1.SRCADDR0 = adc_addr & 0xff;
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16 | DMA.CH1.SRCADDR1 = (adc_addr >> 8) & 0xff;
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17 | DMA.CH1.SRCADDR2 = 0;
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18 | DMA.CH1.DESTADDR0 = ((uint16_t) samples) & 0xff;
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19 | DMA.CH1.DESTADDR1 = (((uint16_t) samples) >> 8) & 0xff;
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20 | DMA.CH1.DESTADDR2 = 0;
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21 | DMA.CH1.TRIGSRC = DMA_CH_TRIGSRC_ADCA_CH0_gc;
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22 | DMA.CH1.TRFCNT = 2;
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23 | DMA.CH1.REPCNT = NUM_SAMPLES;
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24 | DMA.CH1.CTRLA =
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25 | DMA_CH_REPEAT_bm | DMA_CH_SINGLE_bm | DMA_CH_BURSTLEN_2BYTE_gc;
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26 |
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27 | DMA.CH1.CTRLA |= DMA_CH_ENABLE_bm;
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28 | }
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29 |
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30 | static void
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31 | avg_flt_samples(void)
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32 | {
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33 | uint32_t sum = 0;
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34 | for (uint8_t i = 0; i < NUM_SAMPLES; ++i)
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35 | sum += samples[i];
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36 | sum += NUM_SAMPLES / 2; /* for rounding */
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37 |
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38 | /* extern: measurement_buffer
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39 | * struct { uint8_t pending_data : 1; uint16_t measurement; }; */
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40 | measurement_buffer.pending_data = 1;
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41 | measurement_buffer.data = (uint16_t) (sum / NUM_SAMPLES);
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42 | }
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43 |
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44 |
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45 | ISR(TCC0_OVF_vect)
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46 | {
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47 | static enum {
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48 | INITIAL_RUN,
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49 | LATER_RUN
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50 | } state = INITIAL_RUN;
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51 |
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52 | if (INITIAL_RUN == state) {
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53 | /* it's the first time that we're here, so there's
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54 | * no data to precess yet */
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55 | start_dma();
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56 | state = LATER_RUN;
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57 | } else {
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58 | /* we're at a later run, so process the data and go for a new
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59 | * round */
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60 | if (!(DMA.CH1.CTRLB & (DMA_CH_CHBUSY_bm | DMA_CH_CHPEND_bm))
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61 | && (DMA.INTFLAGS & DMA_CH1TRNIF_bm)) {
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62 | /* DMA transaction has completed */
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63 | avg_flt_samples();
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64 | start_dma();
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65 | }
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66 | }
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67 | }
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Das Problem zeigt sich nun so:
- In samples[.] stehen immer nur 0x0000en
- Der ADC laeuft (manuelles Auslesen von ADCA.CH0.RES liefert
realistische
Werte)
- Der DMA laeuft, macht aber nur einen burst
Ich habe auch avr-gdb+avarice drangehaengt; dabei scheinen alle Register
usw. korrekt gesetzt zu werden, DMA wartet auf trigger, wird getriggert
(macht einen burst, REPCNT geht um 1 runter), und ist dann disabled.
Und das erscheint mir irgendwie seltsam...
Der obige Code funktioniert analog (BURSTLEN=TRFCNT=1) fuer einen UART
aber ohne Probleme.
Hat jemand eine Idee?
