2x werden die Daten 128-254 ausgegeben vom SRAM statt 0-254, woran liegt das bitte ?

library ieee;

use ieee.std_logic_1164.all; 

use ieee.numeric_std.all; 

use ieee.std_logic_unsigned.all;

entity sram_rx_tx is

  port( clk        : in    std_logic;

        ledr       : out   std_logic_vector (7 downto 0);

        sw         : in    std_logic_vector (2 downto 0);

        sram_adr   : out   std_logic_vector (17 downto 0);

        sram_io    : inout std_logic_vector (15 downto 0);

        ub     : out  std_logic;

        lb     : out  std_logic; 

        oe     : out  std_logic;

        ce     : out  std_logic;

        we     : out  std_logic;

        rxd    : in  std_logic;

        txd    : out  std_logic

        );       

end sram_rx_tx;

architecture behavioral of sram_rx_tx is

signal zustand    : std_logic_vector (2 downto 0)  := "000";

signal data_read  : std_logic_vector (15 downto 0) := "0000000000000000";

signal data_write : std_logic_vector (15 downto 0) := "0000000000000000";

signal read_write : std_logic := '0';  --(read = '1', write ='0')

signal sr_adr  : std_logic_vector (17 downto 0) := "000000000000000000";

signal data_w  : std_logic_vector (7 downto 0) := "00000000";

signal data_r  : std_logic_vector (7 downto 0) := "00000000";

signal rx_en   : std_logic;

signal rx_data : std_logic_vector (7 downto 0); 

signal tx_start : std_logic;

signal tx_data  : std_logic_vector (7 downto 0);

signal cnt  : integer range 0 to 50000000; 

signal test : std_logic;

component rs232_rx port(

  clk     : in  std_logic;

  rxd     : in  std_logic;

  rx_en   : out std_logic;

  rx_data : out std_logic_vector (7 downto 0) 

 );

end component;

component rs232_tx port(

  clk      : in  std_logic;

  txd      : out  std_logic;

  tx_start : in std_logic;

  tx_data  : in std_logic_vector (7 downto 0)

);  

end component;

begin

rx: rs232_rx

port map(

  clk     => clk,

  rxd     => rxd,

  rx_en   => rx_en,

  rx_data => rx_data

);

tx: rs232_tx

port map(

  clk      => clk,

  txd      => txd,

  tx_start => tx_start,

  tx_data  => tx_data

);

sram_io   <= data_write when read_write='0' else (others=>'Z');

data_read <= sram_io;

ub <= '0';

lb <= '0';

process (clk)

begin

  if rising_edge (clk) then   

    if (zustand = "001") then

      sram_adr   <= sr_adr;

      oe         <= '0';

      ce         <= '1';

      we         <= '1';

      read_write <= '0';

      data_write <= "00000000" & data_w;  

      zustand    <= "010";

    elsif (zustand = "010") then

      sram_adr   <= sr_adr; 

      oe         <= '0';

      ce         <= '0';

      we         <= '0';

      read_write <= '0';

      data_write <= "00000000" & data_w;

      zustand    <= "000";

    end if;

    if (zustand = "011") then

      sram_adr   <= sr_adr;      

      oe         <= '0';

      ce         <= '0';

      we         <= '1';   

      read_write <= '1';  

      zustand    <= "100";   

    elsif (zustand = "100") then

      sram_adr   <= sr_adr;      

      oe         <= '0';

      ce         <= '1';

      we         <= '1'; 

      read_write <= '0';

      data_r     <= data_read(7 downto 0);

      zustand    <= "000";

    end if;  

     if rx_en='1' then 

      sr_adr  <= sr_adr + 1;

      data_w  <= rx_data; 

      ledr    <= rx_data; 

      zustand <= "001";

    end if;  

    if sw(0) = '1' then

      sram_io  <= (others => 'Z');

      sram_adr <= (others => '0');

      we       <= '1';

      ce       <= '1';

      oe       <= '1'; 

    end if;

    if sw(1) = '1' then

      sr_adr  <= (others => '0');

      data_w  <= (others => '0');

      data_r  <= (others => '0');

    end if;

     if sw(2)='1' and test='1' and  sr_adr < 255 then   

      tx_start <= '1';

      zustand  <= "011";

      sr_adr   <= sr_adr+1;

      tx_data  <= data_r;

      test     <= '0';

    else

      tx_start<='0'; 

    end if; 

     if (cnt > 1000000)  then 

      cnt  <= 0; 

      test <= '1';  

    else

      cnt  <= cnt + 1; 

    end if;  

  end if;

end process;

end behavioral;