Interruptroutine verlassen AT91SAM7A3, Eclipse, GNU

static void interrupt_handler_PB18 (void)

{

    AT91C_BASE_AIC->AIC_IDCR = (1<<3); //disable interrupt 3 (=PIO B)

    AT91C_BASE_AIC->AIC_ICCR = (1<<3); //Interrupt Clear Command Register

    blink(10,100);

    blink(1,2000);

    while((AT91C_BASE_PIOB->PIO_PDSR & (1<<18)));//Wait for the PIOB 18 to be 0 (taster loslassen).

    blink(1,5000);

    blink(1,5000);

    AT91C_BASE_AIC->AIC_IVR = 0x0;

    blink(1,5000);

    AT91C_BASE_PIOA -> PIO_CODR = (LED_C | LED_D);

    AT91C_BASE_PIOA -> PIO_SODR = (LED_B );

    blink(20,100);

    AT91C_BASE_AIC->AIC_IECR = (1<<3); //enable interrupt 3

    blink(1,5000);

    AT91C_BASE_AIC->AIC_EOICR = 0x0;//End of interrupt command register

}

#include "project.h"

#define TOP_OF_MEMORY    (AT91C_ISRAM + AT91C_ISRAM_SIZE)

#define ABT_STACK_SIZE   8*3*4

#define IRQ_STACK_SIZE   8*3*4

#define ARM_MODE_ABT     0x17

#define ARM_MODE_FIQ     0x11

#define ARM_MODE_IRQ     0x12

#define ARM_MODE_SVC     0x13

#define I_BIT            0x80

#define F_BIT            0x40

/* Application startup entry point */

        .globl reset_handler

        .align 4

.section .vectors

.arm

/* Exception vectors (should be a branch to be detected as a valid code by the rom */

_exception_vectors:

reset_vector:

        ldr      pc, =reset_handler

undef_vector:

        b        undef_vector    /* Undefined Instruction */

swi_vector:

        b        swi_vector      /* Software Interrupt */

pabt_vector:

        ldr      pc, =pabt_handler     /* Prefetch Abort */

dabt_vector:

        ldr      pc, =dabt_handler     /* Data Abort */

rsvd_vector:

        b        rsvd_vector     /* reserved */

irq_vector:

        b        irq_handler     /* IRQ : read the AIC */

fiq_vector:

    b    fiq_handler

/*------------------------------------------------------------------------------

 *- Function             : fiq_handler

 *- Treatments           : FIQ Interrupt Handler.

 *- Called Functions     :

 *------------------------------------------------------------------------------*/

fiq_handler:

  b        fiq_handler

/*------------------------------------------------------------------------------

 *- Function             : irq_handler

 *- Treatments           : IRQ Controller Interrupt Handler.

 *- Called Functions     : AIC_IVR[interrupt]

 *------------------------------------------------------------------------------*/

irq_handler:

/* Save interrupt context on the stack to allow nesting */

        sub     lr, lr, #4

        stmfd   sp!, {lr}

        mrs     lr, SPSR

        stmfd   sp!, {r0, lr}

/* Write in the IVR to support Protect Mode */

        ldr     lr, =AT91C_BASE_AIC

        ldr     r0, [r14, #AIC_IVR]

        str     lr, [r14, #AIC_IVR]

/* Branch to interrupt handler in Supervisor mode */

        msr     CPSR_c, #ARM_MODE_SVC

        stmfd   sp!, {r1-r3, r4, r12, lr}

        mov     lr, pc

        bx      r0

        ldmia   sp!, {r1-r3, r4, r12, lr}

        msr     CPSR_c, #ARM_MODE_IRQ | I_BIT

/* Acknowledge interrupt */

        ldr     lr, =AT91C_BASE_AIC

        str     lr, [r14, #AIC_EOICR]

/* Restore interrupt context and branch back to calling code */

        ldmia   sp!, {r0, lr}

        msr     SPSR_cxsf, lr

        ldmia   sp!, {pc}^

/*------------------------------------------------------------------------------

 *- Function             : reset_handler

 *- Treatments           : Reset Interrupt Handler.

 *- Called Functions     : lowlevel_init

 *                         main

 *------------------------------------------------------------------------------*/

.section .text

reset_handler:

  ldr     pc, =_low_level_init

/*------------------------------------------------------------------------------

 *- Low level Init is performed in a C function: lowlevel_init

 *- Init Stack Pointer to a valid memory area before calling lowlevel_init

 *------------------------------------------------------------------------------*/

/*- Temporary stack in internal RAM for Low Level Init execution */

_low_level_init:

  ldr      r2, =_lp_ll_init

        ldmia    r2, {r0, r1}

        mov      sp, r1

        mov      lr, pc

        bx       r0                      /* Branch on C function (interworking) */

/*------------------------------------------------------------------------------

 *- Remap SRAM at 0x0

 *------------------------------------------------------------------------------*/

_remap:

        ldr r2, _lp_remap

        mov r0, #AT91C_MC_RCB

        str r0, [r2]

/*------------------------------------------------------------------------------

 *- Setup the stack for each mode

 *------------------------------------------------------------------------------*/

_stack_init:

  ldr      r2, =_lp_stack_init

        ldmia    r2, {r0, r1, r2}

/*- Set up Abort Mode and set ABT Mode Stack */

        msr      CPSR_c, #ARM_MODE_ABT | I_BIT | F_BIT

        mov      sp, r0

        sub      r0, r0, r1

/*- Set up Interrupt Mode and set IRQ Mode Stack */

        msr      CPSR_c, #ARM_MODE_IRQ | I_BIT | F_BIT

        mov      sp, r0

        sub      r0, r0, r2

/*- Enable interrupt & Set up Supervisor Mode and set Supervisor Mode Stack */

        msr      CPSR_c, #ARM_MODE_SVC | F_BIT

        mov      sp, r0

/*------------------------------------------------------------------------------

 *- Segments initialization

 *------------------------------------------------------------------------------*/

/* Copy the data section in RAM at 0x0000 */

_init_data:

  ldr      r2, =_lp_data

        ldmia    r2, {r1, r3, r4}

1:

        cmp      r3, r4

        ldrcc    r2, [r1], #4

        strcc    r2, [r3], #4

        bcc      1b

/* Clear the bss segment */

_init_bss:

  ldr      r2, =_lp_bss

        ldmia    r2, {r3, r4}

        mov      r2, #0

1:

        cmp      r3, r4

        strcc    r2, [r3], #4

        bcc      1b

/*------------------------------------------------------------------------------

 *- Branch to the main

 *------------------------------------------------------------------------------*/

_branch_main:

        ldr      r0, =main

        mov      lr, pc

        bx       r0

/*------------------------------------------------------------------------------

 *- Litteral pools

 *------------------------------------------------------------------------------*/

_lp_ll_init:

        .word    lowlevel_init

        .word    TOP_OF_MEMORY              /* Default SVC stack after power up */

_lp_remap:

        .word    AT91C_MC_RCR

_lp_stack_init:

        .word    TOP_OF_MEMORY             /* Top of the stack */

        .word    ABT_STACK_SIZE            /* ABT stack size */

        .word    IRQ_STACK_SIZE            /* IRQ stack size */

_lp_bss:

        .word    _sbss

        .word    _ebss

_lp_data:

        .word    _etext

        .word    _sdata

        .word    _edata

 ifndef ERASE_FCT

#ERASE_FCT=del /F

ERASE_FCT=rm

endif

ifndef CROSS_COMPILE

CROSS_COMPILE=arm-elf-

endif

TOOLCHAIN=gcc

OUTFILE_SRAM=at91sam7a3_getting_started_sram

OUTFILE_FLASH=at91sam7a3_getting_started_flash_neu

# Name of output binary file

TARGET=AT91SAM7A3

INCL=./include

# Comment the line below for debug mode

#OPTIM=-Os

ifeq ($(TOOLCHAIN), gcc)

AS=$(CROSS_COMPILE)gcc

CC=$(CROSS_COMPILE)gcc

LD=$(CROSS_COMPILE)gcc

NM= $(CROSS_COMPILE)nm

SIZE=$(CROSS_COMPILE)size

OBJCOPY=$(CROSS_COMPILE)objcopy

OBJDUMP=$(CROSS_COMPILE)objdump

CCFLAGS=-g -mcpu=arm7tdmi $(OPTIM) -Wall -I$(INCL) -D$(TARGET)

ASFLAGS=-D__ASSEMBLY__ -D$(TARGET) -g -mcpu=arm7tdmi -c $(OPTIM) -Wall -I$(INCL)

# Linker flags.

#  -Wl,...:     tell GCC to pass this to linker.

#    -Map:      create map file

#    --cref:    add cross reference to map file

#  -lc      :   tells the linker to tie in newlib

#  -lgcc   :   tells the linker to tie in newlib

LDFLAGS+=-nostartfiles -Wl,--cref

LDFLAGS+=-lc -lgcc

LDFLAGS+=-T elf32-littlearm.lds

OBJS=cstartup.o

endif

OBJS+= lowlevel.o \

       main.o

rebuild: clean all

all: sram flash

sram: $(OBJS)

  $(LD) $(LDFLAGS) -Ttext 0x201000 -Tdata 0x200000 -n -o $(OUTFILE_SRAM).elf $(OBJS)

  $(OBJCOPY) --strip-debug --strip-unneeded $(OUTFILE_SRAM).elf -O binary $(OUTFILE_SRAM).bin

flash: $(OBJS)

  $(LD) $(LDFLAGS) -Ttext 0x100000 -Tdata 0x200000 -n -o $(OUTFILE_FLASH).elf $(OBJS)

  $(OBJCOPY) --strip-debug --strip-unneeded $(OUTFILE_FLASH).elf -O binary $(OUTFILE_FLASH).bin

main.o: main.c 

  $(CC) -c $(CCFLAGS) main.c -o main.o

lowlevel.o: lowlevel.c

  $(CC) -c $(CCFLAGS) lowlevel.c -o lowlevel.o

cstartup.o:  cstartup.S

  $(AS) $(ASFLAGS) cstartup.S -o cstartup.o

clean:

  $(ERASE_FCT) *.o *.bin *.elf